root / hw / xilinx_ethlite.c @ 03a6b667
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1 | b43848a1 | Edgar E. Iglesias | /*
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2 | b43848a1 | Edgar E. Iglesias | * QEMU model of the Xilinx Ethernet Lite MAC.
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3 | b43848a1 | Edgar E. Iglesias | *
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4 | b43848a1 | Edgar E. Iglesias | * Copyright (c) 2009 Edgar E. Iglesias.
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5 | b43848a1 | Edgar E. Iglesias | *
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6 | b43848a1 | Edgar E. Iglesias | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | b43848a1 | Edgar E. Iglesias | * of this software and associated documentation files (the "Software"), to deal
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8 | b43848a1 | Edgar E. Iglesias | * in the Software without restriction, including without limitation the rights
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9 | b43848a1 | Edgar E. Iglesias | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | b43848a1 | Edgar E. Iglesias | * copies of the Software, and to permit persons to whom the Software is
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11 | b43848a1 | Edgar E. Iglesias | * furnished to do so, subject to the following conditions:
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12 | b43848a1 | Edgar E. Iglesias | *
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13 | b43848a1 | Edgar E. Iglesias | * The above copyright notice and this permission notice shall be included in
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14 | b43848a1 | Edgar E. Iglesias | * all copies or substantial portions of the Software.
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15 | b43848a1 | Edgar E. Iglesias | *
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16 | b43848a1 | Edgar E. Iglesias | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | b43848a1 | Edgar E. Iglesias | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | b43848a1 | Edgar E. Iglesias | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | b43848a1 | Edgar E. Iglesias | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | b43848a1 | Edgar E. Iglesias | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | b43848a1 | Edgar E. Iglesias | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | b43848a1 | Edgar E. Iglesias | * THE SOFTWARE.
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23 | b43848a1 | Edgar E. Iglesias | */
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24 | b43848a1 | Edgar E. Iglesias | |
25 | b43848a1 | Edgar E. Iglesias | #include "sysbus.h" |
26 | b43848a1 | Edgar E. Iglesias | #include "hw.h" |
27 | b43848a1 | Edgar E. Iglesias | #include "net.h" |
28 | b43848a1 | Edgar E. Iglesias | |
29 | b43848a1 | Edgar E. Iglesias | #define D(x)
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30 | b43848a1 | Edgar E. Iglesias | #define R_TX_BUF0 0 |
31 | b43848a1 | Edgar E. Iglesias | #define R_TX_LEN0 (0x07f4 / 4) |
32 | b43848a1 | Edgar E. Iglesias | #define R_TX_GIE0 (0x07f8 / 4) |
33 | b43848a1 | Edgar E. Iglesias | #define R_TX_CTRL0 (0x07fc / 4) |
34 | b43848a1 | Edgar E. Iglesias | #define R_TX_BUF1 (0x0800 / 4) |
35 | b43848a1 | Edgar E. Iglesias | #define R_TX_LEN1 (0x0ff4 / 4) |
36 | b43848a1 | Edgar E. Iglesias | #define R_TX_CTRL1 (0x0ffc / 4) |
37 | b43848a1 | Edgar E. Iglesias | |
38 | b43848a1 | Edgar E. Iglesias | #define R_RX_BUF0 (0x1000 / 4) |
39 | b43848a1 | Edgar E. Iglesias | #define R_RX_CTRL0 (0x17fc / 4) |
40 | b43848a1 | Edgar E. Iglesias | #define R_RX_BUF1 (0x1800 / 4) |
41 | b43848a1 | Edgar E. Iglesias | #define R_RX_CTRL1 (0x1ffc / 4) |
42 | b43848a1 | Edgar E. Iglesias | #define R_MAX (0x2000 / 4) |
43 | b43848a1 | Edgar E. Iglesias | |
44 | b43848a1 | Edgar E. Iglesias | #define GIE_GIE 0x80000000 |
45 | b43848a1 | Edgar E. Iglesias | |
46 | b43848a1 | Edgar E. Iglesias | #define CTRL_I 0x8 |
47 | b43848a1 | Edgar E. Iglesias | #define CTRL_P 0x2 |
48 | b43848a1 | Edgar E. Iglesias | #define CTRL_S 0x1 |
49 | b43848a1 | Edgar E. Iglesias | |
50 | b43848a1 | Edgar E. Iglesias | struct xlx_ethlite
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51 | b43848a1 | Edgar E. Iglesias | { |
52 | b43848a1 | Edgar E. Iglesias | SysBusDevice busdev; |
53 | 010f3f5f | Edgar E. Iglesias | MemoryRegion mmio; |
54 | b43848a1 | Edgar E. Iglesias | qemu_irq irq; |
55 | d7539ab4 | Mark McLoughlin | NICState *nic; |
56 | 17d1ae3c | Gerd Hoffmann | NICConf conf; |
57 | b43848a1 | Edgar E. Iglesias | |
58 | ee6847d1 | Gerd Hoffmann | uint32_t c_tx_pingpong; |
59 | ee6847d1 | Gerd Hoffmann | uint32_t c_rx_pingpong; |
60 | b43848a1 | Edgar E. Iglesias | unsigned int txbuf; |
61 | b43848a1 | Edgar E. Iglesias | unsigned int rxbuf; |
62 | b43848a1 | Edgar E. Iglesias | |
63 | b43848a1 | Edgar E. Iglesias | uint32_t regs[R_MAX]; |
64 | b43848a1 | Edgar E. Iglesias | }; |
65 | b43848a1 | Edgar E. Iglesias | |
66 | b43848a1 | Edgar E. Iglesias | static inline void eth_pulse_irq(struct xlx_ethlite *s) |
67 | b43848a1 | Edgar E. Iglesias | { |
68 | b43848a1 | Edgar E. Iglesias | /* Only the first gie reg is active. */
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69 | b43848a1 | Edgar E. Iglesias | if (s->regs[R_TX_GIE0] & GIE_GIE) {
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70 | b43848a1 | Edgar E. Iglesias | qemu_irq_pulse(s->irq); |
71 | b43848a1 | Edgar E. Iglesias | } |
72 | b43848a1 | Edgar E. Iglesias | } |
73 | b43848a1 | Edgar E. Iglesias | |
74 | 010f3f5f | Edgar E. Iglesias | static uint64_t
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75 | 010f3f5f | Edgar E. Iglesias | eth_read(void *opaque, target_phys_addr_t addr, unsigned int size) |
76 | b43848a1 | Edgar E. Iglesias | { |
77 | b43848a1 | Edgar E. Iglesias | struct xlx_ethlite *s = opaque;
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78 | b43848a1 | Edgar E. Iglesias | uint32_t r = 0;
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79 | b43848a1 | Edgar E. Iglesias | |
80 | b43848a1 | Edgar E. Iglesias | addr >>= 2;
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81 | b43848a1 | Edgar E. Iglesias | |
82 | b43848a1 | Edgar E. Iglesias | switch (addr)
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83 | b43848a1 | Edgar E. Iglesias | { |
84 | b43848a1 | Edgar E. Iglesias | case R_TX_GIE0:
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85 | b43848a1 | Edgar E. Iglesias | case R_TX_LEN0:
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86 | b43848a1 | Edgar E. Iglesias | case R_TX_LEN1:
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87 | b43848a1 | Edgar E. Iglesias | case R_TX_CTRL1:
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88 | b43848a1 | Edgar E. Iglesias | case R_TX_CTRL0:
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89 | b43848a1 | Edgar E. Iglesias | case R_RX_CTRL1:
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90 | b43848a1 | Edgar E. Iglesias | case R_RX_CTRL0:
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91 | b43848a1 | Edgar E. Iglesias | r = s->regs[addr]; |
92 | b43848a1 | Edgar E. Iglesias | D(qemu_log("%s %x=%x\n", __func__, addr * 4, r)); |
93 | b43848a1 | Edgar E. Iglesias | break;
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94 | b43848a1 | Edgar E. Iglesias | |
95 | b43848a1 | Edgar E. Iglesias | default:
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96 | d48751ed | Edgar E. Iglesias | r = tswap32(s->regs[addr]); |
97 | b43848a1 | Edgar E. Iglesias | break;
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98 | b43848a1 | Edgar E. Iglesias | } |
99 | b43848a1 | Edgar E. Iglesias | return r;
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100 | b43848a1 | Edgar E. Iglesias | } |
101 | b43848a1 | Edgar E. Iglesias | |
102 | b43848a1 | Edgar E. Iglesias | static void |
103 | 010f3f5f | Edgar E. Iglesias | eth_write(void *opaque, target_phys_addr_t addr,
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104 | 010f3f5f | Edgar E. Iglesias | uint64_t val64, unsigned int size) |
105 | b43848a1 | Edgar E. Iglesias | { |
106 | b43848a1 | Edgar E. Iglesias | struct xlx_ethlite *s = opaque;
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107 | b43848a1 | Edgar E. Iglesias | unsigned int base = 0; |
108 | 010f3f5f | Edgar E. Iglesias | uint32_t value = val64; |
109 | b43848a1 | Edgar E. Iglesias | |
110 | b43848a1 | Edgar E. Iglesias | addr >>= 2;
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111 | b43848a1 | Edgar E. Iglesias | switch (addr)
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112 | b43848a1 | Edgar E. Iglesias | { |
113 | b43848a1 | Edgar E. Iglesias | case R_TX_CTRL0:
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114 | b43848a1 | Edgar E. Iglesias | case R_TX_CTRL1:
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115 | b43848a1 | Edgar E. Iglesias | if (addr == R_TX_CTRL1)
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116 | b43848a1 | Edgar E. Iglesias | base = 0x800 / 4; |
117 | b43848a1 | Edgar E. Iglesias | |
118 | b43848a1 | Edgar E. Iglesias | D(qemu_log("%s addr=%x val=%x\n", __func__, addr * 4, value)); |
119 | b43848a1 | Edgar E. Iglesias | if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
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120 | d7539ab4 | Mark McLoughlin | qemu_send_packet(&s->nic->nc, |
121 | b43848a1 | Edgar E. Iglesias | (void *) &s->regs[base],
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122 | b43848a1 | Edgar E. Iglesias | s->regs[base + R_TX_LEN0]); |
123 | b43848a1 | Edgar E. Iglesias | D(qemu_log("eth_tx %d\n", s->regs[base + R_TX_LEN0]));
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124 | b43848a1 | Edgar E. Iglesias | if (s->regs[base + R_TX_CTRL0] & CTRL_I)
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125 | b43848a1 | Edgar E. Iglesias | eth_pulse_irq(s); |
126 | b43848a1 | Edgar E. Iglesias | } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { |
127 | 17d1ae3c | Gerd Hoffmann | memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6); |
128 | b43848a1 | Edgar E. Iglesias | if (s->regs[base + R_TX_CTRL0] & CTRL_I)
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129 | b43848a1 | Edgar E. Iglesias | eth_pulse_irq(s); |
130 | b43848a1 | Edgar E. Iglesias | } |
131 | b43848a1 | Edgar E. Iglesias | |
132 | b43848a1 | Edgar E. Iglesias | /* We are fast and get ready pretty much immediately so
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133 | b43848a1 | Edgar E. Iglesias | we actually never flip the S nor P bits to one. */
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134 | b43848a1 | Edgar E. Iglesias | s->regs[addr] = value & ~(CTRL_P | CTRL_S); |
135 | b43848a1 | Edgar E. Iglesias | break;
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136 | b43848a1 | Edgar E. Iglesias | |
137 | b43848a1 | Edgar E. Iglesias | /* Keep these native. */
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138 | b43848a1 | Edgar E. Iglesias | case R_TX_LEN0:
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139 | b43848a1 | Edgar E. Iglesias | case R_TX_LEN1:
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140 | b43848a1 | Edgar E. Iglesias | case R_TX_GIE0:
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141 | b43848a1 | Edgar E. Iglesias | case R_RX_CTRL0:
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142 | b43848a1 | Edgar E. Iglesias | case R_RX_CTRL1:
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143 | b43848a1 | Edgar E. Iglesias | D(qemu_log("%s addr=%x val=%x\n", __func__, addr * 4, value)); |
144 | b43848a1 | Edgar E. Iglesias | s->regs[addr] = value; |
145 | b43848a1 | Edgar E. Iglesias | break;
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146 | b43848a1 | Edgar E. Iglesias | |
147 | b43848a1 | Edgar E. Iglesias | default:
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148 | d48751ed | Edgar E. Iglesias | s->regs[addr] = tswap32(value); |
149 | b43848a1 | Edgar E. Iglesias | break;
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150 | b43848a1 | Edgar E. Iglesias | } |
151 | b43848a1 | Edgar E. Iglesias | } |
152 | b43848a1 | Edgar E. Iglesias | |
153 | 010f3f5f | Edgar E. Iglesias | static const MemoryRegionOps eth_ops = { |
154 | 010f3f5f | Edgar E. Iglesias | .read = eth_read, |
155 | 010f3f5f | Edgar E. Iglesias | .write = eth_write, |
156 | 010f3f5f | Edgar E. Iglesias | .endianness = DEVICE_NATIVE_ENDIAN, |
157 | 010f3f5f | Edgar E. Iglesias | .valid = { |
158 | 010f3f5f | Edgar E. Iglesias | .min_access_size = 4,
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159 | 010f3f5f | Edgar E. Iglesias | .max_access_size = 4
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160 | 010f3f5f | Edgar E. Iglesias | } |
161 | b43848a1 | Edgar E. Iglesias | }; |
162 | b43848a1 | Edgar E. Iglesias | |
163 | 4e68f7a0 | Stefan Hajnoczi | static int eth_can_rx(NetClientState *nc) |
164 | b43848a1 | Edgar E. Iglesias | { |
165 | d7539ab4 | Mark McLoughlin | struct xlx_ethlite *s = DO_UPCAST(NICState, nc, nc)->opaque;
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166 | b43848a1 | Edgar E. Iglesias | int r;
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167 | b43848a1 | Edgar E. Iglesias | r = !(s->regs[R_RX_CTRL0] & CTRL_S); |
168 | b43848a1 | Edgar E. Iglesias | return r;
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169 | b43848a1 | Edgar E. Iglesias | } |
170 | b43848a1 | Edgar E. Iglesias | |
171 | 4e68f7a0 | Stefan Hajnoczi | static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) |
172 | b43848a1 | Edgar E. Iglesias | { |
173 | d7539ab4 | Mark McLoughlin | struct xlx_ethlite *s = DO_UPCAST(NICState, nc, nc)->opaque;
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174 | b43848a1 | Edgar E. Iglesias | unsigned int rxbase = s->rxbuf * (0x800 / 4); |
175 | b43848a1 | Edgar E. Iglesias | |
176 | b43848a1 | Edgar E. Iglesias | /* DA filter. */
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177 | 17d1ae3c | Gerd Hoffmann | if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6)) |
178 | df12c1f5 | Jan Kiszka | return size;
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179 | b43848a1 | Edgar E. Iglesias | |
180 | b43848a1 | Edgar E. Iglesias | if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) {
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181 | b43848a1 | Edgar E. Iglesias | D(qemu_log("ethlite lost packet %x\n", s->regs[R_RX_CTRL0]));
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182 | df12c1f5 | Jan Kiszka | return -1; |
183 | b43848a1 | Edgar E. Iglesias | } |
184 | b43848a1 | Edgar E. Iglesias | |
185 | b43848a1 | Edgar E. Iglesias | D(qemu_log("%s %d rxbase=%x\n", __func__, size, rxbase));
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186 | b43848a1 | Edgar E. Iglesias | memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size); |
187 | b43848a1 | Edgar E. Iglesias | |
188 | b43848a1 | Edgar E. Iglesias | s->regs[rxbase + R_RX_CTRL0] |= CTRL_S; |
189 | b43848a1 | Edgar E. Iglesias | if (s->regs[rxbase + R_RX_CTRL0] & CTRL_I)
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190 | b43848a1 | Edgar E. Iglesias | eth_pulse_irq(s); |
191 | b43848a1 | Edgar E. Iglesias | |
192 | b43848a1 | Edgar E. Iglesias | /* If c_rx_pingpong was set flip buffers. */
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193 | b43848a1 | Edgar E. Iglesias | s->rxbuf ^= s->c_rx_pingpong; |
194 | df12c1f5 | Jan Kiszka | return size;
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195 | b43848a1 | Edgar E. Iglesias | } |
196 | b43848a1 | Edgar E. Iglesias | |
197 | 4e68f7a0 | Stefan Hajnoczi | static void eth_cleanup(NetClientState *nc) |
198 | b43848a1 | Edgar E. Iglesias | { |
199 | d7539ab4 | Mark McLoughlin | struct xlx_ethlite *s = DO_UPCAST(NICState, nc, nc)->opaque;
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200 | 17d1ae3c | Gerd Hoffmann | |
201 | d7539ab4 | Mark McLoughlin | s->nic = NULL;
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202 | b43848a1 | Edgar E. Iglesias | } |
203 | b43848a1 | Edgar E. Iglesias | |
204 | d7539ab4 | Mark McLoughlin | static NetClientInfo net_xilinx_ethlite_info = {
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205 | 2be64a68 | Laszlo Ersek | .type = NET_CLIENT_OPTIONS_KIND_NIC, |
206 | d7539ab4 | Mark McLoughlin | .size = sizeof(NICState),
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207 | d7539ab4 | Mark McLoughlin | .can_receive = eth_can_rx, |
208 | d7539ab4 | Mark McLoughlin | .receive = eth_rx, |
209 | d7539ab4 | Mark McLoughlin | .cleanup = eth_cleanup, |
210 | d7539ab4 | Mark McLoughlin | }; |
211 | d7539ab4 | Mark McLoughlin | |
212 | 81a322d4 | Gerd Hoffmann | static int xilinx_ethlite_init(SysBusDevice *dev) |
213 | b43848a1 | Edgar E. Iglesias | { |
214 | b43848a1 | Edgar E. Iglesias | struct xlx_ethlite *s = FROM_SYSBUS(typeof (*s), dev);
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215 | b43848a1 | Edgar E. Iglesias | |
216 | b43848a1 | Edgar E. Iglesias | sysbus_init_irq(dev, &s->irq); |
217 | b43848a1 | Edgar E. Iglesias | s->rxbuf = 0;
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218 | b43848a1 | Edgar E. Iglesias | |
219 | 7f4d6755 | Peter A. G. Crosthwaite | memory_region_init_io(&s->mmio, ð_ops, s, "xlnx.xps-ethernetlite",
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220 | 7f4d6755 | Peter A. G. Crosthwaite | R_MAX * 4);
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221 | 750ecd44 | Avi Kivity | sysbus_init_mmio(dev, &s->mmio); |
222 | b43848a1 | Edgar E. Iglesias | |
223 | 17d1ae3c | Gerd Hoffmann | qemu_macaddr_default_if_unset(&s->conf.macaddr); |
224 | d7539ab4 | Mark McLoughlin | s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf, |
225 | f79f2bfc | Anthony Liguori | object_get_typename(OBJECT(dev)), dev->qdev.id, s); |
226 | d7539ab4 | Mark McLoughlin | qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a); |
227 | 81a322d4 | Gerd Hoffmann | return 0; |
228 | b43848a1 | Edgar E. Iglesias | } |
229 | b43848a1 | Edgar E. Iglesias | |
230 | 999e12bb | Anthony Liguori | static Property xilinx_ethlite_properties[] = {
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231 | b2d85c34 | Peter A. G. Crosthwaite | DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1), |
232 | b2d85c34 | Peter A. G. Crosthwaite | DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1), |
233 | 999e12bb | Anthony Liguori | DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
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234 | 999e12bb | Anthony Liguori | DEFINE_PROP_END_OF_LIST(), |
235 | 999e12bb | Anthony Liguori | }; |
236 | 999e12bb | Anthony Liguori | |
237 | 999e12bb | Anthony Liguori | static void xilinx_ethlite_class_init(ObjectClass *klass, void *data) |
238 | 999e12bb | Anthony Liguori | { |
239 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
240 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
241 | 999e12bb | Anthony Liguori | |
242 | 999e12bb | Anthony Liguori | k->init = xilinx_ethlite_init; |
243 | 39bffca2 | Anthony Liguori | dc->props = xilinx_ethlite_properties; |
244 | 999e12bb | Anthony Liguori | } |
245 | 999e12bb | Anthony Liguori | |
246 | 39bffca2 | Anthony Liguori | static TypeInfo xilinx_ethlite_info = {
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247 | 7f4d6755 | Peter A. G. Crosthwaite | .name = "xlnx.xps-ethernetlite",
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248 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
249 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(struct xlx_ethlite), |
250 | 39bffca2 | Anthony Liguori | .class_init = xilinx_ethlite_class_init, |
251 | ee6847d1 | Gerd Hoffmann | }; |
252 | ee6847d1 | Gerd Hoffmann | |
253 | 83f7d43a | Andreas Färber | static void xilinx_ethlite_register_types(void) |
254 | b43848a1 | Edgar E. Iglesias | { |
255 | 39bffca2 | Anthony Liguori | type_register_static(&xilinx_ethlite_info); |
256 | b43848a1 | Edgar E. Iglesias | } |
257 | b43848a1 | Edgar E. Iglesias | |
258 | 83f7d43a | Andreas Färber | type_init(xilinx_ethlite_register_types) |