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1 | 574bbf7b | bellard | /*
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2 | 574bbf7b | bellard | * APIC support
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3 | 5fafdf24 | ths | *
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4 | 574bbf7b | bellard | * Copyright (c) 2004-2005 Fabrice Bellard
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5 | 574bbf7b | bellard | *
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6 | 574bbf7b | bellard | * This library is free software; you can redistribute it and/or
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7 | 574bbf7b | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 574bbf7b | bellard | * License as published by the Free Software Foundation; either
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9 | 574bbf7b | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 574bbf7b | bellard | *
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11 | 574bbf7b | bellard | * This library is distributed in the hope that it will be useful,
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12 | 574bbf7b | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 574bbf7b | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 574bbf7b | bellard | * Lesser General Public License for more details.
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15 | 574bbf7b | bellard | *
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16 | 574bbf7b | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>
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18 | 574bbf7b | bellard | */
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19 | dae01685 | Jan Kiszka | #include "apic_internal.h" |
20 | aa28b9bf | Blue Swirl | #include "apic.h" |
21 | 0280b571 | Jan Kiszka | #include "ioapic.h" |
22 | bb7e7293 | aurel32 | #include "host-utils.h" |
23 | d8023f31 | Blue Swirl | #include "trace.h" |
24 | d96e1737 | Jan Kiszka | #include "pc.h" |
25 | 574bbf7b | bellard | |
26 | d3e9db93 | bellard | #define MAX_APIC_WORDS 8 |
27 | d3e9db93 | bellard | |
28 | 54c96da7 | Michael S. Tsirkin | /* Intel APIC constants: from include/asm/msidef.h */
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29 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_VECTOR_SHIFT 0 |
30 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_VECTOR_MASK 0x000000ff |
31 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
32 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_TRIGGER_SHIFT 15 |
33 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_LEVEL_SHIFT 14 |
34 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_MODE_SHIFT 2 |
35 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_ID_SHIFT 12 |
36 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
37 | 54c96da7 | Michael S. Tsirkin | |
38 | e5ad936b | Jan Kiszka | #define SYNC_FROM_VAPIC 0x1 |
39 | e5ad936b | Jan Kiszka | #define SYNC_TO_VAPIC 0x2 |
40 | e5ad936b | Jan Kiszka | #define SYNC_ISR_IRR_TO_VAPIC 0x4 |
41 | e5ad936b | Jan Kiszka | |
42 | dae01685 | Jan Kiszka | static APICCommonState *local_apics[MAX_APICS + 1]; |
43 | 73822ec8 | aliguori | |
44 | dae01685 | Jan Kiszka | static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); |
45 | dae01685 | Jan Kiszka | static void apic_update_irq(APICCommonState *s); |
46 | 610626af | aliguori | static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, |
47 | 610626af | aliguori | uint8_t dest, uint8_t dest_mode); |
48 | d592d303 | bellard | |
49 | 3b63c04e | aurel32 | /* Find first bit starting from msb */
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50 | 3b63c04e | aurel32 | static int fls_bit(uint32_t value) |
51 | 3b63c04e | aurel32 | { |
52 | 3b63c04e | aurel32 | return 31 - clz32(value); |
53 | 3b63c04e | aurel32 | } |
54 | 3b63c04e | aurel32 | |
55 | e95f5491 | aurel32 | /* Find first bit starting from lsb */
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56 | d3e9db93 | bellard | static int ffs_bit(uint32_t value) |
57 | d3e9db93 | bellard | { |
58 | bb7e7293 | aurel32 | return ctz32(value);
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59 | d3e9db93 | bellard | } |
60 | d3e9db93 | bellard | |
61 | d3e9db93 | bellard | static inline void set_bit(uint32_t *tab, int index) |
62 | d3e9db93 | bellard | { |
63 | d3e9db93 | bellard | int i, mask;
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64 | d3e9db93 | bellard | i = index >> 5;
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65 | d3e9db93 | bellard | mask = 1 << (index & 0x1f); |
66 | d3e9db93 | bellard | tab[i] |= mask; |
67 | d3e9db93 | bellard | } |
68 | d3e9db93 | bellard | |
69 | d3e9db93 | bellard | static inline void reset_bit(uint32_t *tab, int index) |
70 | d3e9db93 | bellard | { |
71 | d3e9db93 | bellard | int i, mask;
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72 | d3e9db93 | bellard | i = index >> 5;
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73 | d3e9db93 | bellard | mask = 1 << (index & 0x1f); |
74 | d3e9db93 | bellard | tab[i] &= ~mask; |
75 | d3e9db93 | bellard | } |
76 | d3e9db93 | bellard | |
77 | 73822ec8 | aliguori | static inline int get_bit(uint32_t *tab, int index) |
78 | 73822ec8 | aliguori | { |
79 | 73822ec8 | aliguori | int i, mask;
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80 | 73822ec8 | aliguori | i = index >> 5;
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81 | 73822ec8 | aliguori | mask = 1 << (index & 0x1f); |
82 | 73822ec8 | aliguori | return !!(tab[i] & mask);
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83 | 73822ec8 | aliguori | } |
84 | 73822ec8 | aliguori | |
85 | e5ad936b | Jan Kiszka | /* return -1 if no bit is set */
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86 | e5ad936b | Jan Kiszka | static int get_highest_priority_int(uint32_t *tab) |
87 | e5ad936b | Jan Kiszka | { |
88 | e5ad936b | Jan Kiszka | int i;
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89 | e5ad936b | Jan Kiszka | for (i = 7; i >= 0; i--) { |
90 | e5ad936b | Jan Kiszka | if (tab[i] != 0) { |
91 | e5ad936b | Jan Kiszka | return i * 32 + fls_bit(tab[i]); |
92 | e5ad936b | Jan Kiszka | } |
93 | e5ad936b | Jan Kiszka | } |
94 | e5ad936b | Jan Kiszka | return -1; |
95 | e5ad936b | Jan Kiszka | } |
96 | e5ad936b | Jan Kiszka | |
97 | e5ad936b | Jan Kiszka | static void apic_sync_vapic(APICCommonState *s, int sync_type) |
98 | e5ad936b | Jan Kiszka | { |
99 | e5ad936b | Jan Kiszka | VAPICState vapic_state; |
100 | e5ad936b | Jan Kiszka | size_t length; |
101 | e5ad936b | Jan Kiszka | off_t start; |
102 | e5ad936b | Jan Kiszka | int vector;
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103 | e5ad936b | Jan Kiszka | |
104 | e5ad936b | Jan Kiszka | if (!s->vapic_paddr) {
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105 | e5ad936b | Jan Kiszka | return;
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106 | e5ad936b | Jan Kiszka | } |
107 | e5ad936b | Jan Kiszka | if (sync_type & SYNC_FROM_VAPIC) {
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108 | e5ad936b | Jan Kiszka | cpu_physical_memory_rw(s->vapic_paddr, (void *)&vapic_state,
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109 | e5ad936b | Jan Kiszka | sizeof(vapic_state), 0); |
110 | e5ad936b | Jan Kiszka | s->tpr = vapic_state.tpr; |
111 | e5ad936b | Jan Kiszka | } |
112 | e5ad936b | Jan Kiszka | if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) {
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113 | e5ad936b | Jan Kiszka | start = offsetof(VAPICState, isr); |
114 | e5ad936b | Jan Kiszka | length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr); |
115 | e5ad936b | Jan Kiszka | |
116 | e5ad936b | Jan Kiszka | if (sync_type & SYNC_TO_VAPIC) {
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117 | e5ad936b | Jan Kiszka | assert(qemu_cpu_is_self(s->cpu_env)); |
118 | e5ad936b | Jan Kiszka | |
119 | e5ad936b | Jan Kiszka | vapic_state.tpr = s->tpr; |
120 | e5ad936b | Jan Kiszka | vapic_state.enabled = 1;
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121 | e5ad936b | Jan Kiszka | start = 0;
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122 | e5ad936b | Jan Kiszka | length = sizeof(VAPICState);
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123 | e5ad936b | Jan Kiszka | } |
124 | e5ad936b | Jan Kiszka | |
125 | e5ad936b | Jan Kiszka | vector = get_highest_priority_int(s->isr); |
126 | e5ad936b | Jan Kiszka | if (vector < 0) { |
127 | e5ad936b | Jan Kiszka | vector = 0;
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128 | e5ad936b | Jan Kiszka | } |
129 | e5ad936b | Jan Kiszka | vapic_state.isr = vector & 0xf0;
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130 | e5ad936b | Jan Kiszka | |
131 | e5ad936b | Jan Kiszka | vapic_state.zero = 0;
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132 | e5ad936b | Jan Kiszka | |
133 | e5ad936b | Jan Kiszka | vector = get_highest_priority_int(s->irr); |
134 | e5ad936b | Jan Kiszka | if (vector < 0) { |
135 | e5ad936b | Jan Kiszka | vector = 0;
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136 | e5ad936b | Jan Kiszka | } |
137 | e5ad936b | Jan Kiszka | vapic_state.irr = vector & 0xff;
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138 | e5ad936b | Jan Kiszka | |
139 | e5ad936b | Jan Kiszka | cpu_physical_memory_write_rom(s->vapic_paddr + start, |
140 | e5ad936b | Jan Kiszka | ((void *)&vapic_state) + start, length);
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141 | e5ad936b | Jan Kiszka | } |
142 | e5ad936b | Jan Kiszka | } |
143 | e5ad936b | Jan Kiszka | |
144 | e5ad936b | Jan Kiszka | static void apic_vapic_base_update(APICCommonState *s) |
145 | e5ad936b | Jan Kiszka | { |
146 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
147 | e5ad936b | Jan Kiszka | } |
148 | e5ad936b | Jan Kiszka | |
149 | dae01685 | Jan Kiszka | static void apic_local_deliver(APICCommonState *s, int vector) |
150 | a5b38b51 | aurel32 | { |
151 | a5b38b51 | aurel32 | uint32_t lvt = s->lvt[vector]; |
152 | a5b38b51 | aurel32 | int trigger_mode;
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153 | a5b38b51 | aurel32 | |
154 | d8023f31 | Blue Swirl | trace_apic_local_deliver(vector, (lvt >> 8) & 7); |
155 | d8023f31 | Blue Swirl | |
156 | a5b38b51 | aurel32 | if (lvt & APIC_LVT_MASKED)
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157 | a5b38b51 | aurel32 | return;
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158 | a5b38b51 | aurel32 | |
159 | a5b38b51 | aurel32 | switch ((lvt >> 8) & 7) { |
160 | a5b38b51 | aurel32 | case APIC_DM_SMI:
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161 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI); |
162 | a5b38b51 | aurel32 | break;
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163 | a5b38b51 | aurel32 | |
164 | a5b38b51 | aurel32 | case APIC_DM_NMI:
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165 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI); |
166 | a5b38b51 | aurel32 | break;
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167 | a5b38b51 | aurel32 | |
168 | a5b38b51 | aurel32 | case APIC_DM_EXTINT:
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169 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
170 | a5b38b51 | aurel32 | break;
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171 | a5b38b51 | aurel32 | |
172 | a5b38b51 | aurel32 | case APIC_DM_FIXED:
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173 | a5b38b51 | aurel32 | trigger_mode = APIC_TRIGGER_EDGE; |
174 | a5b38b51 | aurel32 | if ((vector == APIC_LVT_LINT0 || vector == APIC_LVT_LINT1) &&
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175 | a5b38b51 | aurel32 | (lvt & APIC_LVT_LEVEL_TRIGGER)) |
176 | a5b38b51 | aurel32 | trigger_mode = APIC_TRIGGER_LEVEL; |
177 | a5b38b51 | aurel32 | apic_set_irq(s, lvt & 0xff, trigger_mode);
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178 | a5b38b51 | aurel32 | } |
179 | a5b38b51 | aurel32 | } |
180 | a5b38b51 | aurel32 | |
181 | 92a16d7a | Blue Swirl | void apic_deliver_pic_intr(DeviceState *d, int level) |
182 | 1a7de94a | aurel32 | { |
183 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
184 | 92a16d7a | Blue Swirl | |
185 | cf6d64bf | Blue Swirl | if (level) {
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186 | cf6d64bf | Blue Swirl | apic_local_deliver(s, APIC_LVT_LINT0); |
187 | cf6d64bf | Blue Swirl | } else {
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188 | 1a7de94a | aurel32 | uint32_t lvt = s->lvt[APIC_LVT_LINT0]; |
189 | 1a7de94a | aurel32 | |
190 | 1a7de94a | aurel32 | switch ((lvt >> 8) & 7) { |
191 | 1a7de94a | aurel32 | case APIC_DM_FIXED:
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192 | 1a7de94a | aurel32 | if (!(lvt & APIC_LVT_LEVEL_TRIGGER))
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193 | 1a7de94a | aurel32 | break;
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194 | 1a7de94a | aurel32 | reset_bit(s->irr, lvt & 0xff);
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195 | 1a7de94a | aurel32 | /* fall through */
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196 | 1a7de94a | aurel32 | case APIC_DM_EXTINT:
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197 | cf6d64bf | Blue Swirl | cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
198 | 1a7de94a | aurel32 | break;
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199 | 1a7de94a | aurel32 | } |
200 | 1a7de94a | aurel32 | } |
201 | 1a7de94a | aurel32 | } |
202 | 1a7de94a | aurel32 | |
203 | dae01685 | Jan Kiszka | static void apic_external_nmi(APICCommonState *s) |
204 | 02c09195 | Jan Kiszka | { |
205 | 02c09195 | Jan Kiszka | apic_local_deliver(s, APIC_LVT_LINT1); |
206 | 02c09195 | Jan Kiszka | } |
207 | 02c09195 | Jan Kiszka | |
208 | d3e9db93 | bellard | #define foreach_apic(apic, deliver_bitmask, code) \
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209 | d3e9db93 | bellard | {\ |
210 | d3e9db93 | bellard | int __i, __j, __mask;\
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211 | d3e9db93 | bellard | for(__i = 0; __i < MAX_APIC_WORDS; __i++) {\ |
212 | d3e9db93 | bellard | __mask = deliver_bitmask[__i];\ |
213 | d3e9db93 | bellard | if (__mask) {\
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214 | d3e9db93 | bellard | for(__j = 0; __j < 32; __j++) {\ |
215 | d3e9db93 | bellard | if (__mask & (1 << __j)) {\ |
216 | d3e9db93 | bellard | apic = local_apics[__i * 32 + __j];\
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217 | d3e9db93 | bellard | if (apic) {\
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218 | d3e9db93 | bellard | code;\ |
219 | d3e9db93 | bellard | }\ |
220 | d3e9db93 | bellard | }\ |
221 | d3e9db93 | bellard | }\ |
222 | d3e9db93 | bellard | }\ |
223 | d3e9db93 | bellard | }\ |
224 | d3e9db93 | bellard | } |
225 | d3e9db93 | bellard | |
226 | 5fafdf24 | ths | static void apic_bus_deliver(const uint32_t *deliver_bitmask, |
227 | 1f6f408c | Jan Kiszka | uint8_t delivery_mode, uint8_t vector_num, |
228 | d592d303 | bellard | uint8_t trigger_mode) |
229 | d592d303 | bellard | { |
230 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
231 | d592d303 | bellard | |
232 | d592d303 | bellard | switch (delivery_mode) {
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233 | d592d303 | bellard | case APIC_DM_LOWPRI:
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234 | 8dd69b8f | bellard | /* XXX: search for focus processor, arbitration */
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235 | d3e9db93 | bellard | { |
236 | d3e9db93 | bellard | int i, d;
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237 | d3e9db93 | bellard | d = -1;
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238 | d3e9db93 | bellard | for(i = 0; i < MAX_APIC_WORDS; i++) { |
239 | d3e9db93 | bellard | if (deliver_bitmask[i]) {
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240 | d3e9db93 | bellard | d = i * 32 + ffs_bit(deliver_bitmask[i]);
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241 | d3e9db93 | bellard | break;
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242 | d3e9db93 | bellard | } |
243 | d3e9db93 | bellard | } |
244 | d3e9db93 | bellard | if (d >= 0) { |
245 | d3e9db93 | bellard | apic_iter = local_apics[d]; |
246 | d3e9db93 | bellard | if (apic_iter) {
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247 | d3e9db93 | bellard | apic_set_irq(apic_iter, vector_num, trigger_mode); |
248 | d3e9db93 | bellard | } |
249 | d3e9db93 | bellard | } |
250 | 8dd69b8f | bellard | } |
251 | d3e9db93 | bellard | return;
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252 | 8dd69b8f | bellard | |
253 | d592d303 | bellard | case APIC_DM_FIXED:
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254 | d592d303 | bellard | break;
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255 | d592d303 | bellard | |
256 | d592d303 | bellard | case APIC_DM_SMI:
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257 | e2eb9d3e | aurel32 | foreach_apic(apic_iter, deliver_bitmask, |
258 | e2eb9d3e | aurel32 | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_SMI) ); |
259 | e2eb9d3e | aurel32 | return;
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260 | e2eb9d3e | aurel32 | |
261 | d592d303 | bellard | case APIC_DM_NMI:
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262 | e2eb9d3e | aurel32 | foreach_apic(apic_iter, deliver_bitmask, |
263 | e2eb9d3e | aurel32 | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_NMI) ); |
264 | e2eb9d3e | aurel32 | return;
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265 | d592d303 | bellard | |
266 | d592d303 | bellard | case APIC_DM_INIT:
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267 | d592d303 | bellard | /* normal INIT IPI sent to processors */
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268 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
269 | b09ea7d5 | Gleb Natapov | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) ); |
270 | d592d303 | bellard | return;
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271 | 3b46e624 | ths | |
272 | d592d303 | bellard | case APIC_DM_EXTINT:
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273 | b1fc0348 | bellard | /* handled in I/O APIC code */
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274 | d592d303 | bellard | break;
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275 | d592d303 | bellard | |
276 | d592d303 | bellard | default:
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277 | d592d303 | bellard | return;
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278 | d592d303 | bellard | } |
279 | d592d303 | bellard | |
280 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
281 | d3e9db93 | bellard | apic_set_irq(apic_iter, vector_num, trigger_mode) ); |
282 | d592d303 | bellard | } |
283 | 574bbf7b | bellard | |
284 | 1f6f408c | Jan Kiszka | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
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285 | 1f6f408c | Jan Kiszka | uint8_t vector_num, uint8_t trigger_mode) |
286 | 610626af | aliguori | { |
287 | 610626af | aliguori | uint32_t deliver_bitmask[MAX_APIC_WORDS]; |
288 | 610626af | aliguori | |
289 | d8023f31 | Blue Swirl | trace_apic_deliver_irq(dest, dest_mode, delivery_mode, vector_num, |
290 | 1f6f408c | Jan Kiszka | trigger_mode); |
291 | d8023f31 | Blue Swirl | |
292 | 610626af | aliguori | apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); |
293 | 1f6f408c | Jan Kiszka | apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); |
294 | 610626af | aliguori | } |
295 | 610626af | aliguori | |
296 | dae01685 | Jan Kiszka | static void apic_set_base(APICCommonState *s, uint64_t val) |
297 | 574bbf7b | bellard | { |
298 | 5fafdf24 | ths | s->apicbase = (val & 0xfffff000) |
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299 | 574bbf7b | bellard | (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); |
300 | 574bbf7b | bellard | /* if disabled, cannot be enabled again */
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301 | 574bbf7b | bellard | if (!(val & MSR_IA32_APICBASE_ENABLE)) {
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302 | 574bbf7b | bellard | s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; |
303 | 0e26b7b8 | Blue Swirl | cpu_clear_apic_feature(s->cpu_env); |
304 | 574bbf7b | bellard | s->spurious_vec &= ~APIC_SV_ENABLE; |
305 | 574bbf7b | bellard | } |
306 | 574bbf7b | bellard | } |
307 | 574bbf7b | bellard | |
308 | dae01685 | Jan Kiszka | static void apic_set_tpr(APICCommonState *s, uint8_t val) |
309 | 574bbf7b | bellard | { |
310 | e5ad936b | Jan Kiszka | /* Updates from cr8 are ignored while the VAPIC is active */
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311 | e5ad936b | Jan Kiszka | if (!s->vapic_paddr) {
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312 | e5ad936b | Jan Kiszka | s->tpr = val << 4;
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313 | e5ad936b | Jan Kiszka | apic_update_irq(s); |
314 | e5ad936b | Jan Kiszka | } |
315 | 9230e66e | bellard | } |
316 | 9230e66e | bellard | |
317 | e5ad936b | Jan Kiszka | static uint8_t apic_get_tpr(APICCommonState *s)
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318 | d592d303 | bellard | { |
319 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
320 | e5ad936b | Jan Kiszka | return s->tpr >> 4; |
321 | d592d303 | bellard | } |
322 | d592d303 | bellard | |
323 | dae01685 | Jan Kiszka | static int apic_get_ppr(APICCommonState *s) |
324 | 574bbf7b | bellard | { |
325 | 574bbf7b | bellard | int tpr, isrv, ppr;
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326 | 574bbf7b | bellard | |
327 | 574bbf7b | bellard | tpr = (s->tpr >> 4);
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328 | 574bbf7b | bellard | isrv = get_highest_priority_int(s->isr); |
329 | 574bbf7b | bellard | if (isrv < 0) |
330 | 574bbf7b | bellard | isrv = 0;
|
331 | 574bbf7b | bellard | isrv >>= 4;
|
332 | 574bbf7b | bellard | if (tpr >= isrv)
|
333 | 574bbf7b | bellard | ppr = s->tpr; |
334 | 574bbf7b | bellard | else
|
335 | 574bbf7b | bellard | ppr = isrv << 4;
|
336 | 574bbf7b | bellard | return ppr;
|
337 | 574bbf7b | bellard | } |
338 | 574bbf7b | bellard | |
339 | dae01685 | Jan Kiszka | static int apic_get_arb_pri(APICCommonState *s) |
340 | d592d303 | bellard | { |
341 | d592d303 | bellard | /* XXX: arbitration */
|
342 | d592d303 | bellard | return 0; |
343 | d592d303 | bellard | } |
344 | d592d303 | bellard | |
345 | 0fbfbb59 | Gleb Natapov | |
346 | 0fbfbb59 | Gleb Natapov | /*
|
347 | 0fbfbb59 | Gleb Natapov | * <0 - low prio interrupt,
|
348 | 0fbfbb59 | Gleb Natapov | * 0 - no interrupt,
|
349 | 0fbfbb59 | Gleb Natapov | * >0 - interrupt number
|
350 | 0fbfbb59 | Gleb Natapov | */
|
351 | dae01685 | Jan Kiszka | static int apic_irq_pending(APICCommonState *s) |
352 | 574bbf7b | bellard | { |
353 | d592d303 | bellard | int irrv, ppr;
|
354 | 574bbf7b | bellard | irrv = get_highest_priority_int(s->irr); |
355 | 0fbfbb59 | Gleb Natapov | if (irrv < 0) { |
356 | 0fbfbb59 | Gleb Natapov | return 0; |
357 | 0fbfbb59 | Gleb Natapov | } |
358 | d592d303 | bellard | ppr = apic_get_ppr(s); |
359 | 0fbfbb59 | Gleb Natapov | if (ppr && (irrv & 0xf0) <= (ppr & 0xf0)) { |
360 | 0fbfbb59 | Gleb Natapov | return -1; |
361 | 0fbfbb59 | Gleb Natapov | } |
362 | 0fbfbb59 | Gleb Natapov | |
363 | 0fbfbb59 | Gleb Natapov | return irrv;
|
364 | 0fbfbb59 | Gleb Natapov | } |
365 | 0fbfbb59 | Gleb Natapov | |
366 | 0fbfbb59 | Gleb Natapov | /* signal the CPU if an irq is pending */
|
367 | dae01685 | Jan Kiszka | static void apic_update_irq(APICCommonState *s) |
368 | 0fbfbb59 | Gleb Natapov | { |
369 | 0fbfbb59 | Gleb Natapov | if (!(s->spurious_vec & APIC_SV_ENABLE)) {
|
370 | 574bbf7b | bellard | return;
|
371 | 0fbfbb59 | Gleb Natapov | } |
372 | 0fbfbb59 | Gleb Natapov | if (apic_irq_pending(s) > 0) { |
373 | 0fbfbb59 | Gleb Natapov | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
374 | d96e1737 | Jan Kiszka | } else if (apic_accept_pic_intr(&s->busdev.qdev) && |
375 | d96e1737 | Jan Kiszka | pic_get_output(isa_pic)) { |
376 | d96e1737 | Jan Kiszka | apic_deliver_pic_intr(&s->busdev.qdev, 1);
|
377 | 0fbfbb59 | Gleb Natapov | } |
378 | 574bbf7b | bellard | } |
379 | 574bbf7b | bellard | |
380 | e5ad936b | Jan Kiszka | void apic_poll_irq(DeviceState *d)
|
381 | e5ad936b | Jan Kiszka | { |
382 | e5ad936b | Jan Kiszka | APICCommonState *s = APIC_COMMON(d); |
383 | e5ad936b | Jan Kiszka | |
384 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
385 | e5ad936b | Jan Kiszka | apic_update_irq(s); |
386 | e5ad936b | Jan Kiszka | } |
387 | e5ad936b | Jan Kiszka | |
388 | dae01685 | Jan Kiszka | static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode) |
389 | 574bbf7b | bellard | { |
390 | 343270ea | Jan Kiszka | apic_report_irq_delivered(!get_bit(s->irr, vector_num)); |
391 | 73822ec8 | aliguori | |
392 | 574bbf7b | bellard | set_bit(s->irr, vector_num); |
393 | 574bbf7b | bellard | if (trigger_mode)
|
394 | 574bbf7b | bellard | set_bit(s->tmr, vector_num); |
395 | 574bbf7b | bellard | else
|
396 | 574bbf7b | bellard | reset_bit(s->tmr, vector_num); |
397 | e5ad936b | Jan Kiszka | if (s->vapic_paddr) {
|
398 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_ISR_IRR_TO_VAPIC); |
399 | e5ad936b | Jan Kiszka | /*
|
400 | e5ad936b | Jan Kiszka | * The vcpu thread needs to see the new IRR before we pull its current
|
401 | e5ad936b | Jan Kiszka | * TPR value. That way, if we miss a lowering of the TRP, the guest
|
402 | e5ad936b | Jan Kiszka | * has the chance to notice the new IRR and poll for IRQs on its own.
|
403 | e5ad936b | Jan Kiszka | */
|
404 | e5ad936b | Jan Kiszka | smp_wmb(); |
405 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
406 | e5ad936b | Jan Kiszka | } |
407 | 574bbf7b | bellard | apic_update_irq(s); |
408 | 574bbf7b | bellard | } |
409 | 574bbf7b | bellard | |
410 | dae01685 | Jan Kiszka | static void apic_eoi(APICCommonState *s) |
411 | 574bbf7b | bellard | { |
412 | 574bbf7b | bellard | int isrv;
|
413 | 574bbf7b | bellard | isrv = get_highest_priority_int(s->isr); |
414 | 574bbf7b | bellard | if (isrv < 0) |
415 | 574bbf7b | bellard | return;
|
416 | 574bbf7b | bellard | reset_bit(s->isr, isrv); |
417 | 0280b571 | Jan Kiszka | if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) {
|
418 | 0280b571 | Jan Kiszka | ioapic_eoi_broadcast(isrv); |
419 | 0280b571 | Jan Kiszka | } |
420 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC); |
421 | 574bbf7b | bellard | apic_update_irq(s); |
422 | 574bbf7b | bellard | } |
423 | 574bbf7b | bellard | |
424 | 678e12cc | Gleb Natapov | static int apic_find_dest(uint8_t dest) |
425 | 678e12cc | Gleb Natapov | { |
426 | dae01685 | Jan Kiszka | APICCommonState *apic = local_apics[dest]; |
427 | 678e12cc | Gleb Natapov | int i;
|
428 | 678e12cc | Gleb Natapov | |
429 | 678e12cc | Gleb Natapov | if (apic && apic->id == dest)
|
430 | 678e12cc | Gleb Natapov | return dest; /* shortcut in case apic->id == apic->idx */ |
431 | 678e12cc | Gleb Natapov | |
432 | 678e12cc | Gleb Natapov | for (i = 0; i < MAX_APICS; i++) { |
433 | 678e12cc | Gleb Natapov | apic = local_apics[i]; |
434 | 678e12cc | Gleb Natapov | if (apic && apic->id == dest)
|
435 | 678e12cc | Gleb Natapov | return i;
|
436 | b538e53e | Alex Williamson | if (!apic)
|
437 | b538e53e | Alex Williamson | break;
|
438 | 678e12cc | Gleb Natapov | } |
439 | 678e12cc | Gleb Natapov | |
440 | 678e12cc | Gleb Natapov | return -1; |
441 | 678e12cc | Gleb Natapov | } |
442 | 678e12cc | Gleb Natapov | |
443 | d3e9db93 | bellard | static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, |
444 | d3e9db93 | bellard | uint8_t dest, uint8_t dest_mode) |
445 | d592d303 | bellard | { |
446 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
447 | d3e9db93 | bellard | int i;
|
448 | d592d303 | bellard | |
449 | d592d303 | bellard | if (dest_mode == 0) { |
450 | d3e9db93 | bellard | if (dest == 0xff) { |
451 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, MAX_APIC_WORDS * sizeof(uint32_t)); |
452 | d3e9db93 | bellard | } else {
|
453 | 678e12cc | Gleb Natapov | int idx = apic_find_dest(dest);
|
454 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); |
455 | 678e12cc | Gleb Natapov | if (idx >= 0) |
456 | 678e12cc | Gleb Natapov | set_bit(deliver_bitmask, idx); |
457 | d3e9db93 | bellard | } |
458 | d592d303 | bellard | } else {
|
459 | d592d303 | bellard | /* XXX: cluster mode */
|
460 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); |
461 | d3e9db93 | bellard | for(i = 0; i < MAX_APICS; i++) { |
462 | d3e9db93 | bellard | apic_iter = local_apics[i]; |
463 | d3e9db93 | bellard | if (apic_iter) {
|
464 | d3e9db93 | bellard | if (apic_iter->dest_mode == 0xf) { |
465 | d3e9db93 | bellard | if (dest & apic_iter->log_dest)
|
466 | d3e9db93 | bellard | set_bit(deliver_bitmask, i); |
467 | d3e9db93 | bellard | } else if (apic_iter->dest_mode == 0x0) { |
468 | d3e9db93 | bellard | if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && |
469 | d3e9db93 | bellard | (dest & apic_iter->log_dest & 0x0f)) {
|
470 | d3e9db93 | bellard | set_bit(deliver_bitmask, i); |
471 | d3e9db93 | bellard | } |
472 | d3e9db93 | bellard | } |
473 | b538e53e | Alex Williamson | } else {
|
474 | b538e53e | Alex Williamson | break;
|
475 | d3e9db93 | bellard | } |
476 | d592d303 | bellard | } |
477 | d592d303 | bellard | } |
478 | d592d303 | bellard | } |
479 | d592d303 | bellard | |
480 | dae01685 | Jan Kiszka | static void apic_startup(APICCommonState *s, int vector_num) |
481 | e0fd8781 | bellard | { |
482 | b09ea7d5 | Gleb Natapov | s->sipi_vector = vector_num; |
483 | b09ea7d5 | Gleb Natapov | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); |
484 | b09ea7d5 | Gleb Natapov | } |
485 | b09ea7d5 | Gleb Natapov | |
486 | 92a16d7a | Blue Swirl | void apic_sipi(DeviceState *d)
|
487 | b09ea7d5 | Gleb Natapov | { |
488 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
489 | 92a16d7a | Blue Swirl | |
490 | 4a942cea | Blue Swirl | cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); |
491 | b09ea7d5 | Gleb Natapov | |
492 | b09ea7d5 | Gleb Natapov | if (!s->wait_for_sipi)
|
493 | e0fd8781 | bellard | return;
|
494 | 0e26b7b8 | Blue Swirl | cpu_x86_load_seg_cache_sipi(s->cpu_env, s->sipi_vector); |
495 | b09ea7d5 | Gleb Natapov | s->wait_for_sipi = 0;
|
496 | e0fd8781 | bellard | } |
497 | e0fd8781 | bellard | |
498 | 92a16d7a | Blue Swirl | static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, |
499 | d592d303 | bellard | uint8_t delivery_mode, uint8_t vector_num, |
500 | 1f6f408c | Jan Kiszka | uint8_t trigger_mode) |
501 | d592d303 | bellard | { |
502 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
503 | d3e9db93 | bellard | uint32_t deliver_bitmask[MAX_APIC_WORDS]; |
504 | d592d303 | bellard | int dest_shorthand = (s->icr[0] >> 18) & 3; |
505 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
506 | d592d303 | bellard | |
507 | e0fd8781 | bellard | switch (dest_shorthand) {
|
508 | d3e9db93 | bellard | case 0: |
509 | d3e9db93 | bellard | apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); |
510 | d3e9db93 | bellard | break;
|
511 | d3e9db93 | bellard | case 1: |
512 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask)); |
513 | 678e12cc | Gleb Natapov | set_bit(deliver_bitmask, s->idx); |
514 | d3e9db93 | bellard | break;
|
515 | d3e9db93 | bellard | case 2: |
516 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); |
517 | d3e9db93 | bellard | break;
|
518 | d3e9db93 | bellard | case 3: |
519 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); |
520 | 678e12cc | Gleb Natapov | reset_bit(deliver_bitmask, s->idx); |
521 | d3e9db93 | bellard | break;
|
522 | e0fd8781 | bellard | } |
523 | e0fd8781 | bellard | |
524 | d592d303 | bellard | switch (delivery_mode) {
|
525 | d592d303 | bellard | case APIC_DM_INIT:
|
526 | d592d303 | bellard | { |
527 | d592d303 | bellard | int trig_mode = (s->icr[0] >> 15) & 1; |
528 | d592d303 | bellard | int level = (s->icr[0] >> 14) & 1; |
529 | d592d303 | bellard | if (level == 0 && trig_mode == 1) { |
530 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
531 | d3e9db93 | bellard | apic_iter->arb_id = apic_iter->id ); |
532 | d592d303 | bellard | return;
|
533 | d592d303 | bellard | } |
534 | d592d303 | bellard | } |
535 | d592d303 | bellard | break;
|
536 | d592d303 | bellard | |
537 | d592d303 | bellard | case APIC_DM_SIPI:
|
538 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
539 | d3e9db93 | bellard | apic_startup(apic_iter, vector_num) ); |
540 | d592d303 | bellard | return;
|
541 | d592d303 | bellard | } |
542 | d592d303 | bellard | |
543 | 1f6f408c | Jan Kiszka | apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); |
544 | d592d303 | bellard | } |
545 | d592d303 | bellard | |
546 | 92a16d7a | Blue Swirl | int apic_get_interrupt(DeviceState *d)
|
547 | 574bbf7b | bellard | { |
548 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
549 | 574bbf7b | bellard | int intno;
|
550 | 574bbf7b | bellard | |
551 | 574bbf7b | bellard | /* if the APIC is installed or enabled, we let the 8259 handle the
|
552 | 574bbf7b | bellard | IRQs */
|
553 | 574bbf7b | bellard | if (!s)
|
554 | 574bbf7b | bellard | return -1; |
555 | 574bbf7b | bellard | if (!(s->spurious_vec & APIC_SV_ENABLE))
|
556 | 574bbf7b | bellard | return -1; |
557 | 3b46e624 | ths | |
558 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
559 | 0fbfbb59 | Gleb Natapov | intno = apic_irq_pending(s); |
560 | 0fbfbb59 | Gleb Natapov | |
561 | 0fbfbb59 | Gleb Natapov | if (intno == 0) { |
562 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
563 | 574bbf7b | bellard | return -1; |
564 | 0fbfbb59 | Gleb Natapov | } else if (intno < 0) { |
565 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
566 | d592d303 | bellard | return s->spurious_vec & 0xff; |
567 | 0fbfbb59 | Gleb Natapov | } |
568 | b4511723 | bellard | reset_bit(s->irr, intno); |
569 | 574bbf7b | bellard | set_bit(s->isr, intno); |
570 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
571 | 574bbf7b | bellard | apic_update_irq(s); |
572 | 574bbf7b | bellard | return intno;
|
573 | 574bbf7b | bellard | } |
574 | 574bbf7b | bellard | |
575 | 92a16d7a | Blue Swirl | int apic_accept_pic_intr(DeviceState *d)
|
576 | 0e21e12b | ths | { |
577 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
578 | 0e21e12b | ths | uint32_t lvt0; |
579 | 0e21e12b | ths | |
580 | 0e21e12b | ths | if (!s)
|
581 | 0e21e12b | ths | return -1; |
582 | 0e21e12b | ths | |
583 | 0e21e12b | ths | lvt0 = s->lvt[APIC_LVT_LINT0]; |
584 | 0e21e12b | ths | |
585 | a5b38b51 | aurel32 | if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) == 0 || |
586 | a5b38b51 | aurel32 | (lvt0 & APIC_LVT_MASKED) == 0)
|
587 | 0e21e12b | ths | return 1; |
588 | 0e21e12b | ths | |
589 | 0e21e12b | ths | return 0; |
590 | 0e21e12b | ths | } |
591 | 0e21e12b | ths | |
592 | dae01685 | Jan Kiszka | static uint32_t apic_get_current_count(APICCommonState *s)
|
593 | 574bbf7b | bellard | { |
594 | 574bbf7b | bellard | int64_t d; |
595 | 574bbf7b | bellard | uint32_t val; |
596 | 74475455 | Paolo Bonzini | d = (qemu_get_clock_ns(vm_clock) - s->initial_count_load_time) >> |
597 | 574bbf7b | bellard | s->count_shift; |
598 | 574bbf7b | bellard | if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) {
|
599 | 574bbf7b | bellard | /* periodic */
|
600 | d592d303 | bellard | val = s->initial_count - (d % ((uint64_t)s->initial_count + 1));
|
601 | 574bbf7b | bellard | } else {
|
602 | 574bbf7b | bellard | if (d >= s->initial_count)
|
603 | 574bbf7b | bellard | val = 0;
|
604 | 574bbf7b | bellard | else
|
605 | 574bbf7b | bellard | val = s->initial_count - d; |
606 | 574bbf7b | bellard | } |
607 | 574bbf7b | bellard | return val;
|
608 | 574bbf7b | bellard | } |
609 | 574bbf7b | bellard | |
610 | dae01685 | Jan Kiszka | static void apic_timer_update(APICCommonState *s, int64_t current_time) |
611 | 574bbf7b | bellard | { |
612 | 7a380ca3 | Jan Kiszka | if (apic_next_timer(s, current_time)) {
|
613 | 7a380ca3 | Jan Kiszka | qemu_mod_timer(s->timer, s->next_time); |
614 | 574bbf7b | bellard | } else {
|
615 | 574bbf7b | bellard | qemu_del_timer(s->timer); |
616 | 574bbf7b | bellard | } |
617 | 574bbf7b | bellard | } |
618 | 574bbf7b | bellard | |
619 | 574bbf7b | bellard | static void apic_timer(void *opaque) |
620 | 574bbf7b | bellard | { |
621 | dae01685 | Jan Kiszka | APICCommonState *s = opaque; |
622 | 574bbf7b | bellard | |
623 | cf6d64bf | Blue Swirl | apic_local_deliver(s, APIC_LVT_TIMER); |
624 | 574bbf7b | bellard | apic_timer_update(s, s->next_time); |
625 | 574bbf7b | bellard | } |
626 | 574bbf7b | bellard | |
627 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readb(void *opaque, target_phys_addr_t addr) |
628 | 574bbf7b | bellard | { |
629 | 574bbf7b | bellard | return 0; |
630 | 574bbf7b | bellard | } |
631 | 574bbf7b | bellard | |
632 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readw(void *opaque, target_phys_addr_t addr) |
633 | 574bbf7b | bellard | { |
634 | 574bbf7b | bellard | return 0; |
635 | 574bbf7b | bellard | } |
636 | 574bbf7b | bellard | |
637 | c227f099 | Anthony Liguori | static void apic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
638 | 574bbf7b | bellard | { |
639 | 574bbf7b | bellard | } |
640 | 574bbf7b | bellard | |
641 | c227f099 | Anthony Liguori | static void apic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) |
642 | 574bbf7b | bellard | { |
643 | 574bbf7b | bellard | } |
644 | 574bbf7b | bellard | |
645 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) |
646 | 574bbf7b | bellard | { |
647 | 92a16d7a | Blue Swirl | DeviceState *d; |
648 | dae01685 | Jan Kiszka | APICCommonState *s; |
649 | 574bbf7b | bellard | uint32_t val; |
650 | 574bbf7b | bellard | int index;
|
651 | 574bbf7b | bellard | |
652 | 92a16d7a | Blue Swirl | d = cpu_get_current_apic(); |
653 | 92a16d7a | Blue Swirl | if (!d) {
|
654 | 574bbf7b | bellard | return 0; |
655 | 0e26b7b8 | Blue Swirl | } |
656 | dae01685 | Jan Kiszka | s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
657 | 574bbf7b | bellard | |
658 | 574bbf7b | bellard | index = (addr >> 4) & 0xff; |
659 | 574bbf7b | bellard | switch(index) {
|
660 | 574bbf7b | bellard | case 0x02: /* id */ |
661 | 574bbf7b | bellard | val = s->id << 24;
|
662 | 574bbf7b | bellard | break;
|
663 | 574bbf7b | bellard | case 0x03: /* version */ |
664 | 574bbf7b | bellard | val = 0x11 | ((APIC_LVT_NB - 1) << 16); /* version 0x11 */ |
665 | 574bbf7b | bellard | break;
|
666 | 574bbf7b | bellard | case 0x08: |
667 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
668 | e5ad936b | Jan Kiszka | if (apic_report_tpr_access) {
|
669 | e5ad936b | Jan Kiszka | cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_READ); |
670 | e5ad936b | Jan Kiszka | } |
671 | 574bbf7b | bellard | val = s->tpr; |
672 | 574bbf7b | bellard | break;
|
673 | d592d303 | bellard | case 0x09: |
674 | d592d303 | bellard | val = apic_get_arb_pri(s); |
675 | d592d303 | bellard | break;
|
676 | 574bbf7b | bellard | case 0x0a: |
677 | 574bbf7b | bellard | /* ppr */
|
678 | 574bbf7b | bellard | val = apic_get_ppr(s); |
679 | 574bbf7b | bellard | break;
|
680 | b237db36 | aurel32 | case 0x0b: |
681 | b237db36 | aurel32 | val = 0;
|
682 | b237db36 | aurel32 | break;
|
683 | d592d303 | bellard | case 0x0d: |
684 | d592d303 | bellard | val = s->log_dest << 24;
|
685 | d592d303 | bellard | break;
|
686 | d592d303 | bellard | case 0x0e: |
687 | d592d303 | bellard | val = s->dest_mode << 28;
|
688 | d592d303 | bellard | break;
|
689 | 574bbf7b | bellard | case 0x0f: |
690 | 574bbf7b | bellard | val = s->spurious_vec; |
691 | 574bbf7b | bellard | break;
|
692 | 574bbf7b | bellard | case 0x10 ... 0x17: |
693 | 574bbf7b | bellard | val = s->isr[index & 7];
|
694 | 574bbf7b | bellard | break;
|
695 | 574bbf7b | bellard | case 0x18 ... 0x1f: |
696 | 574bbf7b | bellard | val = s->tmr[index & 7];
|
697 | 574bbf7b | bellard | break;
|
698 | 574bbf7b | bellard | case 0x20 ... 0x27: |
699 | 574bbf7b | bellard | val = s->irr[index & 7];
|
700 | 574bbf7b | bellard | break;
|
701 | 574bbf7b | bellard | case 0x28: |
702 | 574bbf7b | bellard | val = s->esr; |
703 | 574bbf7b | bellard | break;
|
704 | 574bbf7b | bellard | case 0x30: |
705 | 574bbf7b | bellard | case 0x31: |
706 | 574bbf7b | bellard | val = s->icr[index & 1];
|
707 | 574bbf7b | bellard | break;
|
708 | e0fd8781 | bellard | case 0x32 ... 0x37: |
709 | e0fd8781 | bellard | val = s->lvt[index - 0x32];
|
710 | e0fd8781 | bellard | break;
|
711 | 574bbf7b | bellard | case 0x38: |
712 | 574bbf7b | bellard | val = s->initial_count; |
713 | 574bbf7b | bellard | break;
|
714 | 574bbf7b | bellard | case 0x39: |
715 | 574bbf7b | bellard | val = apic_get_current_count(s); |
716 | 574bbf7b | bellard | break;
|
717 | 574bbf7b | bellard | case 0x3e: |
718 | 574bbf7b | bellard | val = s->divide_conf; |
719 | 574bbf7b | bellard | break;
|
720 | 574bbf7b | bellard | default:
|
721 | 574bbf7b | bellard | s->esr |= ESR_ILLEGAL_ADDRESS; |
722 | 574bbf7b | bellard | val = 0;
|
723 | 574bbf7b | bellard | break;
|
724 | 574bbf7b | bellard | } |
725 | d8023f31 | Blue Swirl | trace_apic_mem_readl(addr, val); |
726 | 574bbf7b | bellard | return val;
|
727 | 574bbf7b | bellard | } |
728 | 574bbf7b | bellard | |
729 | f5095c63 | Andreas Färber | static void apic_send_msi(target_phys_addr_t addr, uint32_t data) |
730 | 54c96da7 | Michael S. Tsirkin | { |
731 | 54c96da7 | Michael S. Tsirkin | uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
732 | 54c96da7 | Michael S. Tsirkin | uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
733 | 54c96da7 | Michael S. Tsirkin | uint8_t dest_mode = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1;
|
734 | 54c96da7 | Michael S. Tsirkin | uint8_t trigger_mode = (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1;
|
735 | 54c96da7 | Michael S. Tsirkin | uint8_t delivery = (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7;
|
736 | 54c96da7 | Michael S. Tsirkin | /* XXX: Ignore redirection hint. */
|
737 | 1f6f408c | Jan Kiszka | apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); |
738 | 54c96da7 | Michael S. Tsirkin | } |
739 | 54c96da7 | Michael S. Tsirkin | |
740 | c227f099 | Anthony Liguori | static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) |
741 | 574bbf7b | bellard | { |
742 | 92a16d7a | Blue Swirl | DeviceState *d; |
743 | dae01685 | Jan Kiszka | APICCommonState *s; |
744 | 54c96da7 | Michael S. Tsirkin | int index = (addr >> 4) & 0xff; |
745 | 54c96da7 | Michael S. Tsirkin | if (addr > 0xfff || !index) { |
746 | 54c96da7 | Michael S. Tsirkin | /* MSI and MMIO APIC are at the same memory location,
|
747 | 54c96da7 | Michael S. Tsirkin | * but actually not on the global bus: MSI is on PCI bus
|
748 | 54c96da7 | Michael S. Tsirkin | * APIC is connected directly to the CPU.
|
749 | 54c96da7 | Michael S. Tsirkin | * Mapping them on the global bus happens to work because
|
750 | 54c96da7 | Michael S. Tsirkin | * MSI registers are reserved in APIC MMIO and vice versa. */
|
751 | 54c96da7 | Michael S. Tsirkin | apic_send_msi(addr, val); |
752 | 54c96da7 | Michael S. Tsirkin | return;
|
753 | 54c96da7 | Michael S. Tsirkin | } |
754 | 574bbf7b | bellard | |
755 | 92a16d7a | Blue Swirl | d = cpu_get_current_apic(); |
756 | 92a16d7a | Blue Swirl | if (!d) {
|
757 | 574bbf7b | bellard | return;
|
758 | 0e26b7b8 | Blue Swirl | } |
759 | dae01685 | Jan Kiszka | s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
760 | 574bbf7b | bellard | |
761 | d8023f31 | Blue Swirl | trace_apic_mem_writel(addr, val); |
762 | 574bbf7b | bellard | |
763 | 574bbf7b | bellard | switch(index) {
|
764 | 574bbf7b | bellard | case 0x02: |
765 | 574bbf7b | bellard | s->id = (val >> 24);
|
766 | 574bbf7b | bellard | break;
|
767 | e0fd8781 | bellard | case 0x03: |
768 | e0fd8781 | bellard | break;
|
769 | 574bbf7b | bellard | case 0x08: |
770 | e5ad936b | Jan Kiszka | if (apic_report_tpr_access) {
|
771 | e5ad936b | Jan Kiszka | cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_WRITE); |
772 | e5ad936b | Jan Kiszka | } |
773 | 574bbf7b | bellard | s->tpr = val; |
774 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
775 | d592d303 | bellard | apic_update_irq(s); |
776 | 574bbf7b | bellard | break;
|
777 | e0fd8781 | bellard | case 0x09: |
778 | e0fd8781 | bellard | case 0x0a: |
779 | e0fd8781 | bellard | break;
|
780 | 574bbf7b | bellard | case 0x0b: /* EOI */ |
781 | 574bbf7b | bellard | apic_eoi(s); |
782 | 574bbf7b | bellard | break;
|
783 | d592d303 | bellard | case 0x0d: |
784 | d592d303 | bellard | s->log_dest = val >> 24;
|
785 | d592d303 | bellard | break;
|
786 | d592d303 | bellard | case 0x0e: |
787 | d592d303 | bellard | s->dest_mode = val >> 28;
|
788 | d592d303 | bellard | break;
|
789 | 574bbf7b | bellard | case 0x0f: |
790 | 574bbf7b | bellard | s->spurious_vec = val & 0x1ff;
|
791 | d592d303 | bellard | apic_update_irq(s); |
792 | 574bbf7b | bellard | break;
|
793 | e0fd8781 | bellard | case 0x10 ... 0x17: |
794 | e0fd8781 | bellard | case 0x18 ... 0x1f: |
795 | e0fd8781 | bellard | case 0x20 ... 0x27: |
796 | e0fd8781 | bellard | case 0x28: |
797 | e0fd8781 | bellard | break;
|
798 | 574bbf7b | bellard | case 0x30: |
799 | d592d303 | bellard | s->icr[0] = val;
|
800 | 92a16d7a | Blue Swirl | apic_deliver(d, (s->icr[1] >> 24) & 0xff, (s->icr[0] >> 11) & 1, |
801 | d592d303 | bellard | (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), |
802 | 1f6f408c | Jan Kiszka | (s->icr[0] >> 15) & 1); |
803 | d592d303 | bellard | break;
|
804 | 574bbf7b | bellard | case 0x31: |
805 | d592d303 | bellard | s->icr[1] = val;
|
806 | 574bbf7b | bellard | break;
|
807 | 574bbf7b | bellard | case 0x32 ... 0x37: |
808 | 574bbf7b | bellard | { |
809 | 574bbf7b | bellard | int n = index - 0x32; |
810 | 574bbf7b | bellard | s->lvt[n] = val; |
811 | 574bbf7b | bellard | if (n == APIC_LVT_TIMER)
|
812 | 74475455 | Paolo Bonzini | apic_timer_update(s, qemu_get_clock_ns(vm_clock)); |
813 | 574bbf7b | bellard | } |
814 | 574bbf7b | bellard | break;
|
815 | 574bbf7b | bellard | case 0x38: |
816 | 574bbf7b | bellard | s->initial_count = val; |
817 | 74475455 | Paolo Bonzini | s->initial_count_load_time = qemu_get_clock_ns(vm_clock); |
818 | 574bbf7b | bellard | apic_timer_update(s, s->initial_count_load_time); |
819 | 574bbf7b | bellard | break;
|
820 | e0fd8781 | bellard | case 0x39: |
821 | e0fd8781 | bellard | break;
|
822 | 574bbf7b | bellard | case 0x3e: |
823 | 574bbf7b | bellard | { |
824 | 574bbf7b | bellard | int v;
|
825 | 574bbf7b | bellard | s->divide_conf = val & 0xb;
|
826 | 574bbf7b | bellard | v = (s->divide_conf & 3) | ((s->divide_conf >> 1) & 4); |
827 | 574bbf7b | bellard | s->count_shift = (v + 1) & 7; |
828 | 574bbf7b | bellard | } |
829 | 574bbf7b | bellard | break;
|
830 | 574bbf7b | bellard | default:
|
831 | 574bbf7b | bellard | s->esr |= ESR_ILLEGAL_ADDRESS; |
832 | 574bbf7b | bellard | break;
|
833 | 574bbf7b | bellard | } |
834 | 574bbf7b | bellard | } |
835 | 574bbf7b | bellard | |
836 | e5ad936b | Jan Kiszka | static void apic_pre_save(APICCommonState *s) |
837 | e5ad936b | Jan Kiszka | { |
838 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
839 | e5ad936b | Jan Kiszka | } |
840 | e5ad936b | Jan Kiszka | |
841 | 7a380ca3 | Jan Kiszka | static void apic_post_load(APICCommonState *s) |
842 | 7a380ca3 | Jan Kiszka | { |
843 | 7a380ca3 | Jan Kiszka | if (s->timer_expiry != -1) { |
844 | 7a380ca3 | Jan Kiszka | qemu_mod_timer(s->timer, s->timer_expiry); |
845 | 7a380ca3 | Jan Kiszka | } else {
|
846 | 7a380ca3 | Jan Kiszka | qemu_del_timer(s->timer); |
847 | 7a380ca3 | Jan Kiszka | } |
848 | 7a380ca3 | Jan Kiszka | } |
849 | 7a380ca3 | Jan Kiszka | |
850 | 312b4234 | Avi Kivity | static const MemoryRegionOps apic_io_ops = { |
851 | 312b4234 | Avi Kivity | .old_mmio = { |
852 | 312b4234 | Avi Kivity | .read = { apic_mem_readb, apic_mem_readw, apic_mem_readl, }, |
853 | 312b4234 | Avi Kivity | .write = { apic_mem_writeb, apic_mem_writew, apic_mem_writel, }, |
854 | 312b4234 | Avi Kivity | }, |
855 | 312b4234 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
856 | 574bbf7b | bellard | }; |
857 | 574bbf7b | bellard | |
858 | dae01685 | Jan Kiszka | static void apic_init(APICCommonState *s) |
859 | 8546b099 | Blue Swirl | { |
860 | dae01685 | Jan Kiszka | memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic-msi",
|
861 | dae01685 | Jan Kiszka | MSI_SPACE_SIZE); |
862 | 8546b099 | Blue Swirl | |
863 | 74475455 | Paolo Bonzini | s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s); |
864 | 8546b099 | Blue Swirl | local_apics[s->idx] = s; |
865 | 8546b099 | Blue Swirl | } |
866 | 8546b099 | Blue Swirl | |
867 | 999e12bb | Anthony Liguori | static void apic_class_init(ObjectClass *klass, void *data) |
868 | 999e12bb | Anthony Liguori | { |
869 | 999e12bb | Anthony Liguori | APICCommonClass *k = APIC_COMMON_CLASS(klass); |
870 | 999e12bb | Anthony Liguori | |
871 | 999e12bb | Anthony Liguori | k->init = apic_init; |
872 | 999e12bb | Anthony Liguori | k->set_base = apic_set_base; |
873 | 999e12bb | Anthony Liguori | k->set_tpr = apic_set_tpr; |
874 | e5ad936b | Jan Kiszka | k->get_tpr = apic_get_tpr; |
875 | e5ad936b | Jan Kiszka | k->vapic_base_update = apic_vapic_base_update; |
876 | 999e12bb | Anthony Liguori | k->external_nmi = apic_external_nmi; |
877 | e5ad936b | Jan Kiszka | k->pre_save = apic_pre_save; |
878 | 999e12bb | Anthony Liguori | k->post_load = apic_post_load; |
879 | 999e12bb | Anthony Liguori | } |
880 | 999e12bb | Anthony Liguori | |
881 | 39bffca2 | Anthony Liguori | static TypeInfo apic_info = {
|
882 | 39bffca2 | Anthony Liguori | .name = "apic",
|
883 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(APICCommonState),
|
884 | 39bffca2 | Anthony Liguori | .parent = TYPE_APIC_COMMON, |
885 | 39bffca2 | Anthony Liguori | .class_init = apic_class_init, |
886 | 8546b099 | Blue Swirl | }; |
887 | 8546b099 | Blue Swirl | |
888 | 83f7d43a | Andreas Färber | static void apic_register_types(void) |
889 | 8546b099 | Blue Swirl | { |
890 | 39bffca2 | Anthony Liguori | type_register_static(&apic_info); |
891 | 8546b099 | Blue Swirl | } |
892 | 8546b099 | Blue Swirl | |
893 | 83f7d43a | Andreas Färber | type_init(apic_register_types) |