root / hw / milkymist-vgafb.c @ 03f48b07
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1 | d23948b1 | Michael Walle | |
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2 | d23948b1 | Michael Walle | /*
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3 | d23948b1 | Michael Walle | * QEMU model of the Milkymist VGA framebuffer.
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4 | d23948b1 | Michael Walle | *
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5 | d23948b1 | Michael Walle | * Copyright (c) 2010 Michael Walle <michael@walle.cc>
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6 | d23948b1 | Michael Walle | *
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7 | d23948b1 | Michael Walle | * This library is free software; you can redistribute it and/or
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8 | d23948b1 | Michael Walle | * modify it under the terms of the GNU Lesser General Public
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9 | d23948b1 | Michael Walle | * License as published by the Free Software Foundation; either
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10 | d23948b1 | Michael Walle | * version 2 of the License, or (at your option) any later version.
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11 | d23948b1 | Michael Walle | *
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12 | d23948b1 | Michael Walle | * This library is distributed in the hope that it will be useful,
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13 | d23948b1 | Michael Walle | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | d23948b1 | Michael Walle | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | d23948b1 | Michael Walle | * Lesser General Public License for more details.
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16 | d23948b1 | Michael Walle | *
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17 | d23948b1 | Michael Walle | * You should have received a copy of the GNU Lesser General Public
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18 | d23948b1 | Michael Walle | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | d23948b1 | Michael Walle | *
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20 | d23948b1 | Michael Walle | *
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21 | d23948b1 | Michael Walle | * Specification available at:
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22 | d23948b1 | Michael Walle | * http://www.milkymist.org/socdoc/vgafb.pdf
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23 | d23948b1 | Michael Walle | */
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24 | d23948b1 | Michael Walle | |
25 | d23948b1 | Michael Walle | #include "hw.h" |
26 | d23948b1 | Michael Walle | #include "sysbus.h" |
27 | d23948b1 | Michael Walle | #include "trace.h" |
28 | d23948b1 | Michael Walle | #include "console.h" |
29 | d23948b1 | Michael Walle | #include "framebuffer.h" |
30 | d23948b1 | Michael Walle | #include "pixel_ops.h" |
31 | d23948b1 | Michael Walle | #include "qemu-error.h" |
32 | d23948b1 | Michael Walle | |
33 | d23948b1 | Michael Walle | #define BITS 8 |
34 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
35 | d23948b1 | Michael Walle | #define BITS 15 |
36 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
37 | d23948b1 | Michael Walle | #define BITS 16 |
38 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
39 | d23948b1 | Michael Walle | #define BITS 24 |
40 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
41 | d23948b1 | Michael Walle | #define BITS 32 |
42 | d23948b1 | Michael Walle | #include "milkymist-vgafb_template.h" |
43 | d23948b1 | Michael Walle | |
44 | d23948b1 | Michael Walle | enum {
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45 | d23948b1 | Michael Walle | R_CTRL = 0,
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46 | d23948b1 | Michael Walle | R_HRES, |
47 | d23948b1 | Michael Walle | R_HSYNC_START, |
48 | d23948b1 | Michael Walle | R_HSYNC_END, |
49 | d23948b1 | Michael Walle | R_HSCAN, |
50 | d23948b1 | Michael Walle | R_VRES, |
51 | d23948b1 | Michael Walle | R_VSYNC_START, |
52 | d23948b1 | Michael Walle | R_VSYNC_END, |
53 | d23948b1 | Michael Walle | R_VSCAN, |
54 | d23948b1 | Michael Walle | R_BASEADDRESS, |
55 | d23948b1 | Michael Walle | R_BASEADDRESS_ACT, |
56 | d23948b1 | Michael Walle | R_BURST_COUNT, |
57 | d23948b1 | Michael Walle | R_SOURCE_CLOCK, |
58 | d23948b1 | Michael Walle | R_MAX |
59 | d23948b1 | Michael Walle | }; |
60 | d23948b1 | Michael Walle | |
61 | d23948b1 | Michael Walle | enum {
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62 | d23948b1 | Michael Walle | CTRL_RESET = (1<<0), |
63 | d23948b1 | Michael Walle | }; |
64 | d23948b1 | Michael Walle | |
65 | d23948b1 | Michael Walle | struct MilkymistVgafbState {
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66 | d23948b1 | Michael Walle | SysBusDevice busdev; |
67 | 883abf8d | Michael Walle | MemoryRegion regs_region; |
68 | d23948b1 | Michael Walle | DisplayState *ds; |
69 | d23948b1 | Michael Walle | |
70 | d23948b1 | Michael Walle | int invalidate;
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71 | d23948b1 | Michael Walle | uint32_t fb_offset; |
72 | d23948b1 | Michael Walle | uint32_t fb_mask; |
73 | d23948b1 | Michael Walle | |
74 | d23948b1 | Michael Walle | uint32_t regs[R_MAX]; |
75 | d23948b1 | Michael Walle | }; |
76 | d23948b1 | Michael Walle | typedef struct MilkymistVgafbState MilkymistVgafbState; |
77 | d23948b1 | Michael Walle | |
78 | d23948b1 | Michael Walle | static int vgafb_enabled(MilkymistVgafbState *s) |
79 | d23948b1 | Michael Walle | { |
80 | d23948b1 | Michael Walle | return !(s->regs[R_CTRL] & CTRL_RESET);
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81 | d23948b1 | Michael Walle | } |
82 | d23948b1 | Michael Walle | |
83 | d23948b1 | Michael Walle | static void vgafb_update_display(void *opaque) |
84 | d23948b1 | Michael Walle | { |
85 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
86 | d23948b1 | Michael Walle | int first = 0; |
87 | d23948b1 | Michael Walle | int last = 0; |
88 | d23948b1 | Michael Walle | drawfn fn; |
89 | d23948b1 | Michael Walle | |
90 | d23948b1 | Michael Walle | if (!vgafb_enabled(s)) {
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91 | d23948b1 | Michael Walle | return;
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92 | d23948b1 | Michael Walle | } |
93 | d23948b1 | Michael Walle | |
94 | d23948b1 | Michael Walle | int dest_width = s->regs[R_HRES];
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95 | d23948b1 | Michael Walle | |
96 | d23948b1 | Michael Walle | switch (ds_get_bits_per_pixel(s->ds)) {
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97 | d23948b1 | Michael Walle | case 0: |
98 | d23948b1 | Michael Walle | return;
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99 | d23948b1 | Michael Walle | case 8: |
100 | d23948b1 | Michael Walle | fn = draw_line_8; |
101 | d23948b1 | Michael Walle | break;
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102 | d23948b1 | Michael Walle | case 15: |
103 | d23948b1 | Michael Walle | fn = draw_line_15; |
104 | d23948b1 | Michael Walle | dest_width *= 2;
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105 | d23948b1 | Michael Walle | break;
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106 | d23948b1 | Michael Walle | case 16: |
107 | d23948b1 | Michael Walle | fn = draw_line_16; |
108 | d23948b1 | Michael Walle | dest_width *= 2;
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109 | d23948b1 | Michael Walle | break;
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110 | d23948b1 | Michael Walle | case 24: |
111 | d23948b1 | Michael Walle | fn = draw_line_24; |
112 | d23948b1 | Michael Walle | dest_width *= 3;
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113 | d23948b1 | Michael Walle | break;
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114 | d23948b1 | Michael Walle | case 32: |
115 | d23948b1 | Michael Walle | fn = draw_line_32; |
116 | d23948b1 | Michael Walle | dest_width *= 4;
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117 | d23948b1 | Michael Walle | break;
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118 | d23948b1 | Michael Walle | default:
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119 | d23948b1 | Michael Walle | hw_error("milkymist_vgafb: bad color depth\n");
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120 | d23948b1 | Michael Walle | break;
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121 | d23948b1 | Michael Walle | } |
122 | d23948b1 | Michael Walle | |
123 | 75c9d6c2 | Avi Kivity | framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev), |
124 | d23948b1 | Michael Walle | s->regs[R_BASEADDRESS] + s->fb_offset, |
125 | d23948b1 | Michael Walle | s->regs[R_HRES], |
126 | d23948b1 | Michael Walle | s->regs[R_VRES], |
127 | d23948b1 | Michael Walle | s->regs[R_HRES] * 2,
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128 | d23948b1 | Michael Walle | dest_width, |
129 | d23948b1 | Michael Walle | 0,
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130 | d23948b1 | Michael Walle | s->invalidate, |
131 | d23948b1 | Michael Walle | fn, |
132 | d23948b1 | Michael Walle | NULL,
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133 | d23948b1 | Michael Walle | &first, &last); |
134 | d23948b1 | Michael Walle | |
135 | d23948b1 | Michael Walle | if (first >= 0) { |
136 | d23948b1 | Michael Walle | dpy_update(s->ds, 0, first, s->regs[R_HRES], last - first + 1); |
137 | d23948b1 | Michael Walle | } |
138 | d23948b1 | Michael Walle | s->invalidate = 0;
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139 | d23948b1 | Michael Walle | } |
140 | d23948b1 | Michael Walle | |
141 | d23948b1 | Michael Walle | static void vgafb_invalidate_display(void *opaque) |
142 | d23948b1 | Michael Walle | { |
143 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
144 | d23948b1 | Michael Walle | s->invalidate = 1;
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145 | d23948b1 | Michael Walle | } |
146 | d23948b1 | Michael Walle | |
147 | d23948b1 | Michael Walle | static void vgafb_resize(MilkymistVgafbState *s) |
148 | d23948b1 | Michael Walle | { |
149 | d23948b1 | Michael Walle | if (!vgafb_enabled(s)) {
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150 | d23948b1 | Michael Walle | return;
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151 | d23948b1 | Michael Walle | } |
152 | d23948b1 | Michael Walle | |
153 | d23948b1 | Michael Walle | qemu_console_resize(s->ds, s->regs[R_HRES], s->regs[R_VRES]); |
154 | d23948b1 | Michael Walle | s->invalidate = 1;
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155 | d23948b1 | Michael Walle | } |
156 | d23948b1 | Michael Walle | |
157 | 883abf8d | Michael Walle | static uint64_t vgafb_read(void *opaque, target_phys_addr_t addr, |
158 | 883abf8d | Michael Walle | unsigned size)
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159 | d23948b1 | Michael Walle | { |
160 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
161 | d23948b1 | Michael Walle | uint32_t r = 0;
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162 | d23948b1 | Michael Walle | |
163 | d23948b1 | Michael Walle | addr >>= 2;
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164 | d23948b1 | Michael Walle | switch (addr) {
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165 | d23948b1 | Michael Walle | case R_CTRL:
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166 | d23948b1 | Michael Walle | case R_HRES:
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167 | d23948b1 | Michael Walle | case R_HSYNC_START:
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168 | d23948b1 | Michael Walle | case R_HSYNC_END:
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169 | d23948b1 | Michael Walle | case R_HSCAN:
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170 | d23948b1 | Michael Walle | case R_VRES:
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171 | d23948b1 | Michael Walle | case R_VSYNC_START:
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172 | d23948b1 | Michael Walle | case R_VSYNC_END:
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173 | d23948b1 | Michael Walle | case R_VSCAN:
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174 | d23948b1 | Michael Walle | case R_BASEADDRESS:
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175 | d23948b1 | Michael Walle | case R_BURST_COUNT:
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176 | d23948b1 | Michael Walle | case R_SOURCE_CLOCK:
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177 | d23948b1 | Michael Walle | r = s->regs[addr]; |
178 | d23948b1 | Michael Walle | break;
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179 | d23948b1 | Michael Walle | case R_BASEADDRESS_ACT:
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180 | d23948b1 | Michael Walle | r = s->regs[R_BASEADDRESS]; |
181 | d23948b1 | Michael Walle | break;
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182 | d23948b1 | Michael Walle | |
183 | d23948b1 | Michael Walle | default:
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184 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: read access to unknown register 0x"
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185 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
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186 | d23948b1 | Michael Walle | break;
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187 | d23948b1 | Michael Walle | } |
188 | d23948b1 | Michael Walle | |
189 | d23948b1 | Michael Walle | trace_milkymist_vgafb_memory_read(addr << 2, r);
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190 | d23948b1 | Michael Walle | |
191 | d23948b1 | Michael Walle | return r;
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192 | d23948b1 | Michael Walle | } |
193 | d23948b1 | Michael Walle | |
194 | 883abf8d | Michael Walle | static void vgafb_write(void *opaque, target_phys_addr_t addr, uint64_t value, |
195 | 883abf8d | Michael Walle | unsigned size)
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196 | d23948b1 | Michael Walle | { |
197 | d23948b1 | Michael Walle | MilkymistVgafbState *s = opaque; |
198 | d23948b1 | Michael Walle | |
199 | d23948b1 | Michael Walle | trace_milkymist_vgafb_memory_write(addr, value); |
200 | d23948b1 | Michael Walle | |
201 | d23948b1 | Michael Walle | addr >>= 2;
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202 | d23948b1 | Michael Walle | switch (addr) {
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203 | d23948b1 | Michael Walle | case R_CTRL:
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204 | c07050dd | Michael Walle | s->regs[addr] = value; |
205 | c07050dd | Michael Walle | vgafb_resize(s); |
206 | c07050dd | Michael Walle | break;
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207 | d23948b1 | Michael Walle | case R_HSYNC_START:
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208 | d23948b1 | Michael Walle | case R_HSYNC_END:
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209 | d23948b1 | Michael Walle | case R_HSCAN:
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210 | d23948b1 | Michael Walle | case R_VSYNC_START:
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211 | d23948b1 | Michael Walle | case R_VSYNC_END:
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212 | d23948b1 | Michael Walle | case R_VSCAN:
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213 | d23948b1 | Michael Walle | case R_BURST_COUNT:
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214 | d23948b1 | Michael Walle | case R_SOURCE_CLOCK:
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215 | d23948b1 | Michael Walle | s->regs[addr] = value; |
216 | d23948b1 | Michael Walle | break;
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217 | d23948b1 | Michael Walle | case R_BASEADDRESS:
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218 | d23948b1 | Michael Walle | if (value & 0x1f) { |
219 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: framebuffer base address have to "
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220 | d23948b1 | Michael Walle | "be 32 byte aligned");
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221 | d23948b1 | Michael Walle | break;
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222 | d23948b1 | Michael Walle | } |
223 | d23948b1 | Michael Walle | s->regs[addr] = value & s->fb_mask; |
224 | d23948b1 | Michael Walle | s->invalidate = 1;
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225 | d23948b1 | Michael Walle | break;
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226 | d23948b1 | Michael Walle | case R_HRES:
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227 | d23948b1 | Michael Walle | case R_VRES:
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228 | d23948b1 | Michael Walle | s->regs[addr] = value; |
229 | d23948b1 | Michael Walle | vgafb_resize(s); |
230 | d23948b1 | Michael Walle | break;
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231 | d23948b1 | Michael Walle | case R_BASEADDRESS_ACT:
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232 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: write to read-only register 0x"
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233 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
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234 | d23948b1 | Michael Walle | break;
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235 | d23948b1 | Michael Walle | |
236 | d23948b1 | Michael Walle | default:
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237 | d23948b1 | Michael Walle | error_report("milkymist_vgafb: write access to unknown register 0x"
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238 | d23948b1 | Michael Walle | TARGET_FMT_plx, addr << 2);
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239 | d23948b1 | Michael Walle | break;
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240 | d23948b1 | Michael Walle | } |
241 | d23948b1 | Michael Walle | } |
242 | d23948b1 | Michael Walle | |
243 | 883abf8d | Michael Walle | static const MemoryRegionOps vgafb_mmio_ops = { |
244 | 883abf8d | Michael Walle | .read = vgafb_read, |
245 | 883abf8d | Michael Walle | .write = vgafb_write, |
246 | 883abf8d | Michael Walle | .valid = { |
247 | 883abf8d | Michael Walle | .min_access_size = 4,
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248 | 883abf8d | Michael Walle | .max_access_size = 4,
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249 | 883abf8d | Michael Walle | }, |
250 | 883abf8d | Michael Walle | .endianness = DEVICE_NATIVE_ENDIAN, |
251 | d23948b1 | Michael Walle | }; |
252 | d23948b1 | Michael Walle | |
253 | d23948b1 | Michael Walle | static void milkymist_vgafb_reset(DeviceState *d) |
254 | d23948b1 | Michael Walle | { |
255 | d23948b1 | Michael Walle | MilkymistVgafbState *s = container_of(d, MilkymistVgafbState, busdev.qdev); |
256 | d23948b1 | Michael Walle | int i;
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257 | d23948b1 | Michael Walle | |
258 | d23948b1 | Michael Walle | for (i = 0; i < R_MAX; i++) { |
259 | d23948b1 | Michael Walle | s->regs[i] = 0;
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260 | d23948b1 | Michael Walle | } |
261 | d23948b1 | Michael Walle | |
262 | d23948b1 | Michael Walle | /* defaults */
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263 | d23948b1 | Michael Walle | s->regs[R_CTRL] = CTRL_RESET; |
264 | d23948b1 | Michael Walle | s->regs[R_HRES] = 640;
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265 | d23948b1 | Michael Walle | s->regs[R_VRES] = 480;
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266 | d23948b1 | Michael Walle | s->regs[R_BASEADDRESS] = 0;
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267 | d23948b1 | Michael Walle | } |
268 | d23948b1 | Michael Walle | |
269 | d23948b1 | Michael Walle | static int milkymist_vgafb_init(SysBusDevice *dev) |
270 | d23948b1 | Michael Walle | { |
271 | d23948b1 | Michael Walle | MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev); |
272 | d23948b1 | Michael Walle | |
273 | 883abf8d | Michael Walle | memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s, |
274 | 883abf8d | Michael Walle | "milkymist-vgafb", R_MAX * 4); |
275 | 750ecd44 | Avi Kivity | sysbus_init_mmio(dev, &s->regs_region); |
276 | d23948b1 | Michael Walle | |
277 | d23948b1 | Michael Walle | s->ds = graphic_console_init(vgafb_update_display, |
278 | d23948b1 | Michael Walle | vgafb_invalidate_display, |
279 | d23948b1 | Michael Walle | NULL, NULL, s); |
280 | d23948b1 | Michael Walle | |
281 | d23948b1 | Michael Walle | return 0; |
282 | d23948b1 | Michael Walle | } |
283 | d23948b1 | Michael Walle | |
284 | d23948b1 | Michael Walle | static int vgafb_post_load(void *opaque, int version_id) |
285 | d23948b1 | Michael Walle | { |
286 | d23948b1 | Michael Walle | vgafb_invalidate_display(opaque); |
287 | d23948b1 | Michael Walle | return 0; |
288 | d23948b1 | Michael Walle | } |
289 | d23948b1 | Michael Walle | |
290 | d23948b1 | Michael Walle | static const VMStateDescription vmstate_milkymist_vgafb = { |
291 | d23948b1 | Michael Walle | .name = "milkymist-vgafb",
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292 | d23948b1 | Michael Walle | .version_id = 1,
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293 | d23948b1 | Michael Walle | .minimum_version_id = 1,
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294 | d23948b1 | Michael Walle | .minimum_version_id_old = 1,
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295 | d23948b1 | Michael Walle | .post_load = vgafb_post_load, |
296 | d23948b1 | Michael Walle | .fields = (VMStateField[]) { |
297 | d23948b1 | Michael Walle | VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX), |
298 | d23948b1 | Michael Walle | VMSTATE_END_OF_LIST() |
299 | d23948b1 | Michael Walle | } |
300 | d23948b1 | Michael Walle | }; |
301 | d23948b1 | Michael Walle | |
302 | 999e12bb | Anthony Liguori | static Property milkymist_vgafb_properties[] = {
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303 | 999e12bb | Anthony Liguori | DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0), |
304 | 999e12bb | Anthony Liguori | DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff), |
305 | 999e12bb | Anthony Liguori | DEFINE_PROP_END_OF_LIST(), |
306 | 999e12bb | Anthony Liguori | }; |
307 | 999e12bb | Anthony Liguori | |
308 | 999e12bb | Anthony Liguori | static void milkymist_vgafb_class_init(ObjectClass *klass, void *data) |
309 | 999e12bb | Anthony Liguori | { |
310 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
311 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
312 | 999e12bb | Anthony Liguori | |
313 | 999e12bb | Anthony Liguori | k->init = milkymist_vgafb_init; |
314 | 39bffca2 | Anthony Liguori | dc->reset = milkymist_vgafb_reset; |
315 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_milkymist_vgafb; |
316 | 39bffca2 | Anthony Liguori | dc->props = milkymist_vgafb_properties; |
317 | 999e12bb | Anthony Liguori | } |
318 | 999e12bb | Anthony Liguori | |
319 | 39bffca2 | Anthony Liguori | static TypeInfo milkymist_vgafb_info = {
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320 | 39bffca2 | Anthony Liguori | .name = "milkymist-vgafb",
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321 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
322 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(MilkymistVgafbState),
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323 | 39bffca2 | Anthony Liguori | .class_init = milkymist_vgafb_class_init, |
324 | d23948b1 | Michael Walle | }; |
325 | d23948b1 | Michael Walle | |
326 | 83f7d43a | Andreas Färber | static void milkymist_vgafb_register_types(void) |
327 | d23948b1 | Michael Walle | { |
328 | 39bffca2 | Anthony Liguori | type_register_static(&milkymist_vgafb_info); |
329 | d23948b1 | Michael Walle | } |
330 | d23948b1 | Michael Walle | |
331 | 83f7d43a | Andreas Färber | type_init(milkymist_vgafb_register_types) |