root / target-ppc / exec.h @ 0443eaf6
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1 | 79aceca5 | bellard | /*
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2 | 79aceca5 | bellard | * PPC emulation definitions for qemu.
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3 | 79aceca5 | bellard | *
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4 | 79aceca5 | bellard | * Copyright (c) 2003 Jocelyn Mayer
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5 | 79aceca5 | bellard | *
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6 | 79aceca5 | bellard | * This library is free software; you can redistribute it and/or
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7 | 79aceca5 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 79aceca5 | bellard | * License as published by the Free Software Foundation; either
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9 | 79aceca5 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 79aceca5 | bellard | *
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11 | 79aceca5 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 79aceca5 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 79aceca5 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 79aceca5 | bellard | * Lesser General Public License for more details.
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15 | 79aceca5 | bellard | *
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16 | 79aceca5 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 79aceca5 | bellard | * License along with this library; if not, write to the Free Software
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18 | 79aceca5 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 79aceca5 | bellard | */
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20 | 79aceca5 | bellard | #if !defined (__PPC_H__)
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21 | 79aceca5 | bellard | #define __PPC_H__
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22 | 79aceca5 | bellard | |
23 | 79aceca5 | bellard | #include "dyngen-exec.h" |
24 | 79aceca5 | bellard | |
25 | 79aceca5 | bellard | register struct CPUPPCState *env asm(AREG0); |
26 | 79aceca5 | bellard | register uint32_t T0 asm(AREG1); |
27 | 79aceca5 | bellard | register uint32_t T1 asm(AREG2); |
28 | 79aceca5 | bellard | register uint32_t T2 asm(AREG3); |
29 | 79aceca5 | bellard | |
30 | 79aceca5 | bellard | #define PARAM(n) ((uint32_t)PARAM##n) |
31 | 79aceca5 | bellard | #define SPARAM(n) ((int32_t)PARAM##n) |
32 | fb0eaffc | bellard | #define FT0 (env->ft0)
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33 | fb0eaffc | bellard | #define FT1 (env->ft1)
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34 | fb0eaffc | bellard | #define FT2 (env->ft2)
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35 | fb0eaffc | bellard | #define FTS0 ((float)env->ft0) |
36 | fb0eaffc | bellard | #define FTS1 ((float)env->ft1) |
37 | fb0eaffc | bellard | #define FTS2 ((float)env->ft2) |
38 | 79aceca5 | bellard | |
39 | a541f297 | bellard | #if defined (DEBUG_OP)
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40 | a541f297 | bellard | #define RETURN() __asm__ __volatile__("nop"); |
41 | a541f297 | bellard | #else
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42 | 79aceca5 | bellard | #define RETURN() __asm__ __volatile__(""); |
43 | a541f297 | bellard | #endif
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44 | 79aceca5 | bellard | |
45 | 79aceca5 | bellard | #include "cpu.h" |
46 | 79aceca5 | bellard | #include "exec-all.h" |
47 | 79aceca5 | bellard | |
48 | 9a64fbe4 | bellard | static inline uint32_t rotl (uint32_t i, int n) |
49 | 79aceca5 | bellard | { |
50 | 9a64fbe4 | bellard | return ((i << n) | (i >> (32 - n))); |
51 | 79aceca5 | bellard | } |
52 | 79aceca5 | bellard | |
53 | 9a64fbe4 | bellard | /* XXX: move that to a generic header */
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54 | 9a64fbe4 | bellard | #if !defined(CONFIG_USER_ONLY)
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55 | 79aceca5 | bellard | |
56 | 9a64fbe4 | bellard | #define ldul_user ldl_user
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57 | 9a64fbe4 | bellard | #define ldul_kernel ldl_kernel
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58 | 79aceca5 | bellard | |
59 | 9a64fbe4 | bellard | #define ACCESS_TYPE 0 |
60 | 9a64fbe4 | bellard | #define MEMSUFFIX _kernel
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61 | 9a64fbe4 | bellard | #define DATA_SIZE 1 |
62 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
63 | 79aceca5 | bellard | |
64 | 9a64fbe4 | bellard | #define DATA_SIZE 2 |
65 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
66 | 79aceca5 | bellard | |
67 | 9a64fbe4 | bellard | #define DATA_SIZE 4 |
68 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
69 | 79aceca5 | bellard | |
70 | 9a64fbe4 | bellard | #define DATA_SIZE 8 |
71 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
72 | 9a64fbe4 | bellard | #undef ACCESS_TYPE
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73 | 9a64fbe4 | bellard | #undef MEMSUFFIX
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74 | 79aceca5 | bellard | |
75 | 9a64fbe4 | bellard | #define ACCESS_TYPE 1 |
76 | 9a64fbe4 | bellard | #define MEMSUFFIX _user
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77 | 9a64fbe4 | bellard | #define DATA_SIZE 1 |
78 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
79 | 79aceca5 | bellard | |
80 | 9a64fbe4 | bellard | #define DATA_SIZE 2 |
81 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
82 | 79aceca5 | bellard | |
83 | 9a64fbe4 | bellard | #define DATA_SIZE 4 |
84 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
85 | 79aceca5 | bellard | |
86 | 9a64fbe4 | bellard | #define DATA_SIZE 8 |
87 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
88 | 9a64fbe4 | bellard | #undef ACCESS_TYPE
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89 | 9a64fbe4 | bellard | #undef MEMSUFFIX
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90 | 79aceca5 | bellard | |
91 | 9a64fbe4 | bellard | /* these access are slower, they must be as rare as possible */
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92 | 9a64fbe4 | bellard | #define ACCESS_TYPE 2 |
93 | 9a64fbe4 | bellard | #define MEMSUFFIX _data
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94 | 9a64fbe4 | bellard | #define DATA_SIZE 1 |
95 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
96 | 79aceca5 | bellard | |
97 | 9a64fbe4 | bellard | #define DATA_SIZE 2 |
98 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
99 | 79aceca5 | bellard | |
100 | 9a64fbe4 | bellard | #define DATA_SIZE 4 |
101 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
102 | 79aceca5 | bellard | |
103 | 9a64fbe4 | bellard | #define DATA_SIZE 8 |
104 | 9a64fbe4 | bellard | #include "softmmu_header.h" |
105 | 9a64fbe4 | bellard | #undef ACCESS_TYPE
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106 | 9a64fbe4 | bellard | #undef MEMSUFFIX
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107 | 79aceca5 | bellard | |
108 | 9a64fbe4 | bellard | #define ldub(p) ldub_data(p)
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109 | 9a64fbe4 | bellard | #define ldsb(p) ldsb_data(p)
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110 | 9a64fbe4 | bellard | #define lduw(p) lduw_data(p)
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111 | 9a64fbe4 | bellard | #define ldsw(p) ldsw_data(p)
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112 | 9a64fbe4 | bellard | #define ldl(p) ldl_data(p)
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113 | 9a64fbe4 | bellard | #define ldq(p) ldq_data(p)
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114 | 79aceca5 | bellard | |
115 | 9a64fbe4 | bellard | #define stb(p, v) stb_data(p, v)
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116 | 9a64fbe4 | bellard | #define stw(p, v) stw_data(p, v)
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117 | 9a64fbe4 | bellard | #define stl(p, v) stl_data(p, v)
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118 | 9a64fbe4 | bellard | #define stq(p, v) stq_data(p, v)
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119 | 79aceca5 | bellard | |
120 | 9a64fbe4 | bellard | #endif /* !defined(CONFIG_USER_ONLY) */ |
121 | 79aceca5 | bellard | |
122 | 9fddaa0c | bellard | void do_raise_exception_err (uint32_t exception, int error_code); |
123 | 9fddaa0c | bellard | void do_raise_exception (uint32_t exception);
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124 | 79aceca5 | bellard | |
125 | 9a64fbe4 | bellard | void do_load_cr (void); |
126 | 9a64fbe4 | bellard | void do_store_cr (uint32_t mask);
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127 | 9a64fbe4 | bellard | void do_load_xer (void); |
128 | 9a64fbe4 | bellard | void do_store_xer (void); |
129 | 9a64fbe4 | bellard | void do_load_msr (void); |
130 | 9a64fbe4 | bellard | void do_store_msr (void); |
131 | fb0eaffc | bellard | void do_load_fpscr (void); |
132 | fb0eaffc | bellard | void do_store_fpscr (uint32_t mask);
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133 | 79aceca5 | bellard | |
134 | 9a64fbe4 | bellard | void do_sraw(void); |
135 | 9a64fbe4 | bellard | |
136 | 9a64fbe4 | bellard | void do_fctiw (void); |
137 | 9a64fbe4 | bellard | void do_fctiwz (void); |
138 | 4b3686fa | bellard | void do_fnmadd (void); |
139 | 4b3686fa | bellard | void do_fnmsub (void); |
140 | 1ef59d0a | bellard | void do_fnmadds (void); |
141 | 1ef59d0a | bellard | void do_fnmsubs (void); |
142 | 9a64fbe4 | bellard | void do_fsqrt (void); |
143 | 9a64fbe4 | bellard | void do_fsqrts (void); |
144 | 9a64fbe4 | bellard | void do_fres (void); |
145 | 9a64fbe4 | bellard | void do_fsqrte (void); |
146 | 9a64fbe4 | bellard | void do_fsel (void); |
147 | 9a64fbe4 | bellard | void do_fcmpu (void); |
148 | 9a64fbe4 | bellard | void do_fcmpo (void); |
149 | 9a64fbe4 | bellard | void do_fabs (void); |
150 | 9a64fbe4 | bellard | void do_fnabs (void); |
151 | 79aceca5 | bellard | |
152 | 4b3686fa | bellard | void do_check_reservation (void); |
153 | fb0eaffc | bellard | void do_icbi (void); |
154 | 4b3686fa | bellard | void do_store_sr (uint32_t srnum);
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155 | 4b3686fa | bellard | void do_store_ibat (int ul, int nr); |
156 | 4b3686fa | bellard | void do_store_dbat (int ul, int nr); |
157 | 9a64fbe4 | bellard | void do_tlbia (void); |
158 | 9a64fbe4 | bellard | void do_tlbie (void); |
159 | 9a64fbe4 | bellard | |
160 | a541f297 | bellard | void dump_state (void); |
161 | 9a64fbe4 | bellard | void dump_rfi (void); |
162 | 9a64fbe4 | bellard | void dump_store_sr (int srnum); |
163 | 9a64fbe4 | bellard | void dump_store_ibat (int ul, int nr); |
164 | 9a64fbe4 | bellard | void dump_store_dbat (int ul, int nr); |
165 | 9a64fbe4 | bellard | void dump_store_tb (int ul); |
166 | 9a64fbe4 | bellard | void dump_update_tb(uint32_t param);
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167 | fb0eaffc | bellard | |
168 | 0d1a29f9 | bellard | static inline void env_to_regs(void) |
169 | 0d1a29f9 | bellard | { |
170 | 0d1a29f9 | bellard | } |
171 | 0d1a29f9 | bellard | |
172 | 0d1a29f9 | bellard | static inline void regs_to_env(void) |
173 | 0d1a29f9 | bellard | { |
174 | 0d1a29f9 | bellard | } |
175 | 0d1a29f9 | bellard | |
176 | 0fa85d43 | bellard | int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, |
177 | 0fa85d43 | bellard | int is_user, int is_softmmu); |
178 | 0fa85d43 | bellard | |
179 | 79aceca5 | bellard | #endif /* !defined (__PPC_H__) */ |