Revision 04acd307
| b/target-alpha/cpu.h | ||
|---|---|---|
| 275 | 275 |
/* temporary fixed-point registers |
| 276 | 276 |
* used to emulate 64 bits target on 32 bits hosts |
| 277 | 277 |
*/ |
| 278 |
target_ulong t0, t1, t2;
|
|
| 278 |
target_ulong t0, t1; |
|
| 279 | 279 |
#endif |
| 280 | 280 |
/* */ |
| 281 | 281 |
double ft0, ft1, ft2; |
| b/target-alpha/exec.h | ||
|---|---|---|
| 34 | 34 |
/* no registers can be used */ |
| 35 | 35 |
#define T0 (env->t0) |
| 36 | 36 |
#define T1 (env->t1) |
| 37 |
#define T2 (env->t2) |
|
| 38 | 37 |
|
| 39 | 38 |
#else |
| 40 | 39 |
|
| 41 | 40 |
register uint64_t T0 asm(AREG1); |
| 42 | 41 |
register uint64_t T1 asm(AREG2); |
| 43 |
register uint64_t T2 asm(AREG3); |
|
| 44 | 42 |
|
| 45 | 43 |
#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */ |
| 46 | 44 |
|
| b/target-alpha/helper.h | ||
|---|---|---|
| 11 | 11 |
DEF_HELPER(uint64_t, helper_rc, (void)) |
| 12 | 12 |
DEF_HELPER(uint64_t, helper_rs, (void)) |
| 13 | 13 |
|
| 14 |
DEF_HELPER(uint64_t, helper_addqv, (uint64_t, uint64_t)) |
|
| 15 |
DEF_HELPER(uint64_t, helper_addlv, (uint64_t, uint64_t)) |
|
| 16 |
DEF_HELPER(uint64_t, helper_subqv, (uint64_t, uint64_t)) |
|
| 17 |
DEF_HELPER(uint64_t, helper_sublv, (uint64_t, uint64_t)) |
|
| 18 |
DEF_HELPER(uint64_t, helper_mullv, (uint64_t, uint64_t)) |
|
| 19 |
DEF_HELPER(uint64_t, helper_mulqv, (uint64_t, uint64_t)) |
|
| 20 |
DEF_HELPER(uint64_t, helper_umulh, (uint64_t, uint64_t)) |
|
| 21 |
|
|
| 14 | 22 |
DEF_HELPER(uint64_t, helper_ctpop, (uint64_t)) |
| 15 | 23 |
DEF_HELPER(uint64_t, helper_ctlz, (uint64_t)) |
| 16 | 24 |
DEF_HELPER(uint64_t, helper_cttz, (uint64_t)) |
| ... | ... | |
| 32 | 40 |
DEF_HELPER(uint64_t, helper_mskqh, (int64_t, uint64_t)) |
| 33 | 41 |
DEF_HELPER(uint64_t, helper_insqh, (int64_t, uint64_t)) |
| 34 | 42 |
|
| 43 |
DEF_HELPER(uint64_t, helper_cmpbge, (uint64_t, uint64_t)) |
|
| b/target-alpha/op.c | ||
|---|---|---|
| 161 | 161 |
RETURN(); |
| 162 | 162 |
} |
| 163 | 163 |
|
| 164 |
/* Arithmetic */ |
|
| 165 |
void OPPROTO op_addqv (void) |
|
| 166 |
{
|
|
| 167 |
helper_addqv(); |
|
| 168 |
RETURN(); |
|
| 169 |
} |
|
| 170 |
|
|
| 171 |
void OPPROTO op_addlv (void) |
|
| 172 |
{
|
|
| 173 |
helper_addlv(); |
|
| 174 |
RETURN(); |
|
| 175 |
} |
|
| 176 |
|
|
| 177 |
void OPPROTO op_subqv (void) |
|
| 178 |
{
|
|
| 179 |
helper_subqv(); |
|
| 180 |
RETURN(); |
|
| 181 |
} |
|
| 182 |
|
|
| 183 |
void OPPROTO op_sublv (void) |
|
| 184 |
{
|
|
| 185 |
helper_sublv(); |
|
| 186 |
RETURN(); |
|
| 187 |
} |
|
| 188 |
|
|
| 189 |
void OPPROTO op_mullv (void) |
|
| 190 |
{
|
|
| 191 |
helper_mullv(); |
|
| 192 |
RETURN(); |
|
| 193 |
} |
|
| 194 |
|
|
| 195 |
void OPPROTO op_mulqv (void) |
|
| 196 |
{
|
|
| 197 |
helper_mulqv(); |
|
| 198 |
RETURN(); |
|
| 199 |
} |
|
| 200 |
|
|
| 201 |
void OPPROTO op_umulh (void) |
|
| 202 |
{
|
|
| 203 |
uint64_t tl, th; |
|
| 204 |
|
|
| 205 |
mulu64(&tl, &th, T0, T1); |
|
| 206 |
T0 = th; |
|
| 207 |
RETURN(); |
|
| 208 |
} |
|
| 209 |
|
|
| 210 | 164 |
/* Tests */ |
| 211 |
void OPPROTO op_cmpbge (void) |
|
| 212 |
{
|
|
| 213 |
helper_cmpbge(); |
|
| 214 |
RETURN(); |
|
| 215 |
} |
|
| 216 |
|
|
| 217 | 165 |
#if 0 // Qemu does not know how to do this... |
| 218 | 166 |
void OPPROTO op_bcond (void) |
| 219 | 167 |
{
|
| b/target-alpha/op_helper.c | ||
|---|---|---|
| 163 | 163 |
return tmp; |
| 164 | 164 |
} |
| 165 | 165 |
|
| 166 |
void helper_addqv (void)
|
|
| 166 |
uint64_t helper_addqv (uint64_t op1, uint64_t op2)
|
|
| 167 | 167 |
{
|
| 168 |
T2 = T0;
|
|
| 169 |
T0 += T1;
|
|
| 170 |
if (unlikely((T2 ^ T1 ^ (-1ULL)) & (T2 ^ T0) & (1ULL << 63))) {
|
|
| 168 |
uint64_t tmp = op1;
|
|
| 169 |
op1 += op2;
|
|
| 170 |
if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) {
|
|
| 171 | 171 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 172 | 172 |
} |
| 173 |
return op1; |
|
| 173 | 174 |
} |
| 174 | 175 |
|
| 175 |
void helper_addlv (void)
|
|
| 176 |
uint64_t helper_addlv (uint64_t op1, uint64_t op2)
|
|
| 176 | 177 |
{
|
| 177 |
T2 = T0;
|
|
| 178 |
T0 = (uint32_t)(T0 + T1);
|
|
| 179 |
if (unlikely((T2 ^ T1 ^ (-1UL)) & (T2 ^ T0) & (1UL << 31))) {
|
|
| 178 |
uint64_t tmp = op1;
|
|
| 179 |
op1 = (uint32_t)(op1 + op2);
|
|
| 180 |
if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) {
|
|
| 180 | 181 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 181 | 182 |
} |
| 183 |
return op1; |
|
| 182 | 184 |
} |
| 183 | 185 |
|
| 184 |
void helper_subqv (void)
|
|
| 186 |
uint64_t helper_subqv (uint64_t op1, uint64_t op2)
|
|
| 185 | 187 |
{
|
| 186 |
T2 = T0;
|
|
| 187 |
T0 -= T1;
|
|
| 188 |
if (unlikely(((~T2) ^ T0 ^ (-1ULL)) & ((~T2) ^ T1) & (1ULL << 63))) {
|
|
| 188 |
uint64_t tmp = op1;
|
|
| 189 |
op1 -= op2;
|
|
| 190 |
if (unlikely(((~tmp) ^ op1 ^ (-1ULL)) & ((~tmp) ^ op2) & (1ULL << 63))) {
|
|
| 189 | 191 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 190 | 192 |
} |
| 193 |
return op1; |
|
| 191 | 194 |
} |
| 192 | 195 |
|
| 193 |
void helper_sublv (void)
|
|
| 196 |
uint64_t helper_sublv (uint64_t op1, uint64_t op2)
|
|
| 194 | 197 |
{
|
| 195 |
T2 = T0;
|
|
| 196 |
T0 = (uint32_t)(T0 - T1);
|
|
| 197 |
if (unlikely(((~T2) ^ T0 ^ (-1UL)) & ((~T2) ^ T1) & (1UL << 31))) {
|
|
| 198 |
uint64_t tmp = op1;
|
|
| 199 |
op1 = (uint32_t)(op1 - op2);
|
|
| 200 |
if (unlikely(((~tmp) ^ op1 ^ (-1UL)) & ((~tmp) ^ op2) & (1UL << 31))) {
|
|
| 198 | 201 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 199 | 202 |
} |
| 203 |
return op1; |
|
| 200 | 204 |
} |
| 201 | 205 |
|
| 202 |
void helper_mullv (void)
|
|
| 206 |
uint64_t helper_mullv (uint64_t op1, uint64_t op2)
|
|
| 203 | 207 |
{
|
| 204 |
int64_t res = (int64_t)T0 * (int64_t)T1;
|
|
| 208 |
int64_t res = (int64_t)op1 * (int64_t)op2;
|
|
| 205 | 209 |
|
| 206 | 210 |
if (unlikely((int32_t)res != res)) {
|
| 207 | 211 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 208 | 212 |
} |
| 209 |
T0 = (int64_t)((int32_t)res);
|
|
| 213 |
return (int64_t)((int32_t)res);
|
|
| 210 | 214 |
} |
| 211 | 215 |
|
| 212 |
void helper_mulqv ()
|
|
| 216 |
uint64_t helper_mulqv (uint64_t op1, uint64_t op2)
|
|
| 213 | 217 |
{
|
| 214 | 218 |
uint64_t tl, th; |
| 215 | 219 |
|
| 216 |
muls64(&tl, &th, T0, T1);
|
|
| 220 |
muls64(&tl, &th, op1, op2);
|
|
| 217 | 221 |
/* If th != 0 && th != -1, then we had an overflow */ |
| 218 | 222 |
if (unlikely((th + 1) > 1)) {
|
| 219 | 223 |
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
| 220 | 224 |
} |
| 221 |
T0 = tl; |
|
| 225 |
return tl; |
|
| 226 |
} |
|
| 227 |
|
|
| 228 |
uint64_t helper_umulh (uint64_t op1, uint64_t op2) |
|
| 229 |
{
|
|
| 230 |
uint64_t tl, th; |
|
| 231 |
|
|
| 232 |
mulu64(&tl, &th, op1, op2); |
|
| 233 |
return th; |
|
| 222 | 234 |
} |
| 223 | 235 |
|
| 224 | 236 |
uint64_t helper_ctpop (uint64_t arg) |
| ... | ... | |
| 340 | 352 |
return byte_zap(val, ~((0xFF << (mask & 7)) >> 8)); |
| 341 | 353 |
} |
| 342 | 354 |
|
| 343 |
void helper_cmpbge (void)
|
|
| 355 |
uint64_t helper_cmpbge (uint64_t op1, uint64_t op2)
|
|
| 344 | 356 |
{
|
| 345 | 357 |
uint8_t opa, opb, res; |
| 346 | 358 |
int i; |
| 347 | 359 |
|
| 348 | 360 |
res = 0; |
| 349 | 361 |
for (i = 0; i < 7; i++) {
|
| 350 |
opa = T0 >> (i * 8);
|
|
| 351 |
opb = T1 >> (i * 8);
|
|
| 362 |
opa = op1 >> (i * 8);
|
|
| 363 |
opb = op2 >> (i * 8);
|
|
| 352 | 364 |
if (opa >= opb) |
| 353 | 365 |
res |= 1 << i; |
| 354 | 366 |
} |
| 355 |
T0 = res;
|
|
| 367 |
return res;
|
|
| 356 | 368 |
} |
| 357 | 369 |
|
| 358 | 370 |
void helper_cmov_fir (int freg) |
| b/target-alpha/op_helper.h | ||
|---|---|---|
| 21 | 21 |
void helper_call_pal (uint32_t palcode); |
| 22 | 22 |
void helper_load_fpcr (void); |
| 23 | 23 |
void helper_store_fpcr (void); |
| 24 |
void helper_addqv (void); |
|
| 25 |
void helper_addlv (void); |
|
| 26 |
void helper_subqv (void); |
|
| 27 |
void helper_sublv (void); |
|
| 28 |
void helper_mullv (void); |
|
| 29 |
void helper_mulqv (void); |
|
| 30 |
void helper_cmpbge (void); |
|
| 31 | 24 |
void helper_cmov_fir (int freg); |
| 32 | 25 |
|
| 33 | 26 |
double helper_ldff_raw (target_ulong ea); |
| b/target-alpha/translate.c | ||
|---|---|---|
| 51 | 51 |
static TCGv cpu_pc; |
| 52 | 52 |
|
| 53 | 53 |
/* dyngen register indexes */ |
| 54 |
static TCGv cpu_T[3];
|
|
| 54 |
static TCGv cpu_T[2];
|
|
| 55 | 55 |
|
| 56 | 56 |
/* register names */ |
| 57 | 57 |
static char cpu_reg_names[10*4+21*5]; |
| ... | ... | |
| 74 | 74 |
offsetof(CPUState, t0), "T0"); |
| 75 | 75 |
cpu_T[1] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0, |
| 76 | 76 |
offsetof(CPUState, t1), "T1"); |
| 77 |
cpu_T[2] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0, |
|
| 78 |
offsetof(CPUState, t2), "T2"); |
|
| 79 | 77 |
#else |
| 80 | 78 |
cpu_T[0] = tcg_global_reg_new(TCG_TYPE_I64, TCG_AREG1, "T0"); |
| 81 | 79 |
cpu_T[1] = tcg_global_reg_new(TCG_TYPE_I64, TCG_AREG2, "T1"); |
| 82 |
cpu_T[2] = tcg_global_reg_new(TCG_TYPE_I64, TCG_AREG3, "T2"); |
|
| 83 | 80 |
#endif |
| 84 | 81 |
|
| 85 | 82 |
p = cpu_reg_names; |
| ... | ... | |
| 367 | 364 |
_gen_op_bcond(ctx); |
| 368 | 365 |
} |
| 369 | 366 |
|
| 370 |
static always_inline void gen_arith3 (DisasContext *ctx, |
|
| 371 |
void (*gen_arith_op)(void), |
|
| 372 |
int ra, int rb, int rc, |
|
| 373 |
int islit, uint8_t lit) |
|
| 374 |
{
|
|
| 375 |
if (ra != 31) |
|
| 376 |
tcg_gen_mov_i64(cpu_T[0], cpu_ir[ra]); |
|
| 377 |
else |
|
| 378 |
tcg_gen_movi_i64(cpu_T[0], 0); |
|
| 379 |
if (islit) |
|
| 380 |
tcg_gen_movi_i64(cpu_T[1], lit); |
|
| 381 |
else |
|
| 382 |
tcg_gen_mov_i64(cpu_T[1], cpu_ir[rb]); |
|
| 383 |
(*gen_arith_op)(); |
|
| 384 |
if (rc != 31) |
|
| 385 |
tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]); |
|
| 386 |
} |
|
| 387 |
|
|
| 388 | 367 |
static always_inline void gen_cmov (DisasContext *ctx, |
| 389 | 368 |
TCGCond inv_cond, |
| 390 | 369 |
int ra, int rb, int rc, |
| ... | ... | |
| 525 | 504 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
| 526 | 505 |
} |
| 527 | 506 |
|
| 528 |
/* Code to call byte manipulation helpers, used by: |
|
| 529 |
INSWH, INSLH, INSQH, INSBL, INSWL, INSLL, INSQL, |
|
| 530 |
MSKWH, MSKLH, MSKQH, MSKBL, MSKWL, MSKLL, MSKQL, |
|
| 531 |
ZAP, ZAPNOT |
|
| 532 |
|
|
| 533 |
WARNING: it assumes that when ra31 is used, the result is 0. |
|
| 534 |
*/ |
|
| 535 |
static always_inline void gen_byte_manipulation(void *helper, |
|
| 536 |
int ra, int rb, int rc, |
|
| 537 |
int islit, uint8_t lit) |
|
| 507 |
/* Code to call arith3 helpers */ |
|
| 508 |
static always_inline void gen_arith3_helper(void *helper, |
|
| 509 |
int ra, int rb, int rc, |
|
| 510 |
int islit, uint8_t lit) |
|
| 538 | 511 |
{
|
| 539 | 512 |
if (unlikely(rc == 31)) |
| 540 | 513 |
return; |
| ... | ... | |
| 546 | 519 |
tcg_temp_free(tmp); |
| 547 | 520 |
} else |
| 548 | 521 |
tcg_gen_helper_1_2(helper, cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); |
| 549 |
} else |
|
| 550 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 522 |
} else {
|
|
| 523 |
TCGv tmp1 = tcg_const_i64(0); |
|
| 524 |
if (islit) {
|
|
| 525 |
TCGv tmp2 = tcg_const_i64(lit); |
|
| 526 |
tcg_gen_helper_1_2(helper, cpu_ir[rc], tmp1, tmp2); |
|
| 527 |
tcg_temp_free(tmp2); |
|
| 528 |
} else |
|
| 529 |
tcg_gen_helper_1_2(helper, cpu_ir[rc], tmp1, cpu_ir[rb]); |
|
| 530 |
tcg_temp_free(tmp1); |
|
| 531 |
} |
|
| 551 | 532 |
} |
| 552 | 533 |
|
| 553 | 534 |
static always_inline void gen_cmp(TCGCond cond, |
| ... | ... | |
| 791 | 772 |
break; |
| 792 | 773 |
case 0x0F: |
| 793 | 774 |
/* CMPBGE */ |
| 794 |
gen_arith3(ctx, &gen_op_cmpbge, ra, rb, rc, islit, lit);
|
|
| 775 |
gen_arith3_helper(helper_cmpbge, ra, rb, rc, islit, lit);
|
|
| 795 | 776 |
break; |
| 796 | 777 |
case 0x12: |
| 797 | 778 |
/* S8ADDL */ |
| ... | ... | |
| 957 | 938 |
break; |
| 958 | 939 |
case 0x40: |
| 959 | 940 |
/* ADDL/V */ |
| 960 |
gen_arith3(ctx, &gen_op_addlv, ra, rb, rc, islit, lit);
|
|
| 941 |
gen_arith3_helper(helper_addlv, ra, rb, rc, islit, lit);
|
|
| 961 | 942 |
break; |
| 962 | 943 |
case 0x49: |
| 963 | 944 |
/* SUBL/V */ |
| 964 |
gen_arith3(ctx, &gen_op_sublv, ra, rb, rc, islit, lit);
|
|
| 945 |
gen_arith3_helper(helper_sublv, ra, rb, rc, islit, lit);
|
|
| 965 | 946 |
break; |
| 966 | 947 |
case 0x4D: |
| 967 | 948 |
/* CMPLT */ |
| ... | ... | |
| 969 | 950 |
break; |
| 970 | 951 |
case 0x60: |
| 971 | 952 |
/* ADDQ/V */ |
| 972 |
gen_arith3(ctx, &gen_op_addqv, ra, rb, rc, islit, lit);
|
|
| 953 |
gen_arith3_helper(helper_addqv, ra, rb, rc, islit, lit);
|
|
| 973 | 954 |
break; |
| 974 | 955 |
case 0x69: |
| 975 | 956 |
/* SUBQ/V */ |
| 976 |
gen_arith3(ctx, &gen_op_subqv, ra, rb, rc, islit, lit);
|
|
| 957 |
gen_arith3_helper(helper_subqv, ra, rb, rc, islit, lit);
|
|
| 977 | 958 |
break; |
| 978 | 959 |
case 0x6D: |
| 979 | 960 |
/* CMPLE */ |
| ... | ... | |
| 1138 | 1119 |
switch (fn7) {
|
| 1139 | 1120 |
case 0x02: |
| 1140 | 1121 |
/* MSKBL */ |
| 1141 |
gen_byte_manipulation(helper_mskbl, ra, rb, rc, islit, lit);
|
|
| 1122 |
gen_arith3_helper(helper_mskbl, ra, rb, rc, islit, lit);
|
|
| 1142 | 1123 |
break; |
| 1143 | 1124 |
case 0x06: |
| 1144 | 1125 |
/* EXTBL */ |
| ... | ... | |
| 1146 | 1127 |
break; |
| 1147 | 1128 |
case 0x0B: |
| 1148 | 1129 |
/* INSBL */ |
| 1149 |
gen_byte_manipulation(helper_insbl, ra, rb, rc, islit, lit);
|
|
| 1130 |
gen_arith3_helper(helper_insbl, ra, rb, rc, islit, lit);
|
|
| 1150 | 1131 |
break; |
| 1151 | 1132 |
case 0x12: |
| 1152 | 1133 |
/* MSKWL */ |
| 1153 |
gen_byte_manipulation(helper_mskwl, ra, rb, rc, islit, lit);
|
|
| 1134 |
gen_arith3_helper(helper_mskwl, ra, rb, rc, islit, lit);
|
|
| 1154 | 1135 |
break; |
| 1155 | 1136 |
case 0x16: |
| 1156 | 1137 |
/* EXTWL */ |
| ... | ... | |
| 1158 | 1139 |
break; |
| 1159 | 1140 |
case 0x1B: |
| 1160 | 1141 |
/* INSWL */ |
| 1161 |
gen_byte_manipulation(helper_inswl, ra, rb, rc, islit, lit);
|
|
| 1142 |
gen_arith3_helper(helper_inswl, ra, rb, rc, islit, lit);
|
|
| 1162 | 1143 |
break; |
| 1163 | 1144 |
case 0x22: |
| 1164 | 1145 |
/* MSKLL */ |
| 1165 |
gen_byte_manipulation(helper_mskll, ra, rb, rc, islit, lit);
|
|
| 1146 |
gen_arith3_helper(helper_mskll, ra, rb, rc, islit, lit);
|
|
| 1166 | 1147 |
break; |
| 1167 | 1148 |
case 0x26: |
| 1168 | 1149 |
/* EXTLL */ |
| ... | ... | |
| 1170 | 1151 |
break; |
| 1171 | 1152 |
case 0x2B: |
| 1172 | 1153 |
/* INSLL */ |
| 1173 |
gen_byte_manipulation(helper_insll, ra, rb, rc, islit, lit);
|
|
| 1154 |
gen_arith3_helper(helper_insll, ra, rb, rc, islit, lit);
|
|
| 1174 | 1155 |
break; |
| 1175 | 1156 |
case 0x30: |
| 1176 | 1157 |
/* ZAP */ |
| 1177 |
gen_byte_manipulation(helper_zap, ra, rb, rc, islit, lit);
|
|
| 1158 |
gen_arith3_helper(helper_zap, ra, rb, rc, islit, lit);
|
|
| 1178 | 1159 |
break; |
| 1179 | 1160 |
case 0x31: |
| 1180 | 1161 |
/* ZAPNOT */ |
| 1181 |
gen_byte_manipulation(helper_zapnot, ra, rb, rc, islit, lit);
|
|
| 1162 |
gen_arith3_helper(helper_zapnot, ra, rb, rc, islit, lit);
|
|
| 1182 | 1163 |
break; |
| 1183 | 1164 |
case 0x32: |
| 1184 | 1165 |
/* MSKQL */ |
| 1185 |
gen_byte_manipulation(helper_mskql, ra, rb, rc, islit, lit);
|
|
| 1166 |
gen_arith3_helper(helper_mskql, ra, rb, rc, islit, lit);
|
|
| 1186 | 1167 |
break; |
| 1187 | 1168 |
case 0x34: |
| 1188 | 1169 |
/* SRL */ |
| ... | ... | |
| 1222 | 1203 |
break; |
| 1223 | 1204 |
case 0x3B: |
| 1224 | 1205 |
/* INSQL */ |
| 1225 |
gen_byte_manipulation(helper_insql, ra, rb, rc, islit, lit);
|
|
| 1206 |
gen_arith3_helper(helper_insql, ra, rb, rc, islit, lit);
|
|
| 1226 | 1207 |
break; |
| 1227 | 1208 |
case 0x3C: |
| 1228 | 1209 |
/* SRA */ |
| ... | ... | |
| 1242 | 1223 |
break; |
| 1243 | 1224 |
case 0x52: |
| 1244 | 1225 |
/* MSKWH */ |
| 1245 |
gen_byte_manipulation(helper_mskwh, ra, rb, rc, islit, lit);
|
|
| 1226 |
gen_arith3_helper(helper_mskwh, ra, rb, rc, islit, lit);
|
|
| 1246 | 1227 |
break; |
| 1247 | 1228 |
case 0x57: |
| 1248 | 1229 |
/* INSWH */ |
| 1249 |
gen_byte_manipulation(helper_inswh, ra, rb, rc, islit, lit);
|
|
| 1230 |
gen_arith3_helper(helper_inswh, ra, rb, rc, islit, lit);
|
|
| 1250 | 1231 |
break; |
| 1251 | 1232 |
case 0x5A: |
| 1252 | 1233 |
/* EXTWH */ |
| ... | ... | |
| 1254 | 1235 |
break; |
| 1255 | 1236 |
case 0x62: |
| 1256 | 1237 |
/* MSKLH */ |
| 1257 |
gen_byte_manipulation(helper_msklh, ra, rb, rc, islit, lit);
|
|
| 1238 |
gen_arith3_helper(helper_msklh, ra, rb, rc, islit, lit);
|
|
| 1258 | 1239 |
break; |
| 1259 | 1240 |
case 0x67: |
| 1260 | 1241 |
/* INSLH */ |
| 1261 |
gen_byte_manipulation(helper_inslh, ra, rb, rc, islit, lit);
|
|
| 1242 |
gen_arith3_helper(helper_inslh, ra, rb, rc, islit, lit);
|
|
| 1262 | 1243 |
break; |
| 1263 | 1244 |
case 0x6A: |
| 1264 | 1245 |
/* EXTLH */ |
| ... | ... | |
| 1266 | 1247 |
break; |
| 1267 | 1248 |
case 0x72: |
| 1268 | 1249 |
/* MSKQH */ |
| 1269 |
gen_byte_manipulation(helper_mskqh, ra, rb, rc, islit, lit);
|
|
| 1250 |
gen_arith3_helper(helper_mskqh, ra, rb, rc, islit, lit);
|
|
| 1270 | 1251 |
break; |
| 1271 | 1252 |
case 0x77: |
| 1272 | 1253 |
/* INSQH */ |
| 1273 |
gen_byte_manipulation(helper_insqh, ra, rb, rc, islit, lit);
|
|
| 1254 |
gen_arith3_helper(helper_insqh, ra, rb, rc, islit, lit);
|
|
| 1274 | 1255 |
break; |
| 1275 | 1256 |
case 0x7A: |
| 1276 | 1257 |
/* EXTQH */ |
| ... | ... | |
| 1309 | 1290 |
break; |
| 1310 | 1291 |
case 0x30: |
| 1311 | 1292 |
/* UMULH */ |
| 1312 |
gen_arith3(ctx, &gen_op_umulh, ra, rb, rc, islit, lit);
|
|
| 1293 |
gen_arith3_helper(helper_umulh, ra, rb, rc, islit, lit);
|
|
| 1313 | 1294 |
break; |
| 1314 | 1295 |
case 0x40: |
| 1315 | 1296 |
/* MULL/V */ |
| 1316 |
gen_arith3(ctx, &gen_op_mullv, ra, rb, rc, islit, lit);
|
|
| 1297 |
gen_arith3_helper(helper_mullv, ra, rb, rc, islit, lit);
|
|
| 1317 | 1298 |
break; |
| 1318 | 1299 |
case 0x60: |
| 1319 | 1300 |
/* MULQ/V */ |
| 1320 |
gen_arith3(ctx, &gen_op_mulqv, ra, rb, rc, islit, lit);
|
|
| 1301 |
gen_arith3_helper(helper_mulqv, ra, rb, rc, islit, lit);
|
|
| 1321 | 1302 |
break; |
| 1322 | 1303 |
default: |
| 1323 | 1304 |
goto invalid_opc; |
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