Revision 04ec7df7
b/target-microblaze/translate.c | ||
---|---|---|
150 | 150 |
tcg_gen_shri_tl(d, cpu_SR[SR_MSR], 31); |
151 | 151 |
} |
152 | 152 |
|
153 |
/* |
|
154 |
* write_carry sets the carry bits in MSR based on bit 0 of v. |
|
155 |
* v[31:1] are ignored. |
|
156 |
*/ |
|
153 | 157 |
static void write_carry(DisasContext *dc, TCGv v) |
154 | 158 |
{ |
155 | 159 |
TCGv t0 = tcg_temp_new(); |
Also available in: Unified diff