Revision 06b3e1b3
| b/target-sparc/op.c | ||
|---|---|---|
| 37 | 37 |
#endif |
| 38 | 38 |
#endif |
| 39 | 39 |
|
| 40 |
void OPPROTO op_jmp_label(void) |
|
| 41 |
{
|
|
| 42 |
GOTO_LABEL_PARAM(1); |
|
| 43 |
} |
|
| 44 |
|
|
| 45 | 40 |
#define CHECK_ALIGN_OP(align) \ |
| 46 | 41 |
void OPPROTO op_check_align_T0_ ## align (void) \ |
| 47 | 42 |
{ \
|
| b/target-sparc/translate.c | ||
|---|---|---|
| 750 | 750 |
tcg_gen_andi_i32(r_temp, r_temp, 0x1); |
| 751 | 751 |
tcg_gen_brcond_i32(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1); |
| 752 | 752 |
tcg_gen_mov_tl(cpu_cc_src2, cpu_T[1]); |
| 753 |
gen_op_jmp_label(l2);
|
|
| 753 |
tcg_gen_br(l2);
|
|
| 754 | 754 |
gen_set_label(l1); |
| 755 | 755 |
tcg_gen_movi_tl(cpu_cc_src2, 0); |
| 756 | 756 |
gen_set_label(l2); |
| ... | ... | |
| 863 | 863 |
tcg_gen_brcond_i64(TCG_COND_NE, cpu_T[0], tcg_const_i64(INT64_MIN), l1); |
| 864 | 864 |
tcg_gen_brcond_i64(TCG_COND_NE, cpu_T[1], tcg_const_i64(-1), l1); |
| 865 | 865 |
tcg_gen_movi_i64(cpu_T[0], INT64_MIN); |
| 866 |
gen_op_jmp_label(l2);
|
|
| 866 |
tcg_gen_br(l2);
|
|
| 867 | 867 |
gen_set_label(l1); |
| 868 | 868 |
tcg_gen_div_i64(cpu_T[0], cpu_T[0], cpu_T[1]); |
| 869 | 869 |
gen_set_label(l2); |
| ... | ... | |
| 1205 | 1205 |
tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1); |
| 1206 | 1206 |
|
| 1207 | 1207 |
gen_movl_npc_im(npc1); |
| 1208 |
gen_op_jmp_label(l2);
|
|
| 1208 |
tcg_gen_br(l2);
|
|
| 1209 | 1209 |
|
| 1210 | 1210 |
gen_set_label(l1); |
| 1211 | 1211 |
gen_movl_npc_im(npc2); |
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