root / hw / realview.c @ 06c46bba
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1 | 5fafdf24 | ths | /*
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2 | e69954b9 | pbrook | * ARM RealView Baseboard System emulation.
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3 | e69954b9 | pbrook | *
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4 | a1bb27b1 | pbrook | * Copyright (c) 2006-2007 CodeSourcery.
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5 | e69954b9 | pbrook | * Written by Paul Brook
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6 | e69954b9 | pbrook | *
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7 | e69954b9 | pbrook | * This code is licenced under the GPL.
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8 | e69954b9 | pbrook | */
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9 | e69954b9 | pbrook | |
10 | 2e9bdce5 | Paul Brook | #include "sysbus.h" |
11 | 87ecb68b | pbrook | #include "arm-misc.h" |
12 | 87ecb68b | pbrook | #include "primecell.h" |
13 | 87ecb68b | pbrook | #include "devices.h" |
14 | 87ecb68b | pbrook | #include "pci.h" |
15 | 18e08a55 | Michael S. Tsirkin | #include "usb-ohci.h" |
16 | 87ecb68b | pbrook | #include "net.h" |
17 | 87ecb68b | pbrook | #include "sysemu.h" |
18 | 87ecb68b | pbrook | #include "boards.h" |
19 | eee48504 | Paul Brook | #include "bitbang_i2c.h" |
20 | 2446333c | Blue Swirl | #include "blockdev.h" |
21 | e69954b9 | pbrook | |
22 | 0ef849d7 | Paul Brook | #define SMP_BOOT_ADDR 0xe0000000 |
23 | eee48504 | Paul Brook | |
24 | eee48504 | Paul Brook | typedef struct { |
25 | eee48504 | Paul Brook | SysBusDevice busdev; |
26 | eee48504 | Paul Brook | bitbang_i2c_interface *bitbang; |
27 | eee48504 | Paul Brook | int out;
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28 | eee48504 | Paul Brook | int in;
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29 | eee48504 | Paul Brook | } RealViewI2CState; |
30 | eee48504 | Paul Brook | |
31 | eee48504 | Paul Brook | static uint32_t realview_i2c_read(void *opaque, target_phys_addr_t offset) |
32 | eee48504 | Paul Brook | { |
33 | eee48504 | Paul Brook | RealViewI2CState *s = (RealViewI2CState *)opaque; |
34 | eee48504 | Paul Brook | |
35 | eee48504 | Paul Brook | if (offset == 0) { |
36 | eee48504 | Paul Brook | return (s->out & 1) | (s->in << 1); |
37 | eee48504 | Paul Brook | } else {
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38 | eee48504 | Paul Brook | hw_error("realview_i2c_read: Bad offset 0x%x\n", (int)offset); |
39 | eee48504 | Paul Brook | return -1; |
40 | eee48504 | Paul Brook | } |
41 | eee48504 | Paul Brook | } |
42 | eee48504 | Paul Brook | |
43 | eee48504 | Paul Brook | static void realview_i2c_write(void *opaque, target_phys_addr_t offset, |
44 | eee48504 | Paul Brook | uint32_t value) |
45 | eee48504 | Paul Brook | { |
46 | eee48504 | Paul Brook | RealViewI2CState *s = (RealViewI2CState *)opaque; |
47 | eee48504 | Paul Brook | |
48 | eee48504 | Paul Brook | switch (offset) {
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49 | eee48504 | Paul Brook | case 0: |
50 | eee48504 | Paul Brook | s->out |= value & 3;
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51 | eee48504 | Paul Brook | break;
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52 | eee48504 | Paul Brook | case 4: |
53 | eee48504 | Paul Brook | s->out &= ~value; |
54 | eee48504 | Paul Brook | break;
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55 | eee48504 | Paul Brook | default:
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56 | eee48504 | Paul Brook | hw_error("realview_i2c_write: Bad offset 0x%x\n", (int)offset); |
57 | eee48504 | Paul Brook | } |
58 | eee48504 | Paul Brook | bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0); |
59 | eee48504 | Paul Brook | s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0); |
60 | eee48504 | Paul Brook | } |
61 | eee48504 | Paul Brook | |
62 | eee48504 | Paul Brook | static CPUReadMemoryFunc * const realview_i2c_readfn[] = { |
63 | eee48504 | Paul Brook | realview_i2c_read, |
64 | eee48504 | Paul Brook | realview_i2c_read, |
65 | eee48504 | Paul Brook | realview_i2c_read |
66 | eee48504 | Paul Brook | }; |
67 | eee48504 | Paul Brook | |
68 | eee48504 | Paul Brook | static CPUWriteMemoryFunc * const realview_i2c_writefn[] = { |
69 | eee48504 | Paul Brook | realview_i2c_write, |
70 | eee48504 | Paul Brook | realview_i2c_write, |
71 | eee48504 | Paul Brook | realview_i2c_write |
72 | eee48504 | Paul Brook | }; |
73 | eee48504 | Paul Brook | |
74 | eee48504 | Paul Brook | static int realview_i2c_init(SysBusDevice *dev) |
75 | eee48504 | Paul Brook | { |
76 | eee48504 | Paul Brook | RealViewI2CState *s = FROM_SYSBUS(RealViewI2CState, dev); |
77 | eee48504 | Paul Brook | i2c_bus *bus; |
78 | eee48504 | Paul Brook | int iomemtype;
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79 | eee48504 | Paul Brook | |
80 | eee48504 | Paul Brook | bus = i2c_init_bus(&dev->qdev, "i2c");
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81 | eee48504 | Paul Brook | s->bitbang = bitbang_i2c_init(bus); |
82 | eee48504 | Paul Brook | iomemtype = cpu_register_io_memory(realview_i2c_readfn, |
83 | 2507c12a | Alexander Graf | realview_i2c_writefn, s, |
84 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
85 | eee48504 | Paul Brook | sysbus_init_mmio(dev, 0x1000, iomemtype);
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86 | eee48504 | Paul Brook | return 0; |
87 | eee48504 | Paul Brook | } |
88 | eee48504 | Paul Brook | |
89 | eee48504 | Paul Brook | static SysBusDeviceInfo realview_i2c_info = {
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90 | eee48504 | Paul Brook | .init = realview_i2c_init, |
91 | eee48504 | Paul Brook | .qdev.name = "realview_i2c",
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92 | eee48504 | Paul Brook | .qdev.size = sizeof(RealViewI2CState),
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93 | eee48504 | Paul Brook | }; |
94 | eee48504 | Paul Brook | |
95 | eee48504 | Paul Brook | static void realview_register_devices(void) |
96 | eee48504 | Paul Brook | { |
97 | eee48504 | Paul Brook | sysbus_register_withprop(&realview_i2c_info); |
98 | eee48504 | Paul Brook | } |
99 | eee48504 | Paul Brook | |
100 | e69954b9 | pbrook | /* Board init. */
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101 | e69954b9 | pbrook | |
102 | f93eb9ff | balrog | static struct arm_boot_info realview_binfo = { |
103 | 0ef849d7 | Paul Brook | .smp_loader_start = SMP_BOOT_ADDR, |
104 | f93eb9ff | balrog | }; |
105 | f93eb9ff | balrog | |
106 | f7c70325 | Paul Brook | /* The following two lists must be consistent. */
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107 | c988bfad | Paul Brook | enum realview_board_type {
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108 | c988bfad | Paul Brook | BOARD_EB, |
109 | 0ef849d7 | Paul Brook | BOARD_EB_MPCORE, |
110 | f7c70325 | Paul Brook | BOARD_PB_A8, |
111 | f7c70325 | Paul Brook | BOARD_PBX_A9, |
112 | f7c70325 | Paul Brook | }; |
113 | f7c70325 | Paul Brook | |
114 | d05ac8fa | Blue Swirl | static const int realview_board_id[] = { |
115 | f7c70325 | Paul Brook | 0x33b,
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116 | f7c70325 | Paul Brook | 0x33b,
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117 | f7c70325 | Paul Brook | 0x769,
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118 | f7c70325 | Paul Brook | 0x76d
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119 | c988bfad | Paul Brook | }; |
120 | c988bfad | Paul Brook | |
121 | c227f099 | Anthony Liguori | static void realview_init(ram_addr_t ram_size, |
122 | 3023f332 | aliguori | const char *boot_device, |
123 | e69954b9 | pbrook | const char *kernel_filename, const char *kernel_cmdline, |
124 | c988bfad | Paul Brook | const char *initrd_filename, const char *cpu_model, |
125 | c988bfad | Paul Brook | enum realview_board_type board_type)
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126 | e69954b9 | pbrook | { |
127 | c988bfad | Paul Brook | CPUState *env = NULL;
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128 | c227f099 | Anthony Liguori | ram_addr_t ram_offset; |
129 | 26883c69 | Peter Maydell | DeviceState *dev, *sysctl, *gpio2; |
130 | c988bfad | Paul Brook | SysBusDevice *busdev; |
131 | fe7e8758 | Paul Brook | qemu_irq *irqp; |
132 | fe7e8758 | Paul Brook | qemu_irq pic[64];
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133 | 26883c69 | Peter Maydell | qemu_irq mmc_irq[2];
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134 | e69954b9 | pbrook | PCIBus *pci_bus; |
135 | e69954b9 | pbrook | NICInfo *nd; |
136 | eee48504 | Paul Brook | i2c_bus *i2c; |
137 | e69954b9 | pbrook | int n;
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138 | 0ef849d7 | Paul Brook | int done_nic = 0; |
139 | 9ee6e8bb | pbrook | qemu_irq cpu_irq[4];
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140 | f7c70325 | Paul Brook | int is_mpcore = 0; |
141 | f7c70325 | Paul Brook | int is_pb = 0; |
142 | 26e92f65 | Paul Brook | uint32_t proc_id = 0;
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143 | 0ef849d7 | Paul Brook | uint32_t sys_id; |
144 | 0ef849d7 | Paul Brook | ram_addr_t low_ram_size; |
145 | e69954b9 | pbrook | |
146 | f7c70325 | Paul Brook | switch (board_type) {
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147 | f7c70325 | Paul Brook | case BOARD_EB:
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148 | f7c70325 | Paul Brook | break;
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149 | f7c70325 | Paul Brook | case BOARD_EB_MPCORE:
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150 | f7c70325 | Paul Brook | is_mpcore = 1;
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151 | f7c70325 | Paul Brook | break;
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152 | f7c70325 | Paul Brook | case BOARD_PB_A8:
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153 | f7c70325 | Paul Brook | is_pb = 1;
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154 | f7c70325 | Paul Brook | break;
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155 | f7c70325 | Paul Brook | case BOARD_PBX_A9:
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156 | f7c70325 | Paul Brook | is_mpcore = 1;
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157 | f7c70325 | Paul Brook | is_pb = 1;
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158 | f7c70325 | Paul Brook | break;
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159 | f7c70325 | Paul Brook | } |
160 | c988bfad | Paul Brook | for (n = 0; n < smp_cpus; n++) { |
161 | 9ee6e8bb | pbrook | env = cpu_init(cpu_model); |
162 | 9ee6e8bb | pbrook | if (!env) {
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163 | 9ee6e8bb | pbrook | fprintf(stderr, "Unable to find CPU definition\n");
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164 | 9ee6e8bb | pbrook | exit(1);
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165 | 9ee6e8bb | pbrook | } |
166 | fe7e8758 | Paul Brook | irqp = arm_pic_init_cpu(env); |
167 | fe7e8758 | Paul Brook | cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; |
168 | aaed909a | bellard | } |
169 | 26e92f65 | Paul Brook | if (arm_feature(env, ARM_FEATURE_V7)) {
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170 | f7c70325 | Paul Brook | if (is_mpcore) {
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171 | f7c70325 | Paul Brook | proc_id = 0x0c000000;
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172 | f7c70325 | Paul Brook | } else {
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173 | f7c70325 | Paul Brook | proc_id = 0x0e000000;
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174 | f7c70325 | Paul Brook | } |
175 | 26e92f65 | Paul Brook | } else if (arm_feature(env, ARM_FEATURE_V6K)) { |
176 | 26e92f65 | Paul Brook | proc_id = 0x06000000;
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177 | 26e92f65 | Paul Brook | } else if (arm_feature(env, ARM_FEATURE_V6)) { |
178 | 26e92f65 | Paul Brook | proc_id = 0x04000000;
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179 | 26e92f65 | Paul Brook | } else {
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180 | 26e92f65 | Paul Brook | proc_id = 0x02000000;
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181 | 26e92f65 | Paul Brook | } |
182 | aaed909a | bellard | |
183 | 21a88941 | Paul Brook | if (is_pb && ram_size > 0x20000000) { |
184 | 21a88941 | Paul Brook | /* Core tile RAM. */
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185 | 21a88941 | Paul Brook | low_ram_size = ram_size - 0x20000000;
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186 | 21a88941 | Paul Brook | ram_size = 0x20000000;
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187 | 1724f049 | Alex Williamson | ram_offset = qemu_ram_alloc(NULL, "realview.lowmem", low_ram_size); |
188 | 21a88941 | Paul Brook | cpu_register_physical_memory(0x20000000, low_ram_size,
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189 | 21a88941 | Paul Brook | ram_offset | IO_MEM_RAM); |
190 | 21a88941 | Paul Brook | } |
191 | 21a88941 | Paul Brook | |
192 | 1724f049 | Alex Williamson | ram_offset = qemu_ram_alloc(NULL, "realview.highmem", ram_size); |
193 | 0ef849d7 | Paul Brook | low_ram_size = ram_size; |
194 | 0ef849d7 | Paul Brook | if (low_ram_size > 0x10000000) |
195 | 0ef849d7 | Paul Brook | low_ram_size = 0x10000000;
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196 | e69954b9 | pbrook | /* SDRAM at address zero. */
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197 | 0ef849d7 | Paul Brook | cpu_register_physical_memory(0, low_ram_size, ram_offset | IO_MEM_RAM);
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198 | 0ef849d7 | Paul Brook | if (is_pb) {
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199 | 0ef849d7 | Paul Brook | /* And again at a high address. */
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200 | 0ef849d7 | Paul Brook | cpu_register_physical_memory(0x70000000, ram_size,
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201 | 0ef849d7 | Paul Brook | ram_offset | IO_MEM_RAM); |
202 | 0ef849d7 | Paul Brook | } else {
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203 | 0ef849d7 | Paul Brook | ram_size = low_ram_size; |
204 | 0ef849d7 | Paul Brook | } |
205 | e69954b9 | pbrook | |
206 | 0ef849d7 | Paul Brook | sys_id = is_pb ? 0x01780500 : 0xc1400400; |
207 | 26883c69 | Peter Maydell | sysctl = qdev_create(NULL, "realview_sysctl"); |
208 | 26883c69 | Peter Maydell | qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
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209 | 26883c69 | Peter Maydell | qdev_init_nofail(sysctl); |
210 | 26883c69 | Peter Maydell | qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
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211 | 26883c69 | Peter Maydell | sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000); |
212 | 9ee6e8bb | pbrook | |
213 | c988bfad | Paul Brook | if (is_mpcore) {
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214 | f7c70325 | Paul Brook | dev = qdev_create(NULL, is_pb ? "a9mpcore_priv": "realview_mpcore"); |
215 | c988bfad | Paul Brook | qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
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216 | c988bfad | Paul Brook | qdev_init_nofail(dev); |
217 | c988bfad | Paul Brook | busdev = sysbus_from_qdev(dev); |
218 | f7c70325 | Paul Brook | if (is_pb) {
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219 | f7c70325 | Paul Brook | realview_binfo.smp_priv_base = 0x1f000000;
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220 | f7c70325 | Paul Brook | } else {
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221 | f7c70325 | Paul Brook | realview_binfo.smp_priv_base = 0x10100000;
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222 | f7c70325 | Paul Brook | } |
223 | f7c70325 | Paul Brook | sysbus_mmio_map(busdev, 0, realview_binfo.smp_priv_base);
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224 | c988bfad | Paul Brook | for (n = 0; n < smp_cpus; n++) { |
225 | c988bfad | Paul Brook | sysbus_connect_irq(busdev, n, cpu_irq[n]); |
226 | c988bfad | Paul Brook | } |
227 | 9ee6e8bb | pbrook | } else {
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228 | 0ef849d7 | Paul Brook | uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000; |
229 | 0ef849d7 | Paul Brook | /* For now just create the nIRQ GIC, and ignore the others. */
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230 | 0ef849d7 | Paul Brook | dev = sysbus_create_simple("realview_gic", gic_addr, cpu_irq[0]); |
231 | fe7e8758 | Paul Brook | } |
232 | fe7e8758 | Paul Brook | for (n = 0; n < 64; n++) { |
233 | 067a3ddc | Paul Brook | pic[n] = qdev_get_gpio_in(dev, n); |
234 | 9ee6e8bb | pbrook | } |
235 | 9ee6e8bb | pbrook | |
236 | 86394e96 | Paul Brook | sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]); |
237 | 86394e96 | Paul Brook | sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]); |
238 | e69954b9 | pbrook | |
239 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x10009000, pic[12]); |
240 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x1000a000, pic[13]); |
241 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x1000b000, pic[14]); |
242 | a7d518a6 | Paul Brook | sysbus_create_simple("pl011", 0x1000c000, pic[15]); |
243 | e69954b9 | pbrook | |
244 | e69954b9 | pbrook | /* DMA controller is optional, apparently. */
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245 | b4496b13 | Paul Brook | sysbus_create_simple("pl081", 0x10030000, pic[24]); |
246 | e69954b9 | pbrook | |
247 | 6a824ec3 | Paul Brook | sysbus_create_simple("sp804", 0x10011000, pic[4]); |
248 | 6a824ec3 | Paul Brook | sysbus_create_simple("sp804", 0x10012000, pic[5]); |
249 | e69954b9 | pbrook | |
250 | 26883c69 | Peter Maydell | sysbus_create_simple("pl061", 0x10013000, pic[6]); |
251 | 26883c69 | Peter Maydell | sysbus_create_simple("pl061", 0x10014000, pic[7]); |
252 | 26883c69 | Peter Maydell | gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]); |
253 | 26883c69 | Peter Maydell | |
254 | 2e9bdce5 | Paul Brook | sysbus_create_simple("pl110_versatile", 0x10020000, pic[23]); |
255 | e69954b9 | pbrook | |
256 | 26883c69 | Peter Maydell | dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL); |
257 | 26883c69 | Peter Maydell | /* Wire up MMC card detect and read-only signals. These have
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258 | 26883c69 | Peter Maydell | * to go to both the PL061 GPIO and the sysctl register.
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259 | 26883c69 | Peter Maydell | * Note that the PL181 orders these lines (readonly,inserted)
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260 | 26883c69 | Peter Maydell | * and the PL061 has them the other way about. Also the card
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261 | 26883c69 | Peter Maydell | * detect line is inverted.
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262 | 26883c69 | Peter Maydell | */
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263 | 26883c69 | Peter Maydell | mmc_irq[0] = qemu_irq_split(
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264 | 26883c69 | Peter Maydell | qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT), |
265 | 26883c69 | Peter Maydell | qdev_get_gpio_in(gpio2, 1));
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266 | 26883c69 | Peter Maydell | mmc_irq[1] = qemu_irq_split(
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267 | 26883c69 | Peter Maydell | qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN), |
268 | 26883c69 | Peter Maydell | qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
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269 | 26883c69 | Peter Maydell | qdev_connect_gpio_out(dev, 0, mmc_irq[0]); |
270 | 26883c69 | Peter Maydell | qdev_connect_gpio_out(dev, 1, mmc_irq[1]); |
271 | a1bb27b1 | pbrook | |
272 | a63bdb31 | Paul Brook | sysbus_create_simple("pl031", 0x10017000, pic[10]); |
273 | 7e1543c2 | pbrook | |
274 | 0ef849d7 | Paul Brook | if (!is_pb) {
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275 | 0ef849d7 | Paul Brook | dev = sysbus_create_varargs("realview_pci", 0x60000000, |
276 | 0ef849d7 | Paul Brook | pic[48], pic[49], pic[50], pic[51], NULL); |
277 | 0ef849d7 | Paul Brook | pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
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278 | 0ef849d7 | Paul Brook | if (usb_enabled) {
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279 | a67ba3b6 | Paul Brook | usb_ohci_init_pci(pci_bus, -1);
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280 | 0ef849d7 | Paul Brook | } |
281 | 0ef849d7 | Paul Brook | n = drive_get_max_bus(IF_SCSI); |
282 | 0ef849d7 | Paul Brook | while (n >= 0) { |
283 | 0ef849d7 | Paul Brook | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
284 | 0ef849d7 | Paul Brook | n--; |
285 | 0ef849d7 | Paul Brook | } |
286 | e69954b9 | pbrook | } |
287 | e69954b9 | pbrook | for(n = 0; n < nb_nics; n++) { |
288 | e69954b9 | pbrook | nd = &nd_table[n]; |
289 | 0ae18cee | aliguori | |
290 | e6b3c8ca | Peter Maydell | if (!done_nic && (!nd->model ||
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291 | e6b3c8ca | Peter Maydell | strcmp(nd->model, is_pb ? "lan9118" : "smc91c111") == 0)) { |
292 | 0ef849d7 | Paul Brook | if (is_pb) {
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293 | 0ef849d7 | Paul Brook | lan9118_init(nd, 0x4e000000, pic[28]); |
294 | 0ef849d7 | Paul Brook | } else {
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295 | 0ef849d7 | Paul Brook | smc91c111_init(nd, 0x4e000000, pic[28]); |
296 | 0ef849d7 | Paul Brook | } |
297 | 0ef849d7 | Paul Brook | done_nic = 1;
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298 | e69954b9 | pbrook | } else {
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299 | 07caea31 | Markus Armbruster | pci_nic_init_nofail(nd, "rtl8139", NULL); |
300 | e69954b9 | pbrook | } |
301 | e69954b9 | pbrook | } |
302 | e69954b9 | pbrook | |
303 | eee48504 | Paul Brook | dev = sysbus_create_simple("realview_i2c", 0x10002000, NULL); |
304 | eee48504 | Paul Brook | i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
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305 | eee48504 | Paul Brook | i2c_create_slave(i2c, "ds1338", 0x68); |
306 | eee48504 | Paul Brook | |
307 | e69954b9 | pbrook | /* Memory map for RealView Emulation Baseboard: */
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308 | e69954b9 | pbrook | /* 0x10000000 System registers. */
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309 | e69954b9 | pbrook | /* 0x10001000 System controller. */
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310 | eee48504 | Paul Brook | /* 0x10002000 Two-Wire Serial Bus. */
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311 | e69954b9 | pbrook | /* 0x10003000 Reserved. */
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312 | e69954b9 | pbrook | /* 0x10004000 AACI. */
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313 | e69954b9 | pbrook | /* 0x10005000 MCI. */
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314 | e69954b9 | pbrook | /* 0x10006000 KMI0. */
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315 | e69954b9 | pbrook | /* 0x10007000 KMI1. */
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316 | 0ef849d7 | Paul Brook | /* 0x10008000 Character LCD. (EB) */
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317 | e69954b9 | pbrook | /* 0x10009000 UART0. */
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318 | e69954b9 | pbrook | /* 0x1000a000 UART1. */
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319 | e69954b9 | pbrook | /* 0x1000b000 UART2. */
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320 | e69954b9 | pbrook | /* 0x1000c000 UART3. */
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321 | e69954b9 | pbrook | /* 0x1000d000 SSPI. */
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322 | e69954b9 | pbrook | /* 0x1000e000 SCI. */
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323 | e69954b9 | pbrook | /* 0x1000f000 Reserved. */
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324 | e69954b9 | pbrook | /* 0x10010000 Watchdog. */
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325 | e69954b9 | pbrook | /* 0x10011000 Timer 0+1. */
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326 | e69954b9 | pbrook | /* 0x10012000 Timer 2+3. */
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327 | e69954b9 | pbrook | /* 0x10013000 GPIO 0. */
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328 | e69954b9 | pbrook | /* 0x10014000 GPIO 1. */
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329 | e69954b9 | pbrook | /* 0x10015000 GPIO 2. */
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330 | 0ef849d7 | Paul Brook | /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
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331 | 7e1543c2 | pbrook | /* 0x10017000 RTC. */
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332 | e69954b9 | pbrook | /* 0x10018000 DMC. */
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333 | e69954b9 | pbrook | /* 0x10019000 PCI controller config. */
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334 | e69954b9 | pbrook | /* 0x10020000 CLCD. */
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335 | e69954b9 | pbrook | /* 0x10030000 DMA Controller. */
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336 | 0ef849d7 | Paul Brook | /* 0x10040000 GIC1. (EB) */
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337 | 0ef849d7 | Paul Brook | /* 0x10050000 GIC2. (EB) */
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338 | 0ef849d7 | Paul Brook | /* 0x10060000 GIC3. (EB) */
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339 | 0ef849d7 | Paul Brook | /* 0x10070000 GIC4. (EB) */
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340 | e69954b9 | pbrook | /* 0x10080000 SMC. */
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341 | 0ef849d7 | Paul Brook | /* 0x1e000000 GIC1. (PB) */
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342 | 0ef849d7 | Paul Brook | /* 0x1e001000 GIC2. (PB) */
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343 | 0ef849d7 | Paul Brook | /* 0x1e002000 GIC3. (PB) */
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344 | 0ef849d7 | Paul Brook | /* 0x1e003000 GIC4. (PB) */
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345 | e69954b9 | pbrook | /* 0x40000000 NOR flash. */
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346 | e69954b9 | pbrook | /* 0x44000000 DoC flash. */
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347 | e69954b9 | pbrook | /* 0x48000000 SRAM. */
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348 | e69954b9 | pbrook | /* 0x4c000000 Configuration flash. */
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349 | e69954b9 | pbrook | /* 0x4e000000 Ethernet. */
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350 | e69954b9 | pbrook | /* 0x4f000000 USB. */
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351 | e69954b9 | pbrook | /* 0x50000000 PISMO. */
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352 | e69954b9 | pbrook | /* 0x54000000 PISMO. */
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353 | e69954b9 | pbrook | /* 0x58000000 PISMO. */
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354 | e69954b9 | pbrook | /* 0x5c000000 PISMO. */
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355 | e69954b9 | pbrook | /* 0x60000000 PCI. */
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356 | e69954b9 | pbrook | /* 0x61000000 PCI Self Config. */
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357 | e69954b9 | pbrook | /* 0x62000000 PCI Config. */
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358 | e69954b9 | pbrook | /* 0x63000000 PCI IO. */
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359 | e69954b9 | pbrook | /* 0x64000000 PCI mem 0. */
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360 | e69954b9 | pbrook | /* 0x68000000 PCI mem 1. */
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361 | e69954b9 | pbrook | /* 0x6c000000 PCI mem 2. */
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362 | e69954b9 | pbrook | |
363 | 7ffab4d7 | pbrook | /* ??? Hack to map an additional page of ram for the secondary CPU
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364 | 7ffab4d7 | pbrook | startup code. I guess this works on real hardware because the
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365 | 7ffab4d7 | pbrook | BootROM happens to be in ROM/flash or in memory that isn't clobbered
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366 | 7ffab4d7 | pbrook | until after Linux boots the secondary CPUs. */
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367 | 1724f049 | Alex Williamson | ram_offset = qemu_ram_alloc(NULL, "realview.hack", 0x1000); |
368 | 0ef849d7 | Paul Brook | cpu_register_physical_memory(SMP_BOOT_ADDR, 0x1000,
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369 | 0ef849d7 | Paul Brook | ram_offset | IO_MEM_RAM); |
370 | 7ffab4d7 | pbrook | |
371 | f93eb9ff | balrog | realview_binfo.ram_size = ram_size; |
372 | f93eb9ff | balrog | realview_binfo.kernel_filename = kernel_filename; |
373 | f93eb9ff | balrog | realview_binfo.kernel_cmdline = kernel_cmdline; |
374 | f93eb9ff | balrog | realview_binfo.initrd_filename = initrd_filename; |
375 | c988bfad | Paul Brook | realview_binfo.nb_cpus = smp_cpus; |
376 | f7c70325 | Paul Brook | realview_binfo.board_id = realview_board_id[board_type]; |
377 | 21a88941 | Paul Brook | realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0); |
378 | f93eb9ff | balrog | arm_load_kernel(first_cpu, &realview_binfo); |
379 | e69954b9 | pbrook | } |
380 | e69954b9 | pbrook | |
381 | c988bfad | Paul Brook | static void realview_eb_init(ram_addr_t ram_size, |
382 | c988bfad | Paul Brook | const char *boot_device, |
383 | c988bfad | Paul Brook | const char *kernel_filename, const char *kernel_cmdline, |
384 | c988bfad | Paul Brook | const char *initrd_filename, const char *cpu_model) |
385 | c988bfad | Paul Brook | { |
386 | c988bfad | Paul Brook | if (!cpu_model) {
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387 | c988bfad | Paul Brook | cpu_model = "arm926";
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388 | c988bfad | Paul Brook | } |
389 | c988bfad | Paul Brook | realview_init(ram_size, boot_device, kernel_filename, kernel_cmdline, |
390 | c988bfad | Paul Brook | initrd_filename, cpu_model, BOARD_EB); |
391 | c988bfad | Paul Brook | } |
392 | c988bfad | Paul Brook | |
393 | c988bfad | Paul Brook | static void realview_eb_mpcore_init(ram_addr_t ram_size, |
394 | c988bfad | Paul Brook | const char *boot_device, |
395 | c988bfad | Paul Brook | const char *kernel_filename, const char *kernel_cmdline, |
396 | c988bfad | Paul Brook | const char *initrd_filename, const char *cpu_model) |
397 | c988bfad | Paul Brook | { |
398 | c988bfad | Paul Brook | if (!cpu_model) {
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399 | c988bfad | Paul Brook | cpu_model = "arm11mpcore";
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400 | c988bfad | Paul Brook | } |
401 | c988bfad | Paul Brook | realview_init(ram_size, boot_device, kernel_filename, kernel_cmdline, |
402 | c988bfad | Paul Brook | initrd_filename, cpu_model, BOARD_EB_MPCORE); |
403 | c988bfad | Paul Brook | } |
404 | c988bfad | Paul Brook | |
405 | 0ef849d7 | Paul Brook | static void realview_pb_a8_init(ram_addr_t ram_size, |
406 | 0ef849d7 | Paul Brook | const char *boot_device, |
407 | 0ef849d7 | Paul Brook | const char *kernel_filename, const char *kernel_cmdline, |
408 | 0ef849d7 | Paul Brook | const char *initrd_filename, const char *cpu_model) |
409 | 0ef849d7 | Paul Brook | { |
410 | 0ef849d7 | Paul Brook | if (!cpu_model) {
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411 | 0ef849d7 | Paul Brook | cpu_model = "cortex-a8";
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412 | 0ef849d7 | Paul Brook | } |
413 | 0ef849d7 | Paul Brook | realview_init(ram_size, boot_device, kernel_filename, kernel_cmdline, |
414 | 0ef849d7 | Paul Brook | initrd_filename, cpu_model, BOARD_PB_A8); |
415 | 0ef849d7 | Paul Brook | } |
416 | 0ef849d7 | Paul Brook | |
417 | f7c70325 | Paul Brook | static void realview_pbx_a9_init(ram_addr_t ram_size, |
418 | f7c70325 | Paul Brook | const char *boot_device, |
419 | f7c70325 | Paul Brook | const char *kernel_filename, const char *kernel_cmdline, |
420 | f7c70325 | Paul Brook | const char *initrd_filename, const char *cpu_model) |
421 | f7c70325 | Paul Brook | { |
422 | f7c70325 | Paul Brook | if (!cpu_model) {
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423 | f7c70325 | Paul Brook | cpu_model = "cortex-a9";
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424 | f7c70325 | Paul Brook | } |
425 | f7c70325 | Paul Brook | realview_init(ram_size, boot_device, kernel_filename, kernel_cmdline, |
426 | f7c70325 | Paul Brook | initrd_filename, cpu_model, BOARD_PBX_A9); |
427 | f7c70325 | Paul Brook | } |
428 | f7c70325 | Paul Brook | |
429 | c988bfad | Paul Brook | static QEMUMachine realview_eb_machine = {
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430 | c988bfad | Paul Brook | .name = "realview-eb",
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431 | c9b1ae2c | blueswir1 | .desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)",
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432 | c988bfad | Paul Brook | .init = realview_eb_init, |
433 | c988bfad | Paul Brook | .use_scsi = 1,
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434 | c988bfad | Paul Brook | }; |
435 | c988bfad | Paul Brook | |
436 | c988bfad | Paul Brook | static QEMUMachine realview_eb_mpcore_machine = {
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437 | c988bfad | Paul Brook | .name = "realview-eb-mpcore",
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438 | c988bfad | Paul Brook | .desc = "ARM RealView Emulation Baseboard (ARM11MPCore)",
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439 | c988bfad | Paul Brook | .init = realview_eb_mpcore_init, |
440 | c9b1ae2c | blueswir1 | .use_scsi = 1,
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441 | c988bfad | Paul Brook | .max_cpus = 4,
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442 | e69954b9 | pbrook | }; |
443 | f80f9ec9 | Anthony Liguori | |
444 | 0ef849d7 | Paul Brook | static QEMUMachine realview_pb_a8_machine = {
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445 | 0ef849d7 | Paul Brook | .name = "realview-pb-a8",
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446 | 0ef849d7 | Paul Brook | .desc = "ARM RealView Platform Baseboard for Cortex-A8",
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447 | 0ef849d7 | Paul Brook | .init = realview_pb_a8_init, |
448 | f7c70325 | Paul Brook | }; |
449 | f7c70325 | Paul Brook | |
450 | f7c70325 | Paul Brook | static QEMUMachine realview_pbx_a9_machine = {
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451 | f7c70325 | Paul Brook | .name = "realview-pbx-a9",
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452 | f7c70325 | Paul Brook | .desc = "ARM RealView Platform Baseboard Explore for Cortex-A9",
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453 | f7c70325 | Paul Brook | .init = realview_pbx_a9_init, |
454 | 0ef849d7 | Paul Brook | .use_scsi = 1,
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455 | f7c70325 | Paul Brook | .max_cpus = 4,
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456 | 0ef849d7 | Paul Brook | }; |
457 | 0ef849d7 | Paul Brook | |
458 | f80f9ec9 | Anthony Liguori | static void realview_machine_init(void) |
459 | f80f9ec9 | Anthony Liguori | { |
460 | c988bfad | Paul Brook | qemu_register_machine(&realview_eb_machine); |
461 | c988bfad | Paul Brook | qemu_register_machine(&realview_eb_mpcore_machine); |
462 | 0ef849d7 | Paul Brook | qemu_register_machine(&realview_pb_a8_machine); |
463 | f7c70325 | Paul Brook | qemu_register_machine(&realview_pbx_a9_machine); |
464 | f80f9ec9 | Anthony Liguori | } |
465 | f80f9ec9 | Anthony Liguori | |
466 | f80f9ec9 | Anthony Liguori | machine_init(realview_machine_init); |
467 | eee48504 | Paul Brook | device_init(realview_register_devices) |