root / user-exec.c @ 06ea77bc
History | View | Annotate | Download (20.2 kB)
| 1 |
/*
|
|---|---|
| 2 |
* User emulator execution
|
| 3 |
*
|
| 4 |
* Copyright (c) 2003-2005 Fabrice Bellard
|
| 5 |
*
|
| 6 |
* This library is free software; you can redistribute it and/or
|
| 7 |
* modify it under the terms of the GNU Lesser General Public
|
| 8 |
* License as published by the Free Software Foundation; either
|
| 9 |
* version 2 of the License, or (at your option) any later version.
|
| 10 |
*
|
| 11 |
* This library is distributed in the hope that it will be useful,
|
| 12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
| 14 |
* Lesser General Public License for more details.
|
| 15 |
*
|
| 16 |
* You should have received a copy of the GNU Lesser General Public
|
| 17 |
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
| 18 |
*/
|
| 19 |
#include "config.h" |
| 20 |
#include "exec.h" |
| 21 |
#include "disas.h" |
| 22 |
#include "tcg.h" |
| 23 |
|
| 24 |
#undef EAX
|
| 25 |
#undef ECX
|
| 26 |
#undef EDX
|
| 27 |
#undef EBX
|
| 28 |
#undef ESP
|
| 29 |
#undef EBP
|
| 30 |
#undef ESI
|
| 31 |
#undef EDI
|
| 32 |
#undef EIP
|
| 33 |
#include <signal.h> |
| 34 |
#ifdef __linux__
|
| 35 |
#include <sys/ucontext.h> |
| 36 |
#endif
|
| 37 |
|
| 38 |
//#define DEBUG_SIGNAL
|
| 39 |
|
| 40 |
#if defined(TARGET_I386)
|
| 41 |
#define EXCEPTION_ACTION \
|
| 42 |
raise_exception_err(env->exception_index, env->error_code) |
| 43 |
#else
|
| 44 |
#define EXCEPTION_ACTION \
|
| 45 |
cpu_loop_exit() |
| 46 |
#endif
|
| 47 |
|
| 48 |
/* exit the current TB from a signal handler. The host registers are
|
| 49 |
restored in a state compatible with the CPU emulator
|
| 50 |
*/
|
| 51 |
void cpu_resume_from_signal(CPUState *env1, void *puc) |
| 52 |
{
|
| 53 |
#ifdef __linux__
|
| 54 |
struct ucontext *uc = puc;
|
| 55 |
#elif defined(__OpenBSD__)
|
| 56 |
struct sigcontext *uc = puc;
|
| 57 |
#endif
|
| 58 |
|
| 59 |
env = env1; |
| 60 |
|
| 61 |
/* XXX: restore cpu registers saved in host registers */
|
| 62 |
|
| 63 |
if (puc) {
|
| 64 |
/* XXX: use siglongjmp ? */
|
| 65 |
#ifdef __linux__
|
| 66 |
#ifdef __ia64
|
| 67 |
sigprocmask(SIG_SETMASK, (sigset_t *)&uc->uc_sigmask, NULL);
|
| 68 |
#else
|
| 69 |
sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL);
|
| 70 |
#endif
|
| 71 |
#elif defined(__OpenBSD__)
|
| 72 |
sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL);
|
| 73 |
#endif
|
| 74 |
} |
| 75 |
env->exception_index = -1;
|
| 76 |
longjmp(env->jmp_env, 1);
|
| 77 |
} |
| 78 |
|
| 79 |
/* 'pc' is the host PC at which the exception was raised. 'address' is
|
| 80 |
the effective address of the memory exception. 'is_write' is 1 if a
|
| 81 |
write caused the exception and otherwise 0'. 'old_set' is the
|
| 82 |
signal set which should be restored */
|
| 83 |
static inline int handle_cpu_signal(unsigned long pc, unsigned long address, |
| 84 |
int is_write, sigset_t *old_set,
|
| 85 |
void *puc)
|
| 86 |
{
|
| 87 |
TranslationBlock *tb; |
| 88 |
int ret;
|
| 89 |
|
| 90 |
if (cpu_single_env) {
|
| 91 |
env = cpu_single_env; /* XXX: find a correct solution for multithread */
|
| 92 |
} |
| 93 |
#if defined(DEBUG_SIGNAL)
|
| 94 |
qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
|
| 95 |
pc, address, is_write, *(unsigned long *)old_set); |
| 96 |
#endif
|
| 97 |
/* XXX: locking issue */
|
| 98 |
if (is_write && page_unprotect(h2g(address), pc, puc)) {
|
| 99 |
return 1; |
| 100 |
} |
| 101 |
|
| 102 |
/* see if it is an MMU fault */
|
| 103 |
ret = cpu_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
| 104 |
if (ret < 0) { |
| 105 |
return 0; /* not an MMU fault */ |
| 106 |
} |
| 107 |
if (ret == 0) { |
| 108 |
return 1; /* the MMU fault was handled without causing real CPU fault */ |
| 109 |
} |
| 110 |
/* now we have a real cpu fault */
|
| 111 |
tb = tb_find_pc(pc); |
| 112 |
if (tb) {
|
| 113 |
/* the PC is inside the translated code. It means that we have
|
| 114 |
a virtual CPU fault */
|
| 115 |
cpu_restore_state(tb, env, pc); |
| 116 |
} |
| 117 |
|
| 118 |
/* we restore the process signal mask as the sigreturn should
|
| 119 |
do it (XXX: use sigsetjmp) */
|
| 120 |
sigprocmask(SIG_SETMASK, old_set, NULL);
|
| 121 |
EXCEPTION_ACTION; |
| 122 |
|
| 123 |
/* never comes here */
|
| 124 |
return 1; |
| 125 |
} |
| 126 |
|
| 127 |
#if defined(__i386__)
|
| 128 |
|
| 129 |
#if defined(__APPLE__)
|
| 130 |
#include <sys/ucontext.h> |
| 131 |
|
| 132 |
#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext->ss.eip)) |
| 133 |
#define TRAP_sig(context) ((context)->uc_mcontext->es.trapno)
|
| 134 |
#define ERROR_sig(context) ((context)->uc_mcontext->es.err)
|
| 135 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 136 |
#elif defined(__NetBSD__)
|
| 137 |
#include <ucontext.h> |
| 138 |
|
| 139 |
#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
|
| 140 |
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
|
| 141 |
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
|
| 142 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 143 |
#elif defined(__FreeBSD__) || defined(__DragonFly__)
|
| 144 |
#include <ucontext.h> |
| 145 |
|
| 146 |
#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip)) |
| 147 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
|
| 148 |
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
|
| 149 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 150 |
#elif defined(__OpenBSD__)
|
| 151 |
#define EIP_sig(context) ((context)->sc_eip)
|
| 152 |
#define TRAP_sig(context) ((context)->sc_trapno)
|
| 153 |
#define ERROR_sig(context) ((context)->sc_err)
|
| 154 |
#define MASK_sig(context) ((context)->sc_mask)
|
| 155 |
#else
|
| 156 |
#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
|
| 157 |
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
|
| 158 |
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
|
| 159 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 160 |
#endif
|
| 161 |
|
| 162 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 163 |
void *puc)
|
| 164 |
{
|
| 165 |
siginfo_t *info = pinfo; |
| 166 |
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
|
| 167 |
ucontext_t *uc = puc; |
| 168 |
#elif defined(__OpenBSD__)
|
| 169 |
struct sigcontext *uc = puc;
|
| 170 |
#else
|
| 171 |
struct ucontext *uc = puc;
|
| 172 |
#endif
|
| 173 |
unsigned long pc; |
| 174 |
int trapno;
|
| 175 |
|
| 176 |
#ifndef REG_EIP
|
| 177 |
/* for glibc 2.1 */
|
| 178 |
#define REG_EIP EIP
|
| 179 |
#define REG_ERR ERR
|
| 180 |
#define REG_TRAPNO TRAPNO
|
| 181 |
#endif
|
| 182 |
pc = EIP_sig(uc); |
| 183 |
trapno = TRAP_sig(uc); |
| 184 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 185 |
trapno == 0xe ?
|
| 186 |
(ERROR_sig(uc) >> 1) & 1 : 0, |
| 187 |
&MASK_sig(uc), puc); |
| 188 |
} |
| 189 |
|
| 190 |
#elif defined(__x86_64__)
|
| 191 |
|
| 192 |
#ifdef __NetBSD__
|
| 193 |
#define PC_sig(context) _UC_MACHINE_PC(context)
|
| 194 |
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
|
| 195 |
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
|
| 196 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 197 |
#elif defined(__OpenBSD__)
|
| 198 |
#define PC_sig(context) ((context)->sc_rip)
|
| 199 |
#define TRAP_sig(context) ((context)->sc_trapno)
|
| 200 |
#define ERROR_sig(context) ((context)->sc_err)
|
| 201 |
#define MASK_sig(context) ((context)->sc_mask)
|
| 202 |
#elif defined(__FreeBSD__) || defined(__DragonFly__)
|
| 203 |
#include <ucontext.h> |
| 204 |
|
| 205 |
#define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip)) |
| 206 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
|
| 207 |
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
|
| 208 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 209 |
#else
|
| 210 |
#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
|
| 211 |
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
|
| 212 |
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
|
| 213 |
#define MASK_sig(context) ((context)->uc_sigmask)
|
| 214 |
#endif
|
| 215 |
|
| 216 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 217 |
void *puc)
|
| 218 |
{
|
| 219 |
siginfo_t *info = pinfo; |
| 220 |
unsigned long pc; |
| 221 |
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
|
| 222 |
ucontext_t *uc = puc; |
| 223 |
#elif defined(__OpenBSD__)
|
| 224 |
struct sigcontext *uc = puc;
|
| 225 |
#else
|
| 226 |
struct ucontext *uc = puc;
|
| 227 |
#endif
|
| 228 |
|
| 229 |
pc = PC_sig(uc); |
| 230 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 231 |
TRAP_sig(uc) == 0xe ?
|
| 232 |
(ERROR_sig(uc) >> 1) & 1 : 0, |
| 233 |
&MASK_sig(uc), puc); |
| 234 |
} |
| 235 |
|
| 236 |
#elif defined(_ARCH_PPC)
|
| 237 |
|
| 238 |
/***********************************************************************
|
| 239 |
* signal context platform-specific definitions
|
| 240 |
* From Wine
|
| 241 |
*/
|
| 242 |
#ifdef linux
|
| 243 |
/* All Registers access - only for local access */
|
| 244 |
#define REG_sig(reg_name, context) \
|
| 245 |
((context)->uc_mcontext.regs->reg_name) |
| 246 |
/* Gpr Registers access */
|
| 247 |
#define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context)
|
| 248 |
/* Program counter */
|
| 249 |
#define IAR_sig(context) REG_sig(nip, context)
|
| 250 |
/* Machine State Register (Supervisor) */
|
| 251 |
#define MSR_sig(context) REG_sig(msr, context)
|
| 252 |
/* Count register */
|
| 253 |
#define CTR_sig(context) REG_sig(ctr, context)
|
| 254 |
/* User's integer exception register */
|
| 255 |
#define XER_sig(context) REG_sig(xer, context)
|
| 256 |
/* Link register */
|
| 257 |
#define LR_sig(context) REG_sig(link, context)
|
| 258 |
/* Condition register */
|
| 259 |
#define CR_sig(context) REG_sig(ccr, context)
|
| 260 |
|
| 261 |
/* Float Registers access */
|
| 262 |
#define FLOAT_sig(reg_num, context) \
|
| 263 |
(((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num]) |
| 264 |
#define FPSCR_sig(context) \
|
| 265 |
(*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4))) |
| 266 |
/* Exception Registers access */
|
| 267 |
#define DAR_sig(context) REG_sig(dar, context)
|
| 268 |
#define DSISR_sig(context) REG_sig(dsisr, context)
|
| 269 |
#define TRAP_sig(context) REG_sig(trap, context)
|
| 270 |
#endif /* linux */ |
| 271 |
|
| 272 |
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
|
| 273 |
#include <ucontext.h> |
| 274 |
#define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
|
| 275 |
#define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
|
| 276 |
#define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
|
| 277 |
#define XER_sig(context) ((context)->uc_mcontext.mc_xer)
|
| 278 |
#define LR_sig(context) ((context)->uc_mcontext.mc_lr)
|
| 279 |
#define CR_sig(context) ((context)->uc_mcontext.mc_cr)
|
| 280 |
/* Exception Registers access */
|
| 281 |
#define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
|
| 282 |
#define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
|
| 283 |
#define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
|
| 284 |
#endif /* __FreeBSD__|| __FreeBSD_kernel__ */ |
| 285 |
|
| 286 |
#ifdef __APPLE__
|
| 287 |
#include <sys/ucontext.h> |
| 288 |
typedef struct ucontext SIGCONTEXT; |
| 289 |
/* All Registers access - only for local access */
|
| 290 |
#define REG_sig(reg_name, context) \
|
| 291 |
((context)->uc_mcontext->ss.reg_name) |
| 292 |
#define FLOATREG_sig(reg_name, context) \
|
| 293 |
((context)->uc_mcontext->fs.reg_name) |
| 294 |
#define EXCEPREG_sig(reg_name, context) \
|
| 295 |
((context)->uc_mcontext->es.reg_name) |
| 296 |
#define VECREG_sig(reg_name, context) \
|
| 297 |
((context)->uc_mcontext->vs.reg_name) |
| 298 |
/* Gpr Registers access */
|
| 299 |
#define GPR_sig(reg_num, context) REG_sig(r##reg_num, context) |
| 300 |
/* Program counter */
|
| 301 |
#define IAR_sig(context) REG_sig(srr0, context)
|
| 302 |
/* Machine State Register (Supervisor) */
|
| 303 |
#define MSR_sig(context) REG_sig(srr1, context)
|
| 304 |
#define CTR_sig(context) REG_sig(ctr, context)
|
| 305 |
/* Link register */
|
| 306 |
#define XER_sig(context) REG_sig(xer, context)
|
| 307 |
/* User's integer exception register */
|
| 308 |
#define LR_sig(context) REG_sig(lr, context)
|
| 309 |
/* Condition register */
|
| 310 |
#define CR_sig(context) REG_sig(cr, context)
|
| 311 |
/* Float Registers access */
|
| 312 |
#define FLOAT_sig(reg_num, context) \
|
| 313 |
FLOATREG_sig(fpregs[reg_num], context) |
| 314 |
#define FPSCR_sig(context) \
|
| 315 |
((double)FLOATREG_sig(fpscr, context))
|
| 316 |
/* Exception Registers access */
|
| 317 |
/* Fault registers for coredump */
|
| 318 |
#define DAR_sig(context) EXCEPREG_sig(dar, context)
|
| 319 |
#define DSISR_sig(context) EXCEPREG_sig(dsisr, context)
|
| 320 |
/* number of powerpc exception taken */
|
| 321 |
#define TRAP_sig(context) EXCEPREG_sig(exception, context)
|
| 322 |
#endif /* __APPLE__ */ |
| 323 |
|
| 324 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 325 |
void *puc)
|
| 326 |
{
|
| 327 |
siginfo_t *info = pinfo; |
| 328 |
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
|
| 329 |
ucontext_t *uc = puc; |
| 330 |
#else
|
| 331 |
struct ucontext *uc = puc;
|
| 332 |
#endif
|
| 333 |
unsigned long pc; |
| 334 |
int is_write;
|
| 335 |
|
| 336 |
pc = IAR_sig(uc); |
| 337 |
is_write = 0;
|
| 338 |
#if 0
|
| 339 |
/* ppc 4xx case */
|
| 340 |
if (DSISR_sig(uc) & 0x00800000) {
|
| 341 |
is_write = 1;
|
| 342 |
}
|
| 343 |
#else
|
| 344 |
if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) { |
| 345 |
is_write = 1;
|
| 346 |
} |
| 347 |
#endif
|
| 348 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 349 |
is_write, &uc->uc_sigmask, puc); |
| 350 |
} |
| 351 |
|
| 352 |
#elif defined(__alpha__)
|
| 353 |
|
| 354 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 355 |
void *puc)
|
| 356 |
{
|
| 357 |
siginfo_t *info = pinfo; |
| 358 |
struct ucontext *uc = puc;
|
| 359 |
uint32_t *pc = uc->uc_mcontext.sc_pc; |
| 360 |
uint32_t insn = *pc; |
| 361 |
int is_write = 0; |
| 362 |
|
| 363 |
/* XXX: need kernel patch to get write flag faster */
|
| 364 |
switch (insn >> 26) { |
| 365 |
case 0x0d: /* stw */ |
| 366 |
case 0x0e: /* stb */ |
| 367 |
case 0x0f: /* stq_u */ |
| 368 |
case 0x24: /* stf */ |
| 369 |
case 0x25: /* stg */ |
| 370 |
case 0x26: /* sts */ |
| 371 |
case 0x27: /* stt */ |
| 372 |
case 0x2c: /* stl */ |
| 373 |
case 0x2d: /* stq */ |
| 374 |
case 0x2e: /* stl_c */ |
| 375 |
case 0x2f: /* stq_c */ |
| 376 |
is_write = 1;
|
| 377 |
} |
| 378 |
|
| 379 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 380 |
is_write, &uc->uc_sigmask, puc); |
| 381 |
} |
| 382 |
#elif defined(__sparc__)
|
| 383 |
|
| 384 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 385 |
void *puc)
|
| 386 |
{
|
| 387 |
siginfo_t *info = pinfo; |
| 388 |
int is_write;
|
| 389 |
uint32_t insn; |
| 390 |
#if !defined(__arch64__) || defined(CONFIG_SOLARIS)
|
| 391 |
uint32_t *regs = (uint32_t *)(info + 1);
|
| 392 |
void *sigmask = (regs + 20); |
| 393 |
/* XXX: is there a standard glibc define ? */
|
| 394 |
unsigned long pc = regs[1]; |
| 395 |
#else
|
| 396 |
#ifdef __linux__
|
| 397 |
struct sigcontext *sc = puc;
|
| 398 |
unsigned long pc = sc->sigc_regs.tpc; |
| 399 |
void *sigmask = (void *)sc->sigc_mask; |
| 400 |
#elif defined(__OpenBSD__)
|
| 401 |
struct sigcontext *uc = puc;
|
| 402 |
unsigned long pc = uc->sc_pc; |
| 403 |
void *sigmask = (void *)(long)uc->sc_mask; |
| 404 |
#endif
|
| 405 |
#endif
|
| 406 |
|
| 407 |
/* XXX: need kernel patch to get write flag faster */
|
| 408 |
is_write = 0;
|
| 409 |
insn = *(uint32_t *)pc; |
| 410 |
if ((insn >> 30) == 3) { |
| 411 |
switch ((insn >> 19) & 0x3f) { |
| 412 |
case 0x05: /* stb */ |
| 413 |
case 0x15: /* stba */ |
| 414 |
case 0x06: /* sth */ |
| 415 |
case 0x16: /* stha */ |
| 416 |
case 0x04: /* st */ |
| 417 |
case 0x14: /* sta */ |
| 418 |
case 0x07: /* std */ |
| 419 |
case 0x17: /* stda */ |
| 420 |
case 0x0e: /* stx */ |
| 421 |
case 0x1e: /* stxa */ |
| 422 |
case 0x24: /* stf */ |
| 423 |
case 0x34: /* stfa */ |
| 424 |
case 0x27: /* stdf */ |
| 425 |
case 0x37: /* stdfa */ |
| 426 |
case 0x26: /* stqf */ |
| 427 |
case 0x36: /* stqfa */ |
| 428 |
case 0x25: /* stfsr */ |
| 429 |
case 0x3c: /* casa */ |
| 430 |
case 0x3e: /* casxa */ |
| 431 |
is_write = 1;
|
| 432 |
break;
|
| 433 |
} |
| 434 |
} |
| 435 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 436 |
is_write, sigmask, NULL);
|
| 437 |
} |
| 438 |
|
| 439 |
#elif defined(__arm__)
|
| 440 |
|
| 441 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 442 |
void *puc)
|
| 443 |
{
|
| 444 |
siginfo_t *info = pinfo; |
| 445 |
struct ucontext *uc = puc;
|
| 446 |
unsigned long pc; |
| 447 |
int is_write;
|
| 448 |
|
| 449 |
#if (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3)) |
| 450 |
pc = uc->uc_mcontext.gregs[R15]; |
| 451 |
#else
|
| 452 |
pc = uc->uc_mcontext.arm_pc; |
| 453 |
#endif
|
| 454 |
/* XXX: compute is_write */
|
| 455 |
is_write = 0;
|
| 456 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 457 |
is_write, |
| 458 |
&uc->uc_sigmask, puc); |
| 459 |
} |
| 460 |
|
| 461 |
#elif defined(__mc68000)
|
| 462 |
|
| 463 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 464 |
void *puc)
|
| 465 |
{
|
| 466 |
siginfo_t *info = pinfo; |
| 467 |
struct ucontext *uc = puc;
|
| 468 |
unsigned long pc; |
| 469 |
int is_write;
|
| 470 |
|
| 471 |
pc = uc->uc_mcontext.gregs[16];
|
| 472 |
/* XXX: compute is_write */
|
| 473 |
is_write = 0;
|
| 474 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 475 |
is_write, |
| 476 |
&uc->uc_sigmask, puc); |
| 477 |
} |
| 478 |
|
| 479 |
#elif defined(__ia64)
|
| 480 |
|
| 481 |
#ifndef __ISR_VALID
|
| 482 |
/* This ought to be in <bits/siginfo.h>... */
|
| 483 |
# define __ISR_VALID 1 |
| 484 |
#endif
|
| 485 |
|
| 486 |
int cpu_signal_handler(int host_signum, void *pinfo, void *puc) |
| 487 |
{
|
| 488 |
siginfo_t *info = pinfo; |
| 489 |
struct ucontext *uc = puc;
|
| 490 |
unsigned long ip; |
| 491 |
int is_write = 0; |
| 492 |
|
| 493 |
ip = uc->uc_mcontext.sc_ip; |
| 494 |
switch (host_signum) {
|
| 495 |
case SIGILL:
|
| 496 |
case SIGFPE:
|
| 497 |
case SIGSEGV:
|
| 498 |
case SIGBUS:
|
| 499 |
case SIGTRAP:
|
| 500 |
if (info->si_code && (info->si_segvflags & __ISR_VALID)) {
|
| 501 |
/* ISR.W (write-access) is bit 33: */
|
| 502 |
is_write = (info->si_isr >> 33) & 1; |
| 503 |
} |
| 504 |
break;
|
| 505 |
|
| 506 |
default:
|
| 507 |
break;
|
| 508 |
} |
| 509 |
return handle_cpu_signal(ip, (unsigned long)info->si_addr, |
| 510 |
is_write, |
| 511 |
(sigset_t *)&uc->uc_sigmask, puc); |
| 512 |
} |
| 513 |
|
| 514 |
#elif defined(__s390__)
|
| 515 |
|
| 516 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 517 |
void *puc)
|
| 518 |
{
|
| 519 |
siginfo_t *info = pinfo; |
| 520 |
struct ucontext *uc = puc;
|
| 521 |
unsigned long pc; |
| 522 |
uint16_t *pinsn; |
| 523 |
int is_write = 0; |
| 524 |
|
| 525 |
pc = uc->uc_mcontext.psw.addr; |
| 526 |
|
| 527 |
/* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
|
| 528 |
of the normal 2 arguments. The 3rd argument contains the "int_code"
|
| 529 |
from the hardware which does in fact contain the is_write value.
|
| 530 |
The rt signal handler, as far as I can tell, does not give this value
|
| 531 |
at all. Not that we could get to it from here even if it were. */
|
| 532 |
/* ??? This is not even close to complete, since it ignores all
|
| 533 |
of the read-modify-write instructions. */
|
| 534 |
pinsn = (uint16_t *)pc; |
| 535 |
switch (pinsn[0] >> 8) { |
| 536 |
case 0x50: /* ST */ |
| 537 |
case 0x42: /* STC */ |
| 538 |
case 0x40: /* STH */ |
| 539 |
is_write = 1;
|
| 540 |
break;
|
| 541 |
case 0xc4: /* RIL format insns */ |
| 542 |
switch (pinsn[0] & 0xf) { |
| 543 |
case 0xf: /* STRL */ |
| 544 |
case 0xb: /* STGRL */ |
| 545 |
case 0x7: /* STHRL */ |
| 546 |
is_write = 1;
|
| 547 |
} |
| 548 |
break;
|
| 549 |
case 0xe3: /* RXY format insns */ |
| 550 |
switch (pinsn[2] & 0xff) { |
| 551 |
case 0x50: /* STY */ |
| 552 |
case 0x24: /* STG */ |
| 553 |
case 0x72: /* STCY */ |
| 554 |
case 0x70: /* STHY */ |
| 555 |
case 0x8e: /* STPQ */ |
| 556 |
case 0x3f: /* STRVH */ |
| 557 |
case 0x3e: /* STRV */ |
| 558 |
case 0x2f: /* STRVG */ |
| 559 |
is_write = 1;
|
| 560 |
} |
| 561 |
break;
|
| 562 |
} |
| 563 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 564 |
is_write, &uc->uc_sigmask, puc); |
| 565 |
} |
| 566 |
|
| 567 |
#elif defined(__mips__)
|
| 568 |
|
| 569 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 570 |
void *puc)
|
| 571 |
{
|
| 572 |
siginfo_t *info = pinfo; |
| 573 |
struct ucontext *uc = puc;
|
| 574 |
greg_t pc = uc->uc_mcontext.pc; |
| 575 |
int is_write;
|
| 576 |
|
| 577 |
/* XXX: compute is_write */
|
| 578 |
is_write = 0;
|
| 579 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 580 |
is_write, &uc->uc_sigmask, puc); |
| 581 |
} |
| 582 |
|
| 583 |
#elif defined(__hppa__)
|
| 584 |
|
| 585 |
int cpu_signal_handler(int host_signum, void *pinfo, |
| 586 |
void *puc)
|
| 587 |
{
|
| 588 |
struct siginfo *info = pinfo;
|
| 589 |
struct ucontext *uc = puc;
|
| 590 |
unsigned long pc = uc->uc_mcontext.sc_iaoq[0]; |
| 591 |
uint32_t insn = *(uint32_t *)pc; |
| 592 |
int is_write = 0; |
| 593 |
|
| 594 |
/* XXX: need kernel patch to get write flag faster. */
|
| 595 |
switch (insn >> 26) { |
| 596 |
case 0x1a: /* STW */ |
| 597 |
case 0x19: /* STH */ |
| 598 |
case 0x18: /* STB */ |
| 599 |
case 0x1b: /* STWM */ |
| 600 |
is_write = 1;
|
| 601 |
break;
|
| 602 |
|
| 603 |
case 0x09: /* CSTWX, FSTWX, FSTWS */ |
| 604 |
case 0x0b: /* CSTDX, FSTDX, FSTDS */ |
| 605 |
/* Distinguish from coprocessor load ... */
|
| 606 |
is_write = (insn >> 9) & 1; |
| 607 |
break;
|
| 608 |
|
| 609 |
case 0x03: |
| 610 |
switch ((insn >> 6) & 15) { |
| 611 |
case 0xa: /* STWS */ |
| 612 |
case 0x9: /* STHS */ |
| 613 |
case 0x8: /* STBS */ |
| 614 |
case 0xe: /* STWAS */ |
| 615 |
case 0xc: /* STBYS */ |
| 616 |
is_write = 1;
|
| 617 |
} |
| 618 |
break;
|
| 619 |
} |
| 620 |
|
| 621 |
return handle_cpu_signal(pc, (unsigned long)info->si_addr, |
| 622 |
is_write, &uc->uc_sigmask, puc); |
| 623 |
} |
| 624 |
|
| 625 |
#else
|
| 626 |
|
| 627 |
#error host CPU specific signal handler needed
|
| 628 |
|
| 629 |
#endif
|
| 630 |
|
| 631 |
#if defined(TARGET_I386)
|
| 632 |
|
| 633 |
void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector) |
| 634 |
{
|
| 635 |
CPUX86State *saved_env; |
| 636 |
|
| 637 |
saved_env = env; |
| 638 |
env = s; |
| 639 |
if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) { |
| 640 |
selector &= 0xffff;
|
| 641 |
cpu_x86_load_seg_cache(env, seg_reg, selector, |
| 642 |
(selector << 4), 0xffff, 0); |
| 643 |
} else {
|
| 644 |
helper_load_seg(seg_reg, selector); |
| 645 |
} |
| 646 |
env = saved_env; |
| 647 |
} |
| 648 |
|
| 649 |
void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32) |
| 650 |
{
|
| 651 |
CPUX86State *saved_env; |
| 652 |
|
| 653 |
saved_env = env; |
| 654 |
env = s; |
| 655 |
|
| 656 |
helper_fsave(ptr, data32); |
| 657 |
|
| 658 |
env = saved_env; |
| 659 |
} |
| 660 |
|
| 661 |
void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32) |
| 662 |
{
|
| 663 |
CPUX86State *saved_env; |
| 664 |
|
| 665 |
saved_env = env; |
| 666 |
env = s; |
| 667 |
|
| 668 |
helper_frstor(ptr, data32); |
| 669 |
|
| 670 |
env = saved_env; |
| 671 |
} |
| 672 |
|
| 673 |
#endif /* TARGET_I386 */ |