Statistics
| Branch: | Revision:

root / translate-all.c @ 079d0b7f

History | View | Annotate | Download (4.2 kB)

1 d19893da bellard
/*
2 d19893da bellard
 *  Host code generation
3 5fafdf24 ths
 *
4 d19893da bellard
 *  Copyright (c) 2003 Fabrice Bellard
5 d19893da bellard
 *
6 d19893da bellard
 * This library is free software; you can redistribute it and/or
7 d19893da bellard
 * modify it under the terms of the GNU Lesser General Public
8 d19893da bellard
 * License as published by the Free Software Foundation; either
9 d19893da bellard
 * version 2 of the License, or (at your option) any later version.
10 d19893da bellard
 *
11 d19893da bellard
 * This library is distributed in the hope that it will be useful,
12 d19893da bellard
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 d19893da bellard
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14 d19893da bellard
 * Lesser General Public License for more details.
15 d19893da bellard
 *
16 d19893da bellard
 * You should have received a copy of the GNU Lesser General Public
17 8167ee88 Blue Swirl
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 d19893da bellard
 */
19 d19893da bellard
#include <stdarg.h>
20 d19893da bellard
#include <stdlib.h>
21 d19893da bellard
#include <stdio.h>
22 d19893da bellard
#include <string.h>
23 d19893da bellard
#include <inttypes.h>
24 d19893da bellard
25 d19893da bellard
#include "config.h"
26 2054396a bellard
27 af5ad107 bellard
#define NO_CPU_IO_DEFS
28 d3eead2e bellard
#include "cpu.h"
29 d19893da bellard
#include "disas.h"
30 57fec1fe bellard
#include "tcg.h"
31 29e922b6 Blue Swirl
#include "qemu-timer.h"
32 d19893da bellard
33 57fec1fe bellard
/* code generation context */
34 57fec1fe bellard
TCGContext tcg_ctx;
35 d19893da bellard
36 d19893da bellard
uint16_t gen_opc_buf[OPC_BUF_SIZE];
37 57fec1fe bellard
TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
38 c4687878 bellard
39 c4687878 bellard
target_ulong gen_opc_pc[OPC_BUF_SIZE];
40 2e70f6ef pbrook
uint16_t gen_opc_icount[OPC_BUF_SIZE];
41 d19893da bellard
uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
42 d19893da bellard
43 57fec1fe bellard
void cpu_gen_init(void)
44 57fec1fe bellard
{
45 57fec1fe bellard
    tcg_context_init(&tcg_ctx); 
46 57fec1fe bellard
}
47 57fec1fe bellard
48 d19893da bellard
/* return non zero if the very first instruction is invalid so that
49 5fafdf24 ths
   the virtual CPU can trigger an exception.
50 d19893da bellard

51 d19893da bellard
   '*gen_code_size_ptr' contains the size of the generated code (host
52 d19893da bellard
   code).
53 d19893da bellard
*/
54 d07bde88 blueswir1
int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
55 d19893da bellard
{
56 57fec1fe bellard
    TCGContext *s = &tcg_ctx;
57 d19893da bellard
    uint8_t *gen_code_buf;
58 d19893da bellard
    int gen_code_size;
59 57fec1fe bellard
#ifdef CONFIG_PROFILER
60 57fec1fe bellard
    int64_t ti;
61 57fec1fe bellard
#endif
62 57fec1fe bellard
63 57fec1fe bellard
#ifdef CONFIG_PROFILER
64 b67d9a52 bellard
    s->tb_count1++; /* includes aborted translations because of
65 b67d9a52 bellard
                       exceptions */
66 57fec1fe bellard
    ti = profile_getclock();
67 57fec1fe bellard
#endif
68 57fec1fe bellard
    tcg_func_start(s);
69 d19893da bellard
70 2cfc5f17 ths
    gen_intermediate_code(env, tb);
71 2cfc5f17 ths
72 ec6338ba bellard
    /* generate machine code */
73 57fec1fe bellard
    gen_code_buf = tb->tc_ptr;
74 ec6338ba bellard
    tb->tb_next_offset[0] = 0xffff;
75 ec6338ba bellard
    tb->tb_next_offset[1] = 0xffff;
76 57fec1fe bellard
    s->tb_next_offset = tb->tb_next_offset;
77 4cbb86e1 bellard
#ifdef USE_DIRECT_JUMP
78 57fec1fe bellard
    s->tb_jmp_offset = tb->tb_jmp_offset;
79 57fec1fe bellard
    s->tb_next = NULL;
80 d19893da bellard
#else
81 57fec1fe bellard
    s->tb_jmp_offset = NULL;
82 57fec1fe bellard
    s->tb_next = tb->tb_next;
83 d19893da bellard
#endif
84 57fec1fe bellard
85 57fec1fe bellard
#ifdef CONFIG_PROFILER
86 b67d9a52 bellard
    s->tb_count++;
87 b67d9a52 bellard
    s->interm_time += profile_getclock() - ti;
88 b67d9a52 bellard
    s->code_time -= profile_getclock();
89 57fec1fe bellard
#endif
90 54604f74 aurel32
    gen_code_size = tcg_gen_code(s, gen_code_buf);
91 d19893da bellard
    *gen_code_size_ptr = gen_code_size;
92 57fec1fe bellard
#ifdef CONFIG_PROFILER
93 b67d9a52 bellard
    s->code_time += profile_getclock();
94 b67d9a52 bellard
    s->code_in_len += tb->size;
95 b67d9a52 bellard
    s->code_out_len += gen_code_size;
96 57fec1fe bellard
#endif
97 57fec1fe bellard
98 d19893da bellard
#ifdef DEBUG_DISAS
99 8fec2b8c aliguori
    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
100 93fcfe39 aliguori
        qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
101 93fcfe39 aliguori
        log_disas(tb->tc_ptr, *gen_code_size_ptr);
102 93fcfe39 aliguori
        qemu_log("\n");
103 31b1a7b4 aliguori
        qemu_log_flush();
104 d19893da bellard
    }
105 d19893da bellard
#endif
106 d19893da bellard
    return 0;
107 d19893da bellard
}
108 d19893da bellard
109 5fafdf24 ths
/* The cpu state corresponding to 'searched_pc' is restored.
110 d19893da bellard
 */
111 5fafdf24 ths
int cpu_restore_state(TranslationBlock *tb,
112 618ba8e6 Stefan Weil
                      CPUState *env, unsigned long searched_pc)
113 d19893da bellard
{
114 57fec1fe bellard
    TCGContext *s = &tcg_ctx;
115 57fec1fe bellard
    int j;
116 d19893da bellard
    unsigned long tc_ptr;
117 57fec1fe bellard
#ifdef CONFIG_PROFILER
118 57fec1fe bellard
    int64_t ti;
119 57fec1fe bellard
#endif
120 57fec1fe bellard
121 57fec1fe bellard
#ifdef CONFIG_PROFILER
122 57fec1fe bellard
    ti = profile_getclock();
123 57fec1fe bellard
#endif
124 57fec1fe bellard
    tcg_func_start(s);
125 d19893da bellard
126 2cfc5f17 ths
    gen_intermediate_code_pc(env, tb);
127 3b46e624 ths
128 2e70f6ef pbrook
    if (use_icount) {
129 2e70f6ef pbrook
        /* Reset the cycle counter to the start of the block.  */
130 2e70f6ef pbrook
        env->icount_decr.u16.low += tb->icount;
131 2e70f6ef pbrook
        /* Clear the IO flag.  */
132 2e70f6ef pbrook
        env->can_do_io = 0;
133 2e70f6ef pbrook
    }
134 2e70f6ef pbrook
135 d19893da bellard
    /* find opc index corresponding to search_pc */
136 d19893da bellard
    tc_ptr = (unsigned long)tb->tc_ptr;
137 d19893da bellard
    if (searched_pc < tc_ptr)
138 d19893da bellard
        return -1;
139 57fec1fe bellard
140 57fec1fe bellard
    s->tb_next_offset = tb->tb_next_offset;
141 57fec1fe bellard
#ifdef USE_DIRECT_JUMP
142 57fec1fe bellard
    s->tb_jmp_offset = tb->tb_jmp_offset;
143 57fec1fe bellard
    s->tb_next = NULL;
144 57fec1fe bellard
#else
145 57fec1fe bellard
    s->tb_jmp_offset = NULL;
146 57fec1fe bellard
    s->tb_next = tb->tb_next;
147 57fec1fe bellard
#endif
148 54604f74 aurel32
    j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
149 57fec1fe bellard
    if (j < 0)
150 57fec1fe bellard
        return -1;
151 d19893da bellard
    /* now find start of instruction before */
152 d19893da bellard
    while (gen_opc_instr_start[j] == 0)
153 d19893da bellard
        j--;
154 2e70f6ef pbrook
    env->icount_decr.u16.low -= gen_opc_icount[j];
155 3b46e624 ths
156 e87b7cb0 Stefan Weil
    restore_state_to_opc(env, tb, j);
157 57fec1fe bellard
158 57fec1fe bellard
#ifdef CONFIG_PROFILER
159 b67d9a52 bellard
    s->restore_time += profile_getclock() - ti;
160 b67d9a52 bellard
    s->restore_count++;
161 57fec1fe bellard
#endif
162 d19893da bellard
    return 0;
163 d19893da bellard
}