Archipelago » qemu

/*

 *  PPC emulation for qemu: main translation routines.

 * 

 *  Copyright (c) 2003 Jocelyn Mayer

 *

 * This library is free software; you can redistribute it and/or

 * modify it under the terms of the GNU Lesser General Public

 * License as published by the Free Software Foundation; either

 * version 2 of the License, or (at your option) any later version.

 *

 * This library is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * Lesser General Public License for more details.

 *

 * You should have received a copy of the GNU Lesser General Public

 * License along with this library; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#include "dyngen-exec.h"

#include "cpu.h"

#include "exec.h"

#include "disas.h"

//#define DO_SINGLE_STEP

//#define DO_STEP_FLUSH

enum {

#define DEF(s, n, copy_size) INDEX_op_ ## s,

#include "opc.h"

#undef DEF

    NB_OPS,

};

static uint16_t *gen_opc_ptr;

static uint32_t *gen_opparam_ptr;

#include "gen-op.h"

typedef void (GenOpFunc)(void);

#define GEN8(func, NAME) \

static GenOpFunc *NAME ## _table [8] = {\

NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,\

NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,\

};\

static inline void func(int n)\

{\

    NAME ## _table[n]();\

}

#define GEN32(func, NAME) \

static GenOpFunc *NAME ## _table [32] = {\

NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3,\

NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7,\

NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11,\

NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15,\

NAME ## 16, NAME ## 17, NAME ## 18, NAME ## 19,\

NAME ## 20, NAME ## 21, NAME ## 22, NAME ## 23,\

NAME ## 24, NAME ## 25, NAME ## 26, NAME ## 27,\

NAME ## 28, NAME ## 29, NAME ## 30, NAME ## 31,\

};\

static inline void func(int n)\

{\

    NAME ## _table[n]();\

}

GEN8(gen_op_load_crf_T0, gen_op_load_crf_T0_crf)

GEN8(gen_op_load_crf_T1, gen_op_load_crf_T1_crf)

GEN8(gen_op_store_T0_crf, gen_op_store_T0_crf_crf)

GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf)

GEN32(gen_op_load_gpr_T0, gen_op_load_gpr_T0_gpr)

GEN32(gen_op_load_gpr_T1, gen_op_load_gpr_T1_gpr)

GEN32(gen_op_load_gpr_T2, gen_op_load_gpr_T2_gpr)

GEN32(gen_op_store_T0_gpr, gen_op_store_T0_gpr_gpr)

GEN32(gen_op_store_T1_gpr, gen_op_store_T1_gpr_gpr)

GEN32(gen_op_store_T2_gpr, gen_op_store_T2_gpr_gpr)

GEN32(gen_op_load_FT0_fpr, gen_op_load_FT0_fpr)

GEN32(gen_op_store_FT0_fpr, gen_op_store_FT0_fpr)

static uint8_t  spr_access[1024 / 2];

/* internal defines */

typedef struct DisasContext {

    struct TranslationBlock *tb;

    uint32_t *nip;

    uint32_t opcode;

    int exception;

    int retcode;

    /* Time base */

    uint32_t tb_offset;

    int supervisor;

} DisasContext;

typedef struct opc_handler_t {

    /* invalid bits */

    uint32_t inval;

    /* handler */

    void (*handler)(DisasContext *ctx);

} opc_handler_t;

#define SET_RETVAL(n)                                                         \

do {                                                                          \

    if ((n) != 0) {                                                           \

        ctx->exception = (n);                                                 \

    }                                                                         \

    return;                                                                   \

} while (0)

#define GET_RETVAL(func, __opcode)                                            \

({                                                                            \

    (func)(&ctx);                                                             \

    ctx.exception;                                                            \

})

#define GEN_HANDLER(name, opc1, opc2, opc3, inval, type)                      \

static void gen_##name (DisasContext *ctx);                                   \

GEN_OPCODE(name, opc1, opc2, opc3, inval, type);                              \

static void gen_##name (DisasContext *ctx)

/* Instruction types */

enum {

    PPC_INTEGER  = 0x0001, /* CPU has integer operations instructions        */

    PPC_FLOAT    = 0x0002, /* CPU has floating point operations instructions */

    PPC_FLOW     = 0x0004, /* CPU has flow control instructions              */

    PPC_MEM      = 0x0008, /* CPU has virtual memory instructions            */

    PPC_MISC     = 0x0010, /* CPU has spr/msr access instructions            */

    PPC_EXTERN   = 0x0020, /* CPU has external control instructions          */

    PPC_SEGMENT  = 0x0040, /* CPU has memory segment instructions            */

};

typedef struct opcode_t {

    unsigned char opc1, opc2, opc3;

    uint32_t type;

    opc_handler_t handler;

} opcode_t;

/* XXX: move that elsewhere */

extern FILE *logfile;

extern int loglevel;

/* XXX: shouldn't stay all alone here ! */

static int reserve = 0;

/***                           Instruction decoding                        ***/

#define EXTRACT_HELPER(name, shift, nb)                                       \

static inline uint32_t name (uint32_t opcode)                                 \

{                                                                             \

    return (opcode >> (shift)) & ((1 << (nb)) - 1);                           \

}

#define EXTRACT_SHELPER(name, shift, nb)                                      \

static inline int32_t name (uint32_t opcode)                                  \

{                                                                             \

    return s_ext16((opcode >> (shift)) & ((1 << (nb)) - 1));                  \

}

/* Opcode part 1 */

EXTRACT_HELPER(opc1, 26, 6);

/* Opcode part 2 */

EXTRACT_HELPER(opc2, 1, 5);

/* Opcode part 3 */

EXTRACT_HELPER(opc3, 6, 5);

/* Update Cr0 flags */

EXTRACT_HELPER(Rc, 0, 1);

/* Destination */

EXTRACT_HELPER(rD, 21, 5);

/* Source */

EXTRACT_HELPER(rS, 21, 5);

/* First operand */

EXTRACT_HELPER(rA, 16, 5);

/* Second operand */

EXTRACT_HELPER(rB, 11, 5);

/* Third operand */

EXTRACT_HELPER(rC, 6, 5);

/***                               Get CRn                                 ***/

EXTRACT_HELPER(crfD, 23, 3);

EXTRACT_HELPER(crfS, 18, 3);

EXTRACT_HELPER(crbD, 21, 5);

EXTRACT_HELPER(crbA, 16, 5);

EXTRACT_HELPER(crbB, 11, 5);

/* SPR / TBL */

EXTRACT_HELPER(SPR, 11, 10);

/***                              Get constants                            ***/

EXTRACT_HELPER(IMM, 12, 8);

/* 16 bits signed immediate value */

EXTRACT_SHELPER(SIMM, 0, 16);

/* 16 bits unsigned immediate value */

EXTRACT_HELPER(UIMM, 0, 16);

/* Bit count */

EXTRACT_HELPER(NB, 11, 5);

/* Shift count */

EXTRACT_HELPER(SH, 11, 5);

/* Mask start */

EXTRACT_HELPER(MB, 6, 5);

/* Mask end */

EXTRACT_HELPER(ME, 1, 5);

EXTRACT_HELPER(CRM, 12, 8);

EXTRACT_HELPER(FM, 17, 8);

EXTRACT_HELPER(SR, 16, 4);

/***                            Jump target decoding                       ***/

/* Displacement */

EXTRACT_SHELPER(d, 0, 16);

/* Immediate address */

static inline uint32_t LI (uint32_t opcode)

{

    return (opcode >> 0) & 0x03FFFFFC;

}

static inline uint32_t BD (uint32_t opcode)

{

    return (opcode >> 0) & 0xFFFC;

}

EXTRACT_HELPER(BO, 21, 5);

EXTRACT_HELPER(BI, 16, 5);

/* Absolute/relative address */

EXTRACT_HELPER(AA, 1, 1);

/* Link */

EXTRACT_HELPER(LK, 0, 1);

/* Create a mask between <start> and <end> bits */

static inline uint32_t MASK (uint32_t start, uint32_t end)

{

    uint32_t ret;

    ret = (((uint32_t)(-1)) >> (start)) ^ (((uint32_t)(-1) >> (end)) >> 1);

    if (start > end)

        return ~ret;

    return ret;

}

#define GEN_OPCODE(name, op1, op2, op3, invl, _typ)                           \

__attribute__ ((section(".opcodes"), unused))                                 \

static opcode_t opc_##name = {                                                \

    .opc1 = op1,                                                              \

    .opc2 = op2,                                                              \

    .opc3 = op3,                                                              \

    .type = _typ,                                                             \

    .handler = {                                                              \

        .inval   = invl,                                                      \

        .handler = &gen_##name,                                               \

    },                                                                        \

}

#define GEN_OPCODE_MARK(name)                                                 \

__attribute__ ((section(".opcodes"), unused))                                 \

static opcode_t opc_##name = {                                                \

    .opc1 = 0xFF,                                                             \

    .opc2 = 0xFF,                                                             \

    .opc3 = 0xFF,                                                             \

    .type = 0x00,                                                             \

    .handler = {                                                              \

        .inval   = 0x00000000,                                                \

        .handler = NULL,                                                      \

    },                                                                        \

}

/* Start opcode list */

GEN_OPCODE_MARK(start);

/* Invalid instruction */

GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, 0)

{

    /* Branch to next instruction to force nip update */

    gen_op_b((uint32_t)ctx->nip);

    SET_RETVAL(EXCP_INVAL);

}

static opc_handler_t invalid_handler = {

    .inval   = 0xFFFFFFFF,

    .handler = gen_invalid,

};

/***                           Integer arithmetic                          ***/

#define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval)                       \

GEN_HANDLER(name, opc1, opc2, opc3, inval, PPC_INTEGER)                       \

{                                                                             \

    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \

    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0();                                                     \

    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

#define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval)                     \

GEN_HANDLER(name, opc1, opc2, opc3, inval, PPC_INTEGER)                       \

{                                                                             \

    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \

    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0_ov();                                                  \

    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

#define __GEN_INT_ARITH1(name, opc1, opc2, opc3)                              \

GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, PPC_INTEGER)                  \

{                                                                             \

    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0();                                                     \

    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

#define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3)                            \

GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, PPC_INTEGER)                  \

{                                                                             \

    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0_ov();                                                  \

    gen_op_store_T0_gpr(rD(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

/* Two operands arithmetic functions */

#define GEN_INT_ARITH2(name, opc1, opc2, opc3)                                \

__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000)                          \

__GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 | 0x10, 0x00000000)

/* Two operands arithmetic functions with no overflow allowed */

#define GEN_INT_ARITHN(name, opc1, opc2, opc3)                                \

__GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400)

/* One operand arithmetic functions */

#define GEN_INT_ARITH1(name, opc1, opc2, opc3)                                \

__GEN_INT_ARITH1(name, opc1, opc2, opc3)                                      \

__GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 | 0x10)

/* add    add.    addo    addo.    */

GEN_INT_ARITH2 (add,    0x1F, 0x0A, 0x08);

/* addc   addc.   addco   addco.   */

GEN_INT_ARITH2 (addc,   0x1F, 0x0A, 0x00);

/* adde   adde.   addeo   addeo.   */

GEN_INT_ARITH2 (adde,   0x1F, 0x0A, 0x04);

/* addme  addme.  addmeo  addmeo.  */

GEN_INT_ARITH1 (addme,  0x1F, 0x0A, 0x07);

/* addze  addze.  addzeo  addzeo.  */

GEN_INT_ARITH1 (addze,  0x1F, 0x0A, 0x06);

/* divw   divw.   divwo   divwo.   */

GEN_INT_ARITH2 (divw,   0x1F, 0x0B, 0x0F);

/* divwu  divwu.  divwuo  divwuo.  */

GEN_INT_ARITH2 (divwu,  0x1F, 0x0B, 0x0E);

/* mulhw  mulhw.                   */

GEN_INT_ARITHN (mulhw,  0x1F, 0x0B, 0x02);

/* mulhwu mulhwu.                  */

GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00);

/* mullw  mullw.  mullwo  mullwo.  */

GEN_INT_ARITH2 (mullw,  0x1F, 0x0B, 0x07);

/* neg    neg.    nego    nego.    */

GEN_INT_ARITH1 (neg,    0x1F, 0x08, 0x03);

/* subf   subf.   subfo   subfo.   */

GEN_INT_ARITH2 (subf,   0x1F, 0x08, 0x01);

/* subfc  subfc.  subfco  subfco.  */

GEN_INT_ARITH2 (subfc,  0x1F, 0x08, 0x00);

/* subfe  subfe.  subfeo  subfeo.  */

GEN_INT_ARITH2 (subfe,  0x1F, 0x08, 0x04);

/* subfme subfme. subfmeo subfmeo. */

GEN_INT_ARITH1 (subfme, 0x1F, 0x08, 0x07);

/* subfze subfze. subfzeo subfzeo. */

GEN_INT_ARITH1 (subfze, 0x1F, 0x08, 0x06);

/* addi */

GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    int32_t simm = SIMM(ctx->opcode);

    if (rA(ctx->opcode) == 0) {

        gen_op_set_T0(simm);

    } else {

        gen_op_load_gpr_T0(rA(ctx->opcode));

        gen_op_addi(simm);

    }

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/* addic */

GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_addic(SIMM(ctx->opcode));

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/* addic. */

GEN_HANDLER(addic_, 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_addic(SIMM(ctx->opcode));

    gen_op_set_Rc0();

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/* addis */

GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    int32_t simm = SIMM(ctx->opcode);

    if (rA(ctx->opcode) == 0) {

        gen_op_set_T0(simm << 16);

    } else {

        gen_op_load_gpr_T0(rA(ctx->opcode));

        gen_op_addi(simm << 16);

    }

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/* mulli */

GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_mulli(SIMM(ctx->opcode));

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/* subfic */

GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_subfic(SIMM(ctx->opcode));

    gen_op_store_T0_gpr(rD(ctx->opcode));

    SET_RETVAL(0);

}

/***                           Integer comparison                          ***/

#define GEN_CMP(name, opc)                                                    \

GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, PPC_INTEGER)                   \

{                                                                             \

    gen_op_load_gpr_T0(rA(ctx->opcode));                                      \

    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    gen_op_store_T0_crf(crfD(ctx->opcode));                                   \

    SET_RETVAL(0);                                                            \

}

/* cmp */

GEN_CMP(cmp, 0x00);

/* cmpi */

GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_cmpi(SIMM(ctx->opcode));

    gen_op_store_T0_crf(crfD(ctx->opcode));

    SET_RETVAL(0);

}

/* cmpl */

GEN_CMP(cmpl, 0x01);

/* cmpli */

GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rA(ctx->opcode));

    gen_op_cmpli(UIMM(ctx->opcode));

    gen_op_store_T0_crf(crfD(ctx->opcode));

    SET_RETVAL(0);

}

/***                            Integer logical                            ***/

#define __GEN_LOGICAL2(name, opc2, opc3)                                      \

GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, PPC_INTEGER)                  \

{                                                                             \

    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \

    gen_op_load_gpr_T1(rB(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0();                                                     \

    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

#define GEN_LOGICAL2(name, opc)                                               \

__GEN_LOGICAL2(name, 0x1C, opc)

#define GEN_LOGICAL1(name, opc)                                               \

GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, PPC_INTEGER)                   \

{                                                                             \

    gen_op_load_gpr_T0(rS(ctx->opcode));                                      \

    gen_op_##name();                                                          \

    if (Rc(ctx->opcode) != 0)                                                 \

        gen_op_set_Rc0();                                                     \

    gen_op_store_T0_gpr(rA(ctx->opcode));                                     \

    SET_RETVAL(0);                                                            \

}

/* and & and. */

GEN_LOGICAL2(and, 0x00);

/* andc & andc. */

GEN_LOGICAL2(andc, 0x01);

/* andi. */

GEN_HANDLER(andi_, 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_andi_(UIMM(ctx->opcode));

    gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* andis. */

GEN_HANDLER(andis_, 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_andi_(UIMM(ctx->opcode) << 16);

    gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* cntlzw */

GEN_LOGICAL1(cntlzw, 0x00);

/* eqv & eqv. */

GEN_LOGICAL2(eqv, 0x08);

/* extsb & extsb. */

GEN_LOGICAL1(extsb, 0x1D);

/* extsh & extsh. */

GEN_LOGICAL1(extsh, 0x1C);

/* nand & nand. */

GEN_LOGICAL2(nand, 0x0E);

/* nor & nor. */

GEN_LOGICAL2(nor, 0x03);

/* or & or. */

GEN_LOGICAL2(or, 0x0D);

/* orc & orc. */

GEN_LOGICAL2(orc, 0x0C);

/* xor & xor. */

GEN_LOGICAL2(xor, 0x09);

/* ori */

GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    uint32_t uimm = UIMM(ctx->opcode);

#if 0

    if (uimm == 0) {

        if (rA(ctx->opcode) != rS(ctx->opcode)) {

            gen_op_load_gpr_T0(rS(ctx->opcode));

            gen_op_store_T0_gpr(rA(ctx->opcode));

        }

    } else

#endif

    {

        gen_op_load_gpr_T0(rS(ctx->opcode));

        gen_op_ori(uimm);

        gen_op_store_T0_gpr(rA(ctx->opcode));

    }

    SET_RETVAL(0);

}

/* oris */

GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    uint32_t uimm = UIMM(ctx->opcode);

#if 0

    if (uimm == 0) {

        if (rA(ctx->opcode) != rS(ctx->opcode)) {

            gen_op_load_gpr_T0(rS(ctx->opcode));

            gen_op_store_T0_gpr(rA(ctx->opcode));

        }

    } else

#endif

    {

        gen_op_load_gpr_T0(rS(ctx->opcode));

        gen_op_ori(uimm << 16);

        gen_op_store_T0_gpr(rA(ctx->opcode));

    }

    SET_RETVAL(0);

}

/* xori */

GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_xori(UIMM(ctx->opcode));

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* xoris */

GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_xori(UIMM(ctx->opcode) << 16);

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/***                             Integer rotate                            ***/

/* rlwimi & rlwimi. */

GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    uint32_t mb, me;

    mb = MB(ctx->opcode);

    me = ME(ctx->opcode);

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_rlwimi(SH(ctx->opcode), MASK(mb, me), ~MASK(mb, me));

    if (Rc(ctx->opcode) != 0)

        gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* rlwinm & rlwinm. */

GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    uint32_t mb, me, sh;

    sh = SH(ctx->opcode);

    mb = MB(ctx->opcode);

    me = ME(ctx->opcode);

    gen_op_load_gpr_T0(rS(ctx->opcode));

    if (loglevel > 0) {

        fprintf(logfile, "%s sh=%u mb=%u me=%u MASK=0x%08x\n",

                __func__, sh, mb, me, MASK(mb, me));

    }

    if (mb == 0) {

        if (me == 31) {

            gen_op_rotlwi(sh);

            goto store;

        } else if (me == (31 - sh)) {

            gen_op_slwi(sh);

            goto store;

        } else if (sh == 0) {

            gen_op_andi_(MASK(0, me));

            goto store;

        }

    } else if (me == 31) {

        if (sh == (32 - mb)) {

            gen_op_srwi(mb);

            goto store;

        } else if (sh == 0) {

            gen_op_andi_(MASK(mb, 31));

            goto store;

        }

    }

    gen_op_rlwinm(sh, MASK(mb, me));

store:

    if (Rc(ctx->opcode) != 0)

        gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* rlwnm & rlwnm. */

GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)

{

    uint32_t mb, me;

    mb = MB(ctx->opcode);

    me = ME(ctx->opcode);

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_load_gpr_T1(rB(ctx->opcode));

    if (mb == 0 && me == 31) {

        gen_op_rotl();

    } else

    {

        gen_op_rlwnm(MASK(mb, me));

    }

    if (Rc(ctx->opcode) != 0)

        gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/***                             Integer shift                             ***/

/* slw & slw. */

__GEN_LOGICAL2(slw, 0x18, 0x00);

/* sraw & sraw. */

__GEN_LOGICAL2(sraw, 0x18, 0x18);

/* srawi & srawi. */

GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER)

{

    gen_op_load_gpr_T0(rS(ctx->opcode));

    gen_op_srawi(SH(ctx->opcode), MASK(32 - SH(ctx->opcode), 31));

    if (Rc(ctx->opcode) != 0)

        gen_op_set_Rc0();

    gen_op_store_T0_gpr(rA(ctx->opcode));

    SET_RETVAL(0);

}

/* srw & srw. */

__GEN_LOGICAL2(srw, 0x18, 0x10);

/***                       Floating-Point arithmetic                       ***/

/* fadd */

GEN_HANDLER(fadd, 0x3F, 0x15, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fadds */

GEN_HANDLER(fadds, 0x3B, 0x15, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fdiv */

GEN_HANDLER(fdiv, 0x3F, 0x12, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fdivs */

GEN_HANDLER(fdivs, 0x3B, 0x12, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fmul */

GEN_HANDLER(fmul, 0x3F, 0x19, 0xFF, 0x0000F800, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fmuls */

GEN_HANDLER(fmuls, 0x3B, 0x19, 0xFF, 0x0000F800, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fres */

GEN_HANDLER(fres, 0x3B, 0x18, 0xFF, 0x001807C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* frsqrte */

GEN_HANDLER(frsqrte, 0x3F, 0x1A, 0xFF, 0x001807C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fsel */

GEN_HANDLER(fsel, 0x3F, 0x17, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fsub */

GEN_HANDLER(fsub, 0x3F, 0x14, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fsubs */

GEN_HANDLER(fsubs, 0x3B, 0x14, 0xFF, 0x000007C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* Optional: */

/* fsqrt */

GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001807C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fsqrts */

GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001807C0, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/***                     Floating-Point multiply-and-add                   ***/

/* fmadd */

GEN_HANDLER(fmadd, 0x3F, 0x1D, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fmadds */

GEN_HANDLER(fmadds, 0x3B, 0x1D, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fmsub */

GEN_HANDLER(fmsub, 0x3F, 0x1C, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fmsubs */

GEN_HANDLER(fmsubs, 0x3B, 0x1C, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fnmadd */

GEN_HANDLER(fnmadd, 0x3F, 0x1F, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fnmadds */

GEN_HANDLER(fnmadds, 0x3B, 0x1F, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fnmsub */

GEN_HANDLER(fnmsub, 0x3F, 0x1E, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fnmsubs */

GEN_HANDLER(fnmsubs, 0x3B, 0x1E, 0xFF, 0x00000000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/***                     Floating-Point round & convert                    ***/

/* fctiw */

GEN_HANDLER(fctiw, 0x3F, 0x0E, 0xFF, 0x001F0000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fctiwz */

GEN_HANDLER(fctiwz, 0x3F, 0x0F, 0xFF, 0x001F0000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* frsp */

GEN_HANDLER(frsp, 0x3F, 0x0C, 0xFF, 0x001F0000, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/***                         Floating-Point compare                        ***/

/* fcmpo */

GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* fcmpu */

GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/***                  Floating-Point status & ctrl register                ***/

/* mcrfs */

GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* mffs */

GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT)

{

    gen_op_load_fpscr();

    gen_op_store_T0_gpr(rD(ctx->opcode));

    if (Rc(ctx->opcode)) {

        /* Update CR1 */

    }

    SET_RETVAL(0);

}

/* mtfsb0 */

GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* mtfsb1 */

GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT)

{

    SET_RETVAL(EXCP_INVAL);

}

/* mtfsf */

GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT)

{

    gen_op_load_gpr_T0(rB(ctx->opcode));

    gen_op_store_fpscr(FM(ctx->opcode));

    if (Rc(ctx->opcode)) {

        /* Update CR1 */