Revision 0834c9ea tcg/mips/tcg-target.c
b/tcg/mips/tcg-target.c | ||
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842 | 842 |
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, |
843 | 843 |
int opc) |
844 | 844 |
{ |
845 |
int addr_regl, addr_meml; |
|
846 |
int data_regl, data_regh, data_reg1, data_reg2; |
|
847 |
int mem_index, s_bits; |
|
845 |
int addr_regl, data_regl, data_regh, data_reg1, data_reg2; |
|
848 | 846 |
#if defined(CONFIG_SOFTMMU) |
849 | 847 |
void *label1_ptr, *label2_ptr; |
850 | 848 |
int arg_num; |
851 |
#endif
|
|
852 |
#if TARGET_LONG_BITS == 64
|
|
853 |
# if defined(CONFIG_SOFTMMU)
|
|
849 |
int mem_index, s_bits;
|
|
850 |
int addr_meml;
|
|
851 |
# if TARGET_LONG_BITS == 64
|
|
854 | 852 |
uint8_t *label3_ptr; |
855 |
# endif |
|
856 | 853 |
int addr_regh, addr_memh; |
854 |
# endif |
|
857 | 855 |
#endif |
858 | 856 |
data_regl = *args++; |
859 | 857 |
if (opc == 3) |
... | ... | |
861 | 859 |
else |
862 | 860 |
data_regh = 0; |
863 | 861 |
addr_regl = *args++; |
864 |
#if TARGET_LONG_BITS == 64 |
|
862 |
#if defined(CONFIG_SOFTMMU) |
|
863 |
# if TARGET_LONG_BITS == 64 |
|
865 | 864 |
addr_regh = *args++; |
866 |
#endif |
|
865 |
# if defined(TCG_TARGET_WORDS_BIGENDIAN) |
|
866 |
addr_memh = 0; |
|
867 |
addr_meml = 4; |
|
868 |
# else |
|
869 |
addr_memh = 4; |
|
870 |
addr_meml = 0; |
|
871 |
# endif |
|
872 |
# else |
|
873 |
addr_meml = 0; |
|
874 |
# endif |
|
867 | 875 |
mem_index = *args; |
868 | 876 |
s_bits = opc & 3; |
877 |
#endif |
|
869 | 878 |
|
870 | 879 |
if (opc == 3) { |
871 | 880 |
#if defined(TCG_TARGET_WORDS_BIGENDIAN) |
... | ... | |
879 | 888 |
data_reg1 = data_regl; |
880 | 889 |
data_reg2 = 0; |
881 | 890 |
} |
882 |
#if TARGET_LONG_BITS == 64 |
|
883 |
# if defined(TCG_TARGET_WORDS_BIGENDIAN) |
|
884 |
addr_memh = 0; |
|
885 |
addr_meml = 4; |
|
886 |
# else |
|
887 |
addr_memh = 4; |
|
888 |
addr_meml = 0; |
|
889 |
# endif |
|
890 |
#else |
|
891 |
addr_meml = 0; |
|
892 |
#endif |
|
893 |
|
|
894 | 891 |
#if defined(CONFIG_SOFTMMU) |
895 | 892 |
tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addr_regl, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); |
896 | 893 |
tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); |
... | ... | |
1029 | 1026 |
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, |
1030 | 1027 |
int opc) |
1031 | 1028 |
{ |
1032 |
int addr_regl, addr_meml; |
|
1033 |
int data_regl, data_regh, data_reg1, data_reg2; |
|
1034 |
int mem_index, s_bits; |
|
1029 |
int addr_regl, data_regl, data_regh, data_reg1, data_reg2; |
|
1035 | 1030 |
#if defined(CONFIG_SOFTMMU) |
1036 | 1031 |
uint8_t *label1_ptr, *label2_ptr; |
1037 | 1032 |
int arg_num; |
1033 |
int mem_index, s_bits; |
|
1034 |
int addr_meml; |
|
1038 | 1035 |
#endif |
1039 | 1036 |
#if TARGET_LONG_BITS == 64 |
1040 | 1037 |
# if defined(CONFIG_SOFTMMU) |
1041 | 1038 |
uint8_t *label3_ptr; |
1042 |
# endif |
|
1043 | 1039 |
int addr_regh, addr_memh; |
1040 |
# endif |
|
1044 | 1041 |
#endif |
1045 |
|
|
1046 | 1042 |
data_regl = *args++; |
1047 | 1043 |
if (opc == 3) { |
1048 | 1044 |
data_regh = *args++; |
1049 |
#if defined(TCG_TARGET_WORDS_BIGENDIAN) |
|
1050 |
data_reg1 = data_regh; |
|
1051 |
data_reg2 = data_regl; |
|
1052 |
#else |
|
1053 |
data_reg1 = data_regl; |
|
1054 |
data_reg2 = data_regh; |
|
1055 |
#endif |
|
1056 | 1045 |
} else { |
1057 |
data_reg1 = data_regl; |
|
1058 |
data_reg2 = 0; |
|
1059 | 1046 |
data_regh = 0; |
1060 | 1047 |
} |
1061 | 1048 |
addr_regl = *args++; |
1062 |
#if TARGET_LONG_BITS == 64 |
|
1049 |
#if defined(CONFIG_SOFTMMU) |
|
1050 |
# if TARGET_LONG_BITS == 64 |
|
1063 | 1051 |
addr_regh = *args++; |
1064 |
# if defined(TCG_TARGET_WORDS_BIGENDIAN) |
|
1052 |
# if defined(TCG_TARGET_WORDS_BIGENDIAN)
|
|
1065 | 1053 |
addr_memh = 0; |
1066 | 1054 |
addr_meml = 4; |
1067 |
# else |
|
1055 |
# else
|
|
1068 | 1056 |
addr_memh = 4; |
1069 | 1057 |
addr_meml = 0; |
1070 |
# endif |
|
1071 |
#else |
|
1058 |
# endif
|
|
1059 |
# else
|
|
1072 | 1060 |
addr_meml = 0; |
1073 |
#endif |
|
1061 |
# endif
|
|
1074 | 1062 |
mem_index = *args; |
1075 | 1063 |
s_bits = opc; |
1064 |
#endif |
|
1065 |
|
|
1066 |
if (opc == 3) { |
|
1067 |
#if defined(TCG_TARGET_WORDS_BIGENDIAN) |
|
1068 |
data_reg1 = data_regh; |
|
1069 |
data_reg2 = data_regl; |
|
1070 |
#else |
|
1071 |
data_reg1 = data_regl; |
|
1072 |
data_reg2 = data_regh; |
|
1073 |
#endif |
|
1074 |
} else { |
|
1075 |
data_reg1 = data_regl; |
|
1076 |
data_reg2 = 0; |
|
1077 |
} |
|
1076 | 1078 |
|
1077 | 1079 |
#if defined(CONFIG_SOFTMMU) |
1078 | 1080 |
tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addr_regl, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); |
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