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root / hw / slotid_cap.c @ 0834c9ea

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#include "slotid_cap.h"
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#include "pci.h"
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#define SLOTID_CAP_LENGTH 4
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#define SLOTID_NSLOTS_SHIFT (ffs(PCI_SID_ESR_NSLOTS) - 1)
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int slotid_cap_init(PCIDevice *d, int nslots,
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                    uint8_t chassis,
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                    unsigned offset)
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{
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    int cap;
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    if (!chassis) {
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        error_report("Bridge chassis not specified. Each bridge is required "
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                     "to be assigned a unique chassis id > 0.");
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        return -EINVAL;
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    }
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    if (nslots < 0 || nslots > (PCI_SID_ESR_NSLOTS >> SLOTID_NSLOTS_SHIFT)) {
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        /* TODO: error report? */
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        return -EINVAL;
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    }
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    cap = pci_add_capability(d, PCI_CAP_ID_SLOTID, offset, SLOTID_CAP_LENGTH);
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    if (cap < 0) {
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        return cap;
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    }
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    /* We make each chassis unique, this way each bridge is First in Chassis */
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    d->config[cap + PCI_SID_ESR] = PCI_SID_ESR_FIC |
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        (nslots << SLOTID_NSLOTS_SHIFT);
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    d->cmask[cap + PCI_SID_ESR] = 0xff;
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    d->config[cap + PCI_SID_CHASSIS_NR] = chassis;
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    /* Note: Chassis number register is non-volatile,
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       so we don't reset it. */
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    /* TODO: store in eeprom? */
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    d->wmask[cap + PCI_SID_CHASSIS_NR] = 0xff;
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    d->cap_present |= QEMU_PCI_CAP_SLOTID;
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    return 0;
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}
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void slotid_cap_cleanup(PCIDevice *d)
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{
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    /* TODO: cleanup config space? */
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    d->cap_present &= ~QEMU_PCI_CAP_SLOTID;
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}