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/*
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 *  x86 condition code helpers
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "cpu.h"
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#include "helper.h"
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const uint8_t parity_table[256] = {
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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};
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#define SHIFT 0
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#include "cc_helper_template.h"
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#undef SHIFT
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#define SHIFT 1
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#include "cc_helper_template.h"
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#undef SHIFT
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#define SHIFT 2
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#include "cc_helper_template.h"
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#undef SHIFT
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#ifdef TARGET_X86_64
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#define SHIFT 3
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#include "cc_helper_template.h"
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#undef SHIFT
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#endif
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static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1,
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                                     target_ulong src2)
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{
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    return (src1 & ~CC_C) | (dst * CC_C);
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}
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static target_ulong compute_all_adox(target_ulong dst, target_ulong src1,
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                                     target_ulong src2)
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{
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    return (src1 & ~CC_O) | (src2 * CC_O);
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}
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static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1,
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                                      target_ulong src2)
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{
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    return (src1 & ~(CC_C | CC_O)) | (dst * CC_C) | (src2 * CC_O);
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}
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target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
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                                   target_ulong src2, int op)
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{
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    switch (op) {
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    default: /* should never happen */
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        return 0;
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    case CC_OP_EFLAGS:
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        return src1;
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    case CC_OP_CLR:
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        return CC_Z;
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    case CC_OP_MULB:
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        return compute_all_mulb(dst, src1);
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    case CC_OP_MULW:
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        return compute_all_mulw(dst, src1);
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    case CC_OP_MULL:
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        return compute_all_mull(dst, src1);
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    case CC_OP_ADDB:
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        return compute_all_addb(dst, src1);
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    case CC_OP_ADDW:
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        return compute_all_addw(dst, src1);
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    case CC_OP_ADDL:
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        return compute_all_addl(dst, src1);
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    case CC_OP_ADCB:
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        return compute_all_adcb(dst, src1, src2);
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    case CC_OP_ADCW:
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        return compute_all_adcw(dst, src1, src2);
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    case CC_OP_ADCL:
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        return compute_all_adcl(dst, src1, src2);
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    case CC_OP_SUBB:
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        return compute_all_subb(dst, src1);
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    case CC_OP_SUBW:
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        return compute_all_subw(dst, src1);
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    case CC_OP_SUBL:
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        return compute_all_subl(dst, src1);
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    case CC_OP_SBBB:
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        return compute_all_sbbb(dst, src1, src2);
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    case CC_OP_SBBW:
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        return compute_all_sbbw(dst, src1, src2);
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    case CC_OP_SBBL:
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        return compute_all_sbbl(dst, src1, src2);
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    case CC_OP_LOGICB:
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        return compute_all_logicb(dst, src1);
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    case CC_OP_LOGICW:
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        return compute_all_logicw(dst, src1);
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    case CC_OP_LOGICL:
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        return compute_all_logicl(dst, src1);
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    case CC_OP_INCB:
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        return compute_all_incb(dst, src1);
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    case CC_OP_INCW:
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        return compute_all_incw(dst, src1);
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    case CC_OP_INCL:
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        return compute_all_incl(dst, src1);
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    case CC_OP_DECB:
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        return compute_all_decb(dst, src1);
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    case CC_OP_DECW:
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        return compute_all_decw(dst, src1);
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    case CC_OP_DECL:
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        return compute_all_decl(dst, src1);
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    case CC_OP_SHLB:
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        return compute_all_shlb(dst, src1);
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    case CC_OP_SHLW:
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        return compute_all_shlw(dst, src1);
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    case CC_OP_SHLL:
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        return compute_all_shll(dst, src1);
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    case CC_OP_SARB:
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        return compute_all_sarb(dst, src1);
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    case CC_OP_SARW:
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        return compute_all_sarw(dst, src1);
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    case CC_OP_SARL:
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        return compute_all_sarl(dst, src1);
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    case CC_OP_BMILGB:
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        return compute_all_bmilgb(dst, src1);
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    case CC_OP_BMILGW:
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        return compute_all_bmilgw(dst, src1);
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    case CC_OP_BMILGL:
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        return compute_all_bmilgl(dst, src1);
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    case CC_OP_ADCX:
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        return compute_all_adcx(dst, src1, src2);
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    case CC_OP_ADOX:
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        return compute_all_adox(dst, src1, src2);
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    case CC_OP_ADCOX:
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        return compute_all_adcox(dst, src1, src2);
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#ifdef TARGET_X86_64
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    case CC_OP_MULQ:
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        return compute_all_mulq(dst, src1);
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    case CC_OP_ADDQ:
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        return compute_all_addq(dst, src1);
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    case CC_OP_ADCQ:
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        return compute_all_adcq(dst, src1, src2);
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    case CC_OP_SUBQ:
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        return compute_all_subq(dst, src1);
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    case CC_OP_SBBQ:
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        return compute_all_sbbq(dst, src1, src2);
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    case CC_OP_LOGICQ:
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        return compute_all_logicq(dst, src1);
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    case CC_OP_INCQ:
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        return compute_all_incq(dst, src1);
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    case CC_OP_DECQ:
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        return compute_all_decq(dst, src1);
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    case CC_OP_SHLQ:
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        return compute_all_shlq(dst, src1);
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    case CC_OP_SARQ:
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        return compute_all_sarq(dst, src1);
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    case CC_OP_BMILGQ:
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        return compute_all_bmilgq(dst, src1);
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#endif
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    }
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}
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uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
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{
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    return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
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}
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target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
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                                 target_ulong src2, int op)
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{
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    switch (op) {
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    default: /* should never happen */
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    case CC_OP_LOGICB:
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    case CC_OP_LOGICW:
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    case CC_OP_LOGICL:
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    case CC_OP_LOGICQ:
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    case CC_OP_CLR:
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        return 0;
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    case CC_OP_EFLAGS:
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    case CC_OP_SARB:
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    case CC_OP_SARW:
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    case CC_OP_SARL:
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    case CC_OP_SARQ:
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    case CC_OP_ADOX:
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        return src1 & 1;
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    case CC_OP_INCB:
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    case CC_OP_INCW:
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    case CC_OP_INCL:
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    case CC_OP_INCQ:
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    case CC_OP_DECB:
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    case CC_OP_DECW:
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    case CC_OP_DECL:
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    case CC_OP_DECQ:
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        return src1;
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    case CC_OP_MULB:
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    case CC_OP_MULW:
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    case CC_OP_MULL:
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    case CC_OP_MULQ:
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        return src1 != 0;
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    case CC_OP_ADCX:
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    case CC_OP_ADCOX:
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        return dst;
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    case CC_OP_ADDB:
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        return compute_c_addb(dst, src1);
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    case CC_OP_ADDW:
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        return compute_c_addw(dst, src1);
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    case CC_OP_ADDL:
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        return compute_c_addl(dst, src1);
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    case CC_OP_ADCB:
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        return compute_c_adcb(dst, src1, src2);
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    case CC_OP_ADCW:
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        return compute_c_adcw(dst, src1, src2);
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    case CC_OP_ADCL:
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        return compute_c_adcl(dst, src1, src2);
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    case CC_OP_SUBB:
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        return compute_c_subb(dst, src1);
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    case CC_OP_SUBW:
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        return compute_c_subw(dst, src1);
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    case CC_OP_SUBL:
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        return compute_c_subl(dst, src1);
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    case CC_OP_SBBB:
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        return compute_c_sbbb(dst, src1, src2);
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    case CC_OP_SBBW:
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        return compute_c_sbbw(dst, src1, src2);
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    case CC_OP_SBBL:
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        return compute_c_sbbl(dst, src1, src2);
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    case CC_OP_SHLB:
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        return compute_c_shlb(dst, src1);
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    case CC_OP_SHLW:
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        return compute_c_shlw(dst, src1);
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    case CC_OP_SHLL:
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        return compute_c_shll(dst, src1);
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    case CC_OP_BMILGB:
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        return compute_c_bmilgb(dst, src1);
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    case CC_OP_BMILGW:
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        return compute_c_bmilgw(dst, src1);
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    case CC_OP_BMILGL:
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        return compute_c_bmilgl(dst, src1);
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#ifdef TARGET_X86_64
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    case CC_OP_ADDQ:
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        return compute_c_addq(dst, src1);
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    case CC_OP_ADCQ:
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        return compute_c_adcq(dst, src1, src2);
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    case CC_OP_SUBQ:
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        return compute_c_subq(dst, src1);
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    case CC_OP_SBBQ:
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        return compute_c_sbbq(dst, src1, src2);
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    case CC_OP_SHLQ:
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        return compute_c_shlq(dst, src1);
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    case CC_OP_BMILGQ:
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        return compute_c_bmilgq(dst, src1);
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#endif
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    }
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}
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void helper_write_eflags(CPUX86State *env, target_ulong t0,
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                         uint32_t update_mask)
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{
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    cpu_load_eflags(env, t0, update_mask);
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}
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target_ulong helper_read_eflags(CPUX86State *env)
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{
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    uint32_t eflags;
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    eflags = cpu_cc_compute_all(env, CC_OP);
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    eflags |= (env->df & DF_MASK);
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    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
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    return eflags;
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}
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void helper_clts(CPUX86State *env)
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{
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    env->cr[0] &= ~CR0_TS_MASK;
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    env->hflags &= ~HF_TS_MASK;
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}
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void helper_reset_rf(CPUX86State *env)
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{
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    env->eflags &= ~RF_MASK;
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}
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void helper_cli(CPUX86State *env)
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{
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    env->eflags &= ~IF_MASK;
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}
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void helper_sti(CPUX86State *env)
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{
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    env->eflags |= IF_MASK;
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}
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void helper_clac(CPUX86State *env)
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{
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    env->eflags &= ~AC_MASK;
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}
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void helper_stac(CPUX86State *env)
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{
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    env->eflags |= AC_MASK;
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}
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#if 0
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/* vm86plus instructions */
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void helper_cli_vm(CPUX86State *env)
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{
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    env->eflags &= ~VIF_MASK;
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}
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void helper_sti_vm(CPUX86State *env)
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{
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    env->eflags |= VIF_MASK;
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    if (env->eflags & VIP_MASK) {
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        raise_exception(env, EXCP0D_GPF);
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    }
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}
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#endif
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void helper_set_inhibit_irq(CPUX86State *env)
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{
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    env->hflags |= HF_INHIBIT_IRQ_MASK;
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}
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void helper_reset_inhibit_irq(CPUX86State *env)
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{
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    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
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}