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1 | d19893da | bellard | /*
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2 | d19893da | bellard | * Host code generation
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3 | d19893da | bellard | *
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4 | d19893da | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | d19893da | bellard | *
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6 | d19893da | bellard | * This library is free software; you can redistribute it and/or
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7 | d19893da | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | d19893da | bellard | * License as published by the Free Software Foundation; either
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9 | d19893da | bellard | * version 2 of the License, or (at your option) any later version.
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10 | d19893da | bellard | *
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11 | d19893da | bellard | * This library is distributed in the hope that it will be useful,
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12 | d19893da | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | d19893da | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | d19893da | bellard | * Lesser General Public License for more details.
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15 | d19893da | bellard | *
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16 | d19893da | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | d19893da | bellard | * License along with this library; if not, write to the Free Software
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18 | d19893da | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | d19893da | bellard | */
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20 | d19893da | bellard | #include <stdarg.h> |
21 | d19893da | bellard | #include <stdlib.h> |
22 | d19893da | bellard | #include <stdio.h> |
23 | d19893da | bellard | #include <string.h> |
24 | d19893da | bellard | #include <inttypes.h> |
25 | d19893da | bellard | |
26 | d19893da | bellard | #include "config.h" |
27 | 2054396a | bellard | |
28 | af5ad107 | bellard | #define NO_CPU_IO_DEFS
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29 | d3eead2e | bellard | #include "cpu.h" |
30 | d3eead2e | bellard | #include "exec-all.h" |
31 | d19893da | bellard | #include "disas.h" |
32 | d19893da | bellard | |
33 | 4f716dc6 | bellard | extern int dyngen_code(uint8_t *gen_code_buf, |
34 | 4f716dc6 | bellard | uint16_t *label_offsets, uint16_t *jmp_offsets, |
35 | 4f716dc6 | bellard | const uint16_t *opc_buf, const uint32_t *opparam_buf, const long *gen_labels); |
36 | 4f716dc6 | bellard | |
37 | d19893da | bellard | enum {
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38 | d19893da | bellard | #define DEF(s, n, copy_size) INDEX_op_ ## s, |
39 | d3eead2e | bellard | #include "opc.h" |
40 | d19893da | bellard | #undef DEF
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41 | d19893da | bellard | NB_OPS, |
42 | d19893da | bellard | }; |
43 | d19893da | bellard | |
44 | d19893da | bellard | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
45 | d19893da | bellard | uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; |
46 | c4687878 | bellard | long gen_labels[OPC_BUF_SIZE];
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47 | c4687878 | bellard | int nb_gen_labels;
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48 | c4687878 | bellard | |
49 | c4687878 | bellard | target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
50 | d19893da | bellard | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
51 | f76af4b3 | bellard | #if defined(TARGET_I386)
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52 | f76af4b3 | bellard | uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; |
53 | e95c8d51 | bellard | #elif defined(TARGET_SPARC)
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54 | c4687878 | bellard | target_ulong gen_opc_npc[OPC_BUF_SIZE]; |
55 | c3278b7b | bellard | target_ulong gen_opc_jump_pc[2];
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56 | 30d6cb84 | bellard | #elif defined(TARGET_MIPS)
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57 | 30d6cb84 | bellard | uint32_t gen_opc_hflags[OPC_BUF_SIZE]; |
58 | f76af4b3 | bellard | #endif
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59 | d19893da | bellard | |
60 | 58fe2f10 | bellard | int code_copy_enabled = 1; |
61 | 58fe2f10 | bellard | |
62 | d19893da | bellard | #ifdef DEBUG_DISAS
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63 | d19893da | bellard | static const char *op_str[] = { |
64 | d19893da | bellard | #define DEF(s, n, copy_size) #s, |
65 | d3eead2e | bellard | #include "opc.h" |
66 | d19893da | bellard | #undef DEF
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67 | d19893da | bellard | }; |
68 | d19893da | bellard | |
69 | d19893da | bellard | static uint8_t op_nb_args[] = {
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70 | d19893da | bellard | #define DEF(s, n, copy_size) n,
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71 | d3eead2e | bellard | #include "opc.h" |
72 | d19893da | bellard | #undef DEF
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73 | d19893da | bellard | }; |
74 | d19893da | bellard | |
75 | c4687878 | bellard | static const unsigned short opc_copy_size[] = { |
76 | c4687878 | bellard | #define DEF(s, n, copy_size) copy_size,
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77 | c4687878 | bellard | #include "opc.h" |
78 | c4687878 | bellard | #undef DEF
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79 | c4687878 | bellard | }; |
80 | c4687878 | bellard | |
81 | d19893da | bellard | void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf) |
82 | d19893da | bellard | { |
83 | d19893da | bellard | const uint16_t *opc_ptr;
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84 | d19893da | bellard | const uint32_t *opparam_ptr;
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85 | d19893da | bellard | int c, n, i;
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86 | d19893da | bellard | |
87 | d19893da | bellard | opc_ptr = opc_buf; |
88 | d19893da | bellard | opparam_ptr = opparam_buf; |
89 | d19893da | bellard | for(;;) {
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90 | d19893da | bellard | c = *opc_ptr++; |
91 | d19893da | bellard | n = op_nb_args[c]; |
92 | d19893da | bellard | fprintf(logfile, "0x%04x: %s",
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93 | d19893da | bellard | (int)(opc_ptr - opc_buf - 1), op_str[c]); |
94 | d19893da | bellard | for(i = 0; i < n; i++) { |
95 | d19893da | bellard | fprintf(logfile, " 0x%x", opparam_ptr[i]);
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96 | d19893da | bellard | } |
97 | d19893da | bellard | fprintf(logfile, "\n");
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98 | d19893da | bellard | if (c == INDEX_op_end)
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99 | d19893da | bellard | break;
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100 | d19893da | bellard | opparam_ptr += n; |
101 | d19893da | bellard | } |
102 | d19893da | bellard | } |
103 | d19893da | bellard | |
104 | d19893da | bellard | #endif
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105 | d19893da | bellard | |
106 | c4687878 | bellard | /* compute label info */
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107 | c4687878 | bellard | static void dyngen_labels(long *gen_labels, int nb_gen_labels, |
108 | c4687878 | bellard | uint8_t *gen_code_buf, const uint16_t *opc_buf)
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109 | c4687878 | bellard | { |
110 | c4687878 | bellard | uint8_t *gen_code_ptr; |
111 | c4687878 | bellard | int c, i;
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112 | c4687878 | bellard | unsigned long gen_code_addr[OPC_BUF_SIZE]; |
113 | c4687878 | bellard | |
114 | c4687878 | bellard | if (nb_gen_labels == 0) |
115 | c4687878 | bellard | return;
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116 | c4687878 | bellard | /* compute the address of each op code */
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117 | c4687878 | bellard | |
118 | c4687878 | bellard | gen_code_ptr = gen_code_buf; |
119 | c4687878 | bellard | i = 0;
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120 | c4687878 | bellard | for(;;) {
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121 | c4687878 | bellard | c = opc_buf[i]; |
122 | c4687878 | bellard | gen_code_addr[i] =(unsigned long)gen_code_ptr; |
123 | c4687878 | bellard | if (c == INDEX_op_end)
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124 | c4687878 | bellard | break;
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125 | c4687878 | bellard | gen_code_ptr += opc_copy_size[c]; |
126 | c4687878 | bellard | i++; |
127 | c4687878 | bellard | } |
128 | c4687878 | bellard | |
129 | c4687878 | bellard | /* compute the address of each label */
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130 | c4687878 | bellard | for(i = 0; i < nb_gen_labels; i++) { |
131 | c4687878 | bellard | gen_labels[i] = gen_code_addr[gen_labels[i]]; |
132 | c4687878 | bellard | } |
133 | c4687878 | bellard | } |
134 | c4687878 | bellard | |
135 | d19893da | bellard | /* return non zero if the very first instruction is invalid so that
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136 | d19893da | bellard | the virtual CPU can trigger an exception.
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137 | d19893da | bellard | |
138 | d19893da | bellard | '*gen_code_size_ptr' contains the size of the generated code (host
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139 | d19893da | bellard | code).
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140 | d19893da | bellard | */
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141 | 4c3a88a2 | bellard | int cpu_gen_code(CPUState *env, TranslationBlock *tb,
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142 | d19893da | bellard | int max_code_size, int *gen_code_size_ptr) |
143 | d19893da | bellard | { |
144 | d19893da | bellard | uint8_t *gen_code_buf; |
145 | d19893da | bellard | int gen_code_size;
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146 | d19893da | bellard | |
147 | 58fe2f10 | bellard | #ifdef USE_CODE_COPY
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148 | 58fe2f10 | bellard | if (code_copy_enabled &&
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149 | 58fe2f10 | bellard | cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
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150 | 58fe2f10 | bellard | /* nothing more to do */
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151 | 58fe2f10 | bellard | } else
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152 | 58fe2f10 | bellard | #endif
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153 | 58fe2f10 | bellard | { |
154 | 58fe2f10 | bellard | if (gen_intermediate_code(env, tb) < 0) |
155 | 58fe2f10 | bellard | return -1; |
156 | d19893da | bellard | |
157 | 58fe2f10 | bellard | /* generate machine code */
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158 | 58fe2f10 | bellard | tb->tb_next_offset[0] = 0xffff; |
159 | 58fe2f10 | bellard | tb->tb_next_offset[1] = 0xffff; |
160 | 58fe2f10 | bellard | gen_code_buf = tb->tc_ptr; |
161 | 4cbb86e1 | bellard | #ifdef USE_DIRECT_JUMP
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162 | 58fe2f10 | bellard | /* the following two entries are optional (only used for string ops) */
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163 | 58fe2f10 | bellard | tb->tb_jmp_offset[2] = 0xffff; |
164 | 58fe2f10 | bellard | tb->tb_jmp_offset[3] = 0xffff; |
165 | 4cbb86e1 | bellard | #endif
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166 | c4687878 | bellard | dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf); |
167 | c4687878 | bellard | |
168 | 58fe2f10 | bellard | gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset, |
169 | d19893da | bellard | #ifdef USE_DIRECT_JUMP
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170 | 58fe2f10 | bellard | tb->tb_jmp_offset, |
171 | d19893da | bellard | #else
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172 | 58fe2f10 | bellard | NULL,
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173 | d19893da | bellard | #endif
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174 | c4687878 | bellard | gen_opc_buf, gen_opparam_buf, gen_labels); |
175 | 58fe2f10 | bellard | } |
176 | d19893da | bellard | *gen_code_size_ptr = gen_code_size; |
177 | d19893da | bellard | #ifdef DEBUG_DISAS
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178 | f193c797 | bellard | if (loglevel & CPU_LOG_TB_OUT_ASM) {
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179 | d19893da | bellard | fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
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180 | c4687878 | bellard | disas(logfile, tb->tc_ptr, *gen_code_size_ptr); |
181 | d19893da | bellard | fprintf(logfile, "\n");
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182 | d19893da | bellard | fflush(logfile); |
183 | d19893da | bellard | } |
184 | d19893da | bellard | #endif
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185 | d19893da | bellard | return 0; |
186 | d19893da | bellard | } |
187 | d19893da | bellard | |
188 | f76af4b3 | bellard | /* The cpu state corresponding to 'searched_pc' is restored.
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189 | d19893da | bellard | */
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190 | f76af4b3 | bellard | int cpu_restore_state(TranslationBlock *tb,
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191 | 58fe2f10 | bellard | CPUState *env, unsigned long searched_pc, |
192 | 58fe2f10 | bellard | void *puc)
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193 | d19893da | bellard | { |
194 | d19893da | bellard | int j, c;
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195 | d19893da | bellard | unsigned long tc_ptr; |
196 | d19893da | bellard | uint16_t *opc_ptr; |
197 | d19893da | bellard | |
198 | 58fe2f10 | bellard | #ifdef USE_CODE_COPY
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199 | 58fe2f10 | bellard | if (tb->cflags & CF_CODE_COPY) {
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200 | 58fe2f10 | bellard | return cpu_restore_state_copy(tb, env, searched_pc, puc);
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201 | 58fe2f10 | bellard | } |
202 | 58fe2f10 | bellard | #endif
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203 | 4c3a88a2 | bellard | if (gen_intermediate_code_pc(env, tb) < 0) |
204 | d19893da | bellard | return -1; |
205 | d19893da | bellard | |
206 | d19893da | bellard | /* find opc index corresponding to search_pc */
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207 | d19893da | bellard | tc_ptr = (unsigned long)tb->tc_ptr; |
208 | d19893da | bellard | if (searched_pc < tc_ptr)
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209 | d19893da | bellard | return -1; |
210 | d19893da | bellard | j = 0;
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211 | d19893da | bellard | opc_ptr = gen_opc_buf; |
212 | d19893da | bellard | for(;;) {
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213 | d19893da | bellard | c = *opc_ptr; |
214 | d19893da | bellard | if (c == INDEX_op_end)
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215 | d19893da | bellard | return -1; |
216 | d19893da | bellard | tc_ptr += opc_copy_size[c]; |
217 | d19893da | bellard | if (searched_pc < tc_ptr)
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218 | d19893da | bellard | break;
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219 | d19893da | bellard | opc_ptr++; |
220 | d19893da | bellard | } |
221 | d19893da | bellard | j = opc_ptr - gen_opc_buf; |
222 | d19893da | bellard | /* now find start of instruction before */
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223 | d19893da | bellard | while (gen_opc_instr_start[j] == 0) |
224 | d19893da | bellard | j--; |
225 | f76af4b3 | bellard | #if defined(TARGET_I386)
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226 | f76af4b3 | bellard | { |
227 | f76af4b3 | bellard | int cc_op;
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228 | 3c1cf9fa | bellard | #ifdef DEBUG_DISAS
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229 | f193c797 | bellard | if (loglevel & CPU_LOG_TB_OP) {
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230 | 3c1cf9fa | bellard | int i;
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231 | 6e0374f6 | bellard | fprintf(logfile, "RESTORE:\n");
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232 | 3c1cf9fa | bellard | for(i=0;i<=j; i++) { |
233 | 3c1cf9fa | bellard | if (gen_opc_instr_start[i]) {
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234 | c4687878 | bellard | fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); |
235 | 3c1cf9fa | bellard | } |
236 | 3c1cf9fa | bellard | } |
237 | c4687878 | bellard | fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", |
238 | c4687878 | bellard | searched_pc, j, gen_opc_pc[j] - tb->cs_base, |
239 | c4687878 | bellard | (uint32_t)tb->cs_base); |
240 | 3c1cf9fa | bellard | } |
241 | 3c1cf9fa | bellard | #endif
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242 | f76af4b3 | bellard | env->eip = gen_opc_pc[j] - tb->cs_base; |
243 | f76af4b3 | bellard | cc_op = gen_opc_cc_op[j]; |
244 | f76af4b3 | bellard | if (cc_op != CC_OP_DYNAMIC)
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245 | f76af4b3 | bellard | env->cc_op = cc_op; |
246 | f76af4b3 | bellard | } |
247 | f76af4b3 | bellard | #elif defined(TARGET_ARM)
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248 | f76af4b3 | bellard | env->regs[15] = gen_opc_pc[j];
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249 | d3eead2e | bellard | #elif defined(TARGET_SPARC)
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250 | c3278b7b | bellard | { |
251 | c3278b7b | bellard | target_ulong npc; |
252 | c3278b7b | bellard | env->pc = gen_opc_pc[j]; |
253 | c3278b7b | bellard | npc = gen_opc_npc[j]; |
254 | c3278b7b | bellard | if (npc == 1) { |
255 | c3278b7b | bellard | /* dynamic NPC: already stored */
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256 | c3278b7b | bellard | } else if (npc == 2) { |
257 | c3278b7b | bellard | target_ulong t2 = (target_ulong)puc; |
258 | c3278b7b | bellard | /* jump PC: use T2 and the jump targets of the translation */
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259 | c3278b7b | bellard | if (t2)
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260 | c3278b7b | bellard | env->npc = gen_opc_jump_pc[0];
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261 | c3278b7b | bellard | else
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262 | c3278b7b | bellard | env->npc = gen_opc_jump_pc[1];
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263 | c3278b7b | bellard | } else {
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264 | c3278b7b | bellard | env->npc = npc; |
265 | c3278b7b | bellard | } |
266 | c3278b7b | bellard | } |
267 | 6dca2016 | bellard | #elif defined(TARGET_PPC)
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268 | af5ad107 | bellard | { |
269 | af5ad107 | bellard | int type;
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270 | af5ad107 | bellard | /* for PPC, we need to look at the micro operation to get the
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271 | af5ad107 | bellard | access type */
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272 | af5ad107 | bellard | env->nip = gen_opc_pc[j]; |
273 | af5ad107 | bellard | switch(c) {
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274 | af5ad107 | bellard | #if defined(CONFIG_USER_ONLY)
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275 | af5ad107 | bellard | #define CASE3(op)\
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276 | af5ad107 | bellard | case INDEX_op_ ## op ## _raw |
277 | af5ad107 | bellard | #else
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278 | af5ad107 | bellard | #define CASE3(op)\
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279 | af5ad107 | bellard | case INDEX_op_ ## op ## _user:\ |
280 | af5ad107 | bellard | case INDEX_op_ ## op ## _kernel |
281 | af5ad107 | bellard | #endif
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282 | af5ad107 | bellard | |
283 | af5ad107 | bellard | CASE3(stfd): |
284 | af5ad107 | bellard | CASE3(stfs): |
285 | af5ad107 | bellard | CASE3(lfd): |
286 | af5ad107 | bellard | CASE3(lfs): |
287 | af5ad107 | bellard | type = ACCESS_FLOAT; |
288 | af5ad107 | bellard | break;
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289 | a541f297 | bellard | CASE3(lwarx): |
290 | a541f297 | bellard | type = ACCESS_RES; |
291 | a541f297 | bellard | break;
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292 | af5ad107 | bellard | CASE3(stwcx): |
293 | af5ad107 | bellard | type = ACCESS_RES; |
294 | af5ad107 | bellard | break;
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295 | af5ad107 | bellard | CASE3(eciwx): |
296 | af5ad107 | bellard | CASE3(ecowx): |
297 | af5ad107 | bellard | type = ACCESS_EXT; |
298 | af5ad107 | bellard | break;
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299 | af5ad107 | bellard | default:
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300 | af5ad107 | bellard | type = ACCESS_INT; |
301 | af5ad107 | bellard | break;
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302 | af5ad107 | bellard | } |
303 | af5ad107 | bellard | env->access_type = type; |
304 | af5ad107 | bellard | } |
305 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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306 | e6e5906b | pbrook | env->pc = gen_opc_pc[j]; |
307 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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308 | 6af0bf9c | bellard | env->PC = gen_opc_pc[j]; |
309 | 30d6cb84 | bellard | env->hflags &= ~MIPS_HFLAG_BMASK; |
310 | 30d6cb84 | bellard | env->hflags |= gen_opc_hflags[j]; |
311 | f76af4b3 | bellard | #endif
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312 | d19893da | bellard | return 0; |
313 | d19893da | bellard | } |