Revision 08ba7963 target-mips/translate.c

b/target-mips/translate.c
789 789
        ctx->saved_pc = ctx->pc;
790 790
    }
791 791
    if (ctx->hflags != ctx->saved_hflags) {
792
        gen_op_save_state(ctx->hflags);
792
        TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
793

  
794
        tcg_gen_movi_i32(r_tmp, ctx->hflags);
795
        tcg_gen_st_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
796
        tcg_temp_free(r_tmp);
793 797
        ctx->saved_hflags = ctx->hflags;
794 798
        switch (ctx->hflags & MIPS_HFLAG_BMASK) {
795 799
        case MIPS_HFLAG_BR:
......
2238 2242
        }
2239 2243
    }
2240 2244
    save_cpu_state(ctx, 1);
2241
    gen_op_trap();
2245
    {
2246
        int l1 = gen_new_label();
2247

  
2248
        tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
2249
        tcg_gen_helper_0_1i(do_raise_exception, EXCP_TRAP);
2250
        gen_set_label(l1);
2251
    }
2242 2252
    ctx->bstate = BS_STOP;
2243 2253
}
2244 2254

  
......
5316 5326
        opn = "tlbwi";
5317 5327
        if (!env->tlb->do_tlbwi)
5318 5328
            goto die;
5319
        gen_op_tlbwi();
5329
        tcg_gen_helper_0_0(env->tlb->do_tlbwi);
5320 5330
        break;
5321 5331
    case OPC_TLBWR:
5322 5332
        opn = "tlbwr";
5323 5333
        if (!env->tlb->do_tlbwr)
5324 5334
            goto die;
5325
        gen_op_tlbwr();
5335
        tcg_gen_helper_0_0(env->tlb->do_tlbwr);
5326 5336
        break;
5327 5337
    case OPC_TLBP:
5328 5338
        opn = "tlbp";
5329 5339
        if (!env->tlb->do_tlbp)
5330 5340
            goto die;
5331
        gen_op_tlbp();
5341
        tcg_gen_helper_0_0(env->tlb->do_tlbp);
5332 5342
        break;
5333 5343
    case OPC_TLBR:
5334 5344
        opn = "tlbr";
5335 5345
        if (!env->tlb->do_tlbr)
5336 5346
            goto die;
5337
        gen_op_tlbr();
5347
        tcg_gen_helper_0_0(env->tlb->do_tlbr);
5338 5348
        break;
5339 5349
    case OPC_ERET:
5340 5350
        opn = "eret";
......
5362 5372
        ctx->pc += 4;
5363 5373
        save_cpu_state(ctx, 1);
5364 5374
        ctx->pc -= 4;
5365
        gen_op_wait();
5375
        tcg_gen_helper_0_0(do_wait);
5366 5376
        ctx->bstate = BS_EXCP;
5367 5377
        break;
5368 5378
    default:
......
6617 6627
        tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
6618 6628
        tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
6619 6629
        tcg_temp_free(r_tmp);
6620
        gen_op_save_state(ctx->hflags & ~MIPS_HFLAG_BMASK);
6630
        {
6631
            TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I32);
6632

  
6633
            tcg_gen_movi_i32(r_tmp2, ctx->hflags & ~MIPS_HFLAG_BMASK);
6634
            tcg_gen_st_i32(r_tmp2, cpu_env, offsetof(CPUState, hflags));
6635
            tcg_temp_free(r_tmp2);
6636
        }
6621 6637
        gen_goto_tb(ctx, 1, ctx->pc + 4);
6622 6638
        gen_set_label(l1);
6623 6639
    }
......
6671 6687
            MIPS_INVAL("PMON / selsl");
6672 6688
            generate_exception(ctx, EXCP_RI);
6673 6689
#else
6674
            gen_op_pmon(sa);
6690
            tcg_gen_helper_0_1i(do_pmon, sa);
6675 6691
#endif
6676 6692
            break;
6677 6693
        case OPC_SYSCALL:
......
6827 6843
                break;
6828 6844
            case 29:
6829 6845
#if defined (CONFIG_USER_ONLY)
6830
                gen_op_tls_value();
6846
                tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUState, tls_value));
6831 6847
                break;
6832 6848
#endif
6833 6849
            default:            /* Invalid */
......
7243 7259
                if (env->breakpoints[j] == ctx.pc) {
7244 7260
                    save_cpu_state(&ctx, 1);
7245 7261
                    ctx.bstate = BS_BRANCH;
7246
                    gen_op_debug();
7262
                    tcg_gen_helper_0_1i(do_raise_exception, EXCP_DEBUG);
7247 7263
                    /* Include the breakpoint location or the tb won't
7248 7264
                     * be flushed when it must be.  */
7249 7265
                    ctx.pc += 4;
......
7285 7301
    }
7286 7302
    if (env->singlestep_enabled) {
7287 7303
        save_cpu_state(&ctx, ctx.bstate == BS_NONE);
7288
        gen_op_debug();
7304
        tcg_gen_helper_0_1i(do_raise_exception, EXCP_DEBUG);
7289 7305
    } else {
7290 7306
	switch (ctx.bstate) {
7291 7307
        case BS_STOP:

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