Revision 0919ac78 hw/omap1.c
b/hw/omap1.c | ||
---|---|---|
524 | 524 |
case 0x14: /* IT_STATUS */ |
525 | 525 |
ret = s->ulpd_pm_regs[addr >> 2]; |
526 | 526 |
s->ulpd_pm_regs[addr >> 2] = 0; |
527 |
qemu_irq_lower(s->irq[1][OMAP_INT_GAUGE_32K]);
|
|
527 |
qemu_irq_lower(qdev_get_gpio_in(s->ih[1], OMAP_INT_GAUGE_32K));
|
|
528 | 528 |
return ret; |
529 | 529 |
|
530 | 530 |
case 0x18: /* Reserved */ |
... | ... | |
625 | 625 |
s->ulpd_pm_regs[0x14 >> 2] |= 1 << 1; |
626 | 626 |
|
627 | 627 |
s->ulpd_pm_regs[0x14 >> 2] |= 1 << 0; /* IT_GAUGING */ |
628 |
qemu_irq_raise(s->irq[1][OMAP_INT_GAUGE_32K]);
|
|
628 |
qemu_irq_raise(qdev_get_gpio_in(s->ih[1], OMAP_INT_GAUGE_32K));
|
|
629 | 629 |
} |
630 | 630 |
} |
631 | 631 |
s->ulpd_pm_regs[addr >> 2] = value; |
... | ... | |
2257 | 2257 |
s->setup[4] = 0; |
2258 | 2258 |
} |
2259 | 2259 |
|
2260 |
struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory, |
|
2261 |
target_phys_addr_t base, |
|
2262 |
qemu_irq *irq, qemu_irq dma, omap_clk clk) |
|
2260 |
static struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory, |
|
2261 |
target_phys_addr_t base, |
|
2262 |
qemu_irq txirq, qemu_irq rxirq, |
|
2263 |
qemu_irq dma, |
|
2264 |
omap_clk clk) |
|
2263 | 2265 |
{ |
2264 | 2266 |
struct omap_uwire_s *s = (struct omap_uwire_s *) |
2265 | 2267 |
g_malloc0(sizeof(struct omap_uwire_s)); |
2266 | 2268 |
|
2267 |
s->txirq = irq[0];
|
|
2268 |
s->rxirq = irq[1];
|
|
2269 |
s->txirq = txirq;
|
|
2270 |
s->rxirq = rxirq;
|
|
2269 | 2271 |
s->txdrq = dma; |
2270 | 2272 |
omap_uwire_reset(s); |
2271 | 2273 |
|
... | ... | |
2873 | 2875 |
} |
2874 | 2876 |
|
2875 | 2877 |
static struct omap_rtc_s *omap_rtc_init(MemoryRegion *system_memory, |
2876 |
target_phys_addr_t base, |
|
2877 |
qemu_irq *irq, omap_clk clk) |
|
2878 |
target_phys_addr_t base, |
|
2879 |
qemu_irq timerirq, qemu_irq alarmirq, |
|
2880 |
omap_clk clk) |
|
2878 | 2881 |
{ |
2879 | 2882 |
struct omap_rtc_s *s = (struct omap_rtc_s *) |
2880 | 2883 |
g_malloc0(sizeof(struct omap_rtc_s)); |
2881 | 2884 |
|
2882 |
s->irq = irq[0];
|
|
2883 |
s->alarm = irq[1];
|
|
2885 |
s->irq = timerirq;
|
|
2886 |
s->alarm = alarmirq;
|
|
2884 | 2887 |
s->clk = qemu_new_timer_ms(rt_clock, omap_rtc_tick, s); |
2885 | 2888 |
|
2886 | 2889 |
omap_rtc_reset(s); |
... | ... | |
3402 | 3405 |
qemu_del_timer(s->sink_timer); |
3403 | 3406 |
} |
3404 | 3407 |
|
3405 |
struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, |
|
3406 |
target_phys_addr_t base, |
|
3407 |
qemu_irq *irq, qemu_irq *dma, omap_clk clk) |
|
3408 |
static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, |
|
3409 |
target_phys_addr_t base, |
|
3410 |
qemu_irq txirq, qemu_irq rxirq, |
|
3411 |
qemu_irq *dma, omap_clk clk) |
|
3408 | 3412 |
{ |
3409 | 3413 |
struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) |
3410 | 3414 |
g_malloc0(sizeof(struct omap_mcbsp_s)); |
3411 | 3415 |
|
3412 |
s->txirq = irq[0];
|
|
3413 |
s->rxirq = irq[1];
|
|
3416 |
s->txirq = txirq;
|
|
3417 |
s->rxirq = rxirq;
|
|
3414 | 3418 |
s->txdrq = dma[0]; |
3415 | 3419 |
s->rxdrq = dma[1]; |
3416 | 3420 |
s->sink_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_sink_tick, s); |
... | ... | |
3642 | 3646 |
{ |
3643 | 3647 |
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; |
3644 | 3648 |
|
3645 |
omap_inth_reset(mpu->ih[0]); |
|
3646 |
omap_inth_reset(mpu->ih[1]); |
|
3647 | 3649 |
omap_dma_reset(mpu->dma); |
3648 | 3650 |
omap_mpu_timer_reset(mpu->timer[0]); |
3649 | 3651 |
omap_mpu_timer_reset(mpu->timer[1]); |
... | ... | |
3796 | 3798 |
qemu_irq *cpu_irq; |
3797 | 3799 |
qemu_irq dma_irqs[6]; |
3798 | 3800 |
DriveInfo *dinfo; |
3801 |
SysBusDevice *busdev; |
|
3799 | 3802 |
|
3800 | 3803 |
if (!core) |
3801 | 3804 |
core = "ti925t"; |
... | ... | |
3824 | 3827 |
omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); |
3825 | 3828 |
|
3826 | 3829 |
cpu_irq = arm_pic_init_cpu(s->env); |
3827 |
s->ih[0] = omap_inth_init(0xfffecb00, 0x100, 1, &s->irq[0], |
|
3828 |
cpu_irq[ARM_PIC_CPU_IRQ], cpu_irq[ARM_PIC_CPU_FIQ], |
|
3829 |
omap_findclk(s, "arminth_ck")); |
|
3830 |
s->ih[1] = omap_inth_init(0xfffe0000, 0x800, 1, &s->irq[1], |
|
3831 |
omap_inth_get_pin(s->ih[0], OMAP_INT_15XX_IH2_IRQ), |
|
3832 |
NULL, omap_findclk(s, "arminth_ck")); |
|
3833 |
|
|
3834 |
for (i = 0; i < 6; i ++) |
|
3835 |
dma_irqs[i] = |
|
3836 |
s->irq[omap1_dma_irq_map[i].ih][omap1_dma_irq_map[i].intr]; |
|
3837 |
s->dma = omap_dma_init(0xfffed800, dma_irqs, s->irq[0][OMAP_INT_DMA_LCD], |
|
3830 |
s->ih[0] = qdev_create(NULL, "omap-intc"); |
|
3831 |
qdev_prop_set_uint32(s->ih[0], "size", 0x100); |
|
3832 |
qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck")); |
|
3833 |
qdev_init_nofail(s->ih[0]); |
|
3834 |
busdev = sysbus_from_qdev(s->ih[0]); |
|
3835 |
sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]); |
|
3836 |
sysbus_connect_irq(busdev, 1, cpu_irq[ARM_PIC_CPU_FIQ]); |
|
3837 |
sysbus_mmio_map(busdev, 0, 0xfffecb00); |
|
3838 |
s->ih[1] = qdev_create(NULL, "omap-intc"); |
|
3839 |
qdev_prop_set_uint32(s->ih[1], "size", 0x800); |
|
3840 |
qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck")); |
|
3841 |
qdev_init_nofail(s->ih[1]); |
|
3842 |
busdev = sysbus_from_qdev(s->ih[1]); |
|
3843 |
sysbus_connect_irq(busdev, 0, |
|
3844 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ)); |
|
3845 |
/* The second interrupt controller's FIQ output is not wired up */ |
|
3846 |
sysbus_mmio_map(busdev, 0, 0xfffe0000); |
|
3847 |
|
|
3848 |
for (i = 0; i < 6; i++) { |
|
3849 |
dma_irqs[i] = qdev_get_gpio_in(s->ih[omap1_dma_irq_map[i].ih], |
|
3850 |
omap1_dma_irq_map[i].intr); |
|
3851 |
} |
|
3852 |
s->dma = omap_dma_init(0xfffed800, dma_irqs, |
|
3853 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_DMA_LCD), |
|
3838 | 3854 |
s, omap_findclk(s, "dma_ck"), omap_dma_3_1); |
3839 | 3855 |
|
3840 | 3856 |
s->port[emiff ].addr_valid = omap_validate_emiff_addr; |
... | ... | |
3851 | 3867 |
OMAP_IMIF_BASE, s->sram_size); |
3852 | 3868 |
|
3853 | 3869 |
s->timer[0] = omap_mpu_timer_init(system_memory, 0xfffec500, |
3854 |
s->irq[0][OMAP_INT_TIMER1],
|
|
3870 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER1),
|
|
3855 | 3871 |
omap_findclk(s, "mputim_ck")); |
3856 | 3872 |
s->timer[1] = omap_mpu_timer_init(system_memory, 0xfffec600, |
3857 |
s->irq[0][OMAP_INT_TIMER2],
|
|
3873 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER2),
|
|
3858 | 3874 |
omap_findclk(s, "mputim_ck")); |
3859 | 3875 |
s->timer[2] = omap_mpu_timer_init(system_memory, 0xfffec700, |
3860 |
s->irq[0][OMAP_INT_TIMER3],
|
|
3876 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER3),
|
|
3861 | 3877 |
omap_findclk(s, "mputim_ck")); |
3862 | 3878 |
|
3863 | 3879 |
s->wdt = omap_wd_timer_init(system_memory, 0xfffec800, |
3864 |
s->irq[0][OMAP_INT_WD_TIMER],
|
|
3880 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_WD_TIMER),
|
|
3865 | 3881 |
omap_findclk(s, "armwdt_ck")); |
3866 | 3882 |
|
3867 | 3883 |
s->os_timer = omap_os_timer_init(system_memory, 0xfffb9000, |
3868 |
s->irq[1][OMAP_INT_OS_TIMER],
|
|
3884 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_OS_TIMER),
|
|
3869 | 3885 |
omap_findclk(s, "clk32-kHz")); |
3870 | 3886 |
|
3871 |
s->lcd = omap_lcdc_init(0xfffec000, s->irq[0][OMAP_INT_LCD_CTRL], |
|
3872 |
omap_dma_get_lcdch(s->dma), omap_findclk(s, "lcd_ck")); |
|
3887 |
s->lcd = omap_lcdc_init(0xfffec000, |
|
3888 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_LCD_CTRL), |
|
3889 |
omap_dma_get_lcdch(s->dma), |
|
3890 |
omap_findclk(s, "lcd_ck")); |
|
3873 | 3891 |
|
3874 | 3892 |
omap_ulpd_pm_init(system_memory, 0xfffe0800, s); |
3875 | 3893 |
omap_pin_cfg_init(system_memory, 0xfffe1000, s); |
... | ... | |
3878 | 3896 |
omap_mpui_init(system_memory, 0xfffec900, s); |
3879 | 3897 |
|
3880 | 3898 |
s->private_tipb = omap_tipb_bridge_init(system_memory, 0xfffeca00, |
3881 |
s->irq[0][OMAP_INT_BRIDGE_PRIV],
|
|
3899 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PRIV),
|
|
3882 | 3900 |
omap_findclk(s, "tipb_ck")); |
3883 | 3901 |
s->public_tipb = omap_tipb_bridge_init(system_memory, 0xfffed300, |
3884 |
s->irq[0][OMAP_INT_BRIDGE_PUB],
|
|
3902 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PUB),
|
|
3885 | 3903 |
omap_findclk(s, "tipb_ck")); |
3886 | 3904 |
|
3887 | 3905 |
omap_tcmi_init(system_memory, 0xfffecc00, s); |
3888 | 3906 |
|
3889 |
s->uart[0] = omap_uart_init(0xfffb0000, s->irq[1][OMAP_INT_UART1], |
|
3907 |
s->uart[0] = omap_uart_init(0xfffb0000, |
|
3908 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_UART1), |
|
3890 | 3909 |
omap_findclk(s, "uart1_ck"), |
3891 | 3910 |
omap_findclk(s, "uart1_ck"), |
3892 | 3911 |
s->drq[OMAP_DMA_UART1_TX], s->drq[OMAP_DMA_UART1_RX], |
3893 | 3912 |
"uart1", |
3894 | 3913 |
serial_hds[0]); |
3895 |
s->uart[1] = omap_uart_init(0xfffb0800, s->irq[1][OMAP_INT_UART2], |
|
3914 |
s->uart[1] = omap_uart_init(0xfffb0800, |
|
3915 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_UART2), |
|
3896 | 3916 |
omap_findclk(s, "uart2_ck"), |
3897 | 3917 |
omap_findclk(s, "uart2_ck"), |
3898 | 3918 |
s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX], |
3899 | 3919 |
"uart2", |
3900 | 3920 |
serial_hds[0] ? serial_hds[1] : NULL); |
3901 |
s->uart[2] = omap_uart_init(0xfffb9800, s->irq[0][OMAP_INT_UART3], |
|
3921 |
s->uart[2] = omap_uart_init(0xfffb9800, |
|
3922 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_UART3), |
|
3902 | 3923 |
omap_findclk(s, "uart3_ck"), |
3903 | 3924 |
omap_findclk(s, "uart3_ck"), |
3904 | 3925 |
s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX], |
... | ... | |
3918 | 3939 |
exit(1); |
3919 | 3940 |
} |
3920 | 3941 |
s->mmc = omap_mmc_init(0xfffb7800, dinfo->bdrv, |
3921 |
s->irq[1][OMAP_INT_OQN], &s->drq[OMAP_DMA_MMC_TX], |
|
3942 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN), |
|
3943 |
&s->drq[OMAP_DMA_MMC_TX], |
|
3922 | 3944 |
omap_findclk(s, "mmc_ck")); |
3923 | 3945 |
|
3924 | 3946 |
s->mpuio = omap_mpuio_init(system_memory, 0xfffb5000, |
3925 |
s->irq[1][OMAP_INT_KEYBOARD], s->irq[1][OMAP_INT_MPUIO], |
|
3926 |
s->wakeup, omap_findclk(s, "clk32-kHz")); |
|
3947 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_KEYBOARD), |
|
3948 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO), |
|
3949 |
s->wakeup, omap_findclk(s, "clk32-kHz")); |
|
3927 | 3950 |
|
3928 | 3951 |
s->gpio = qdev_create(NULL, "omap-gpio"); |
3929 | 3952 |
qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); |
3930 | 3953 |
qdev_init_nofail(s->gpio); |
3931 | 3954 |
sysbus_connect_irq(sysbus_from_qdev(s->gpio), 0, |
3932 |
s->irq[0][OMAP_INT_GPIO_BANK1]);
|
|
3955 |
qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1));
|
|
3933 | 3956 |
sysbus_mmio_map(sysbus_from_qdev(s->gpio), 0, 0xfffce000); |
3934 | 3957 |
|
3935 |
s->microwire = omap_uwire_init(system_memory, |
|
3936 |
0xfffb3000, &s->irq[1][OMAP_INT_uWireTX], |
|
3958 |
s->microwire = omap_uwire_init(system_memory, 0xfffb3000, |
|
3959 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireTX), |
|
3960 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireRX), |
|
3937 | 3961 |
s->drq[OMAP_DMA_UWIRE_TX], omap_findclk(s, "mpuper_ck")); |
3938 | 3962 |
|
3939 | 3963 |
omap_pwl_init(system_memory, 0xfffb5800, s, omap_findclk(s, "armxor_ck")); |
3940 | 3964 |
omap_pwt_init(system_memory, 0xfffb6000, s, omap_findclk(s, "armxor_ck")); |
3941 | 3965 |
|
3942 |
s->i2c[0] = omap_i2c_init(0xfffb3800, s->irq[1][OMAP_INT_I2C], |
|
3966 |
s->i2c[0] = omap_i2c_init(0xfffb3800, |
|
3967 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C), |
|
3943 | 3968 |
&s->drq[OMAP_DMA_I2C_RX], omap_findclk(s, "mpuper_ck")); |
3944 | 3969 |
|
3945 | 3970 |
s->rtc = omap_rtc_init(system_memory, 0xfffb4800, |
3946 |
&s->irq[1][OMAP_INT_RTC_TIMER], |
|
3971 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_TIMER), |
|
3972 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_ALARM), |
|
3947 | 3973 |
omap_findclk(s, "clk32-kHz")); |
3948 | 3974 |
|
3949 |
s->mcbsp1 = omap_mcbsp_init(system_memory, |
|
3950 |
0xfffb1800, &s->irq[1][OMAP_INT_McBSP1TX], |
|
3975 |
s->mcbsp1 = omap_mcbsp_init(system_memory, 0xfffb1800, |
|
3976 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1TX), |
|
3977 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1RX), |
|
3951 | 3978 |
&s->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(s, "dspxor_ck")); |
3952 |
s->mcbsp2 = omap_mcbsp_init(system_memory, |
|
3953 |
0xfffb1000, &s->irq[0][OMAP_INT_310_McBSP2_TX], |
|
3979 |
s->mcbsp2 = omap_mcbsp_init(system_memory, 0xfffb1000, |
|
3980 |
qdev_get_gpio_in(s->ih[0], |
|
3981 |
OMAP_INT_310_McBSP2_TX), |
|
3982 |
qdev_get_gpio_in(s->ih[0], |
|
3983 |
OMAP_INT_310_McBSP2_RX), |
|
3954 | 3984 |
&s->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(s, "mpuper_ck")); |
3955 |
s->mcbsp3 = omap_mcbsp_init(system_memory, |
|
3956 |
0xfffb7000, &s->irq[1][OMAP_INT_McBSP3TX], |
|
3985 |
s->mcbsp3 = omap_mcbsp_init(system_memory, 0xfffb7000, |
|
3986 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3TX), |
|
3987 |
qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3RX), |
|
3957 | 3988 |
&s->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(s, "dspxor_ck")); |
3958 | 3989 |
|
3959 | 3990 |
s->led[0] = omap_lpg_init(system_memory, |
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