Revision 09b9418c monitor.c
| b/monitor.c | ||
|---|---|---|
| 692 | 692 |
{
|
| 693 | 693 |
CPUState *env; |
| 694 | 694 |
env = mon_get_cpu(); |
| 695 |
if (!env) |
|
| 696 |
return; |
|
| 697 | 695 |
#ifdef TARGET_I386 |
| 698 | 696 |
cpu_dump_state(env, (FILE *)mon, monitor_fprintf, |
| 699 | 697 |
X86_DUMP_FPU); |
| ... | ... | |
| 1127 | 1125 |
int flags; |
| 1128 | 1126 |
flags = 0; |
| 1129 | 1127 |
env = mon_get_cpu(); |
| 1130 |
if (!env && !is_physical)
|
|
| 1128 |
if (!is_physical) |
|
| 1131 | 1129 |
return; |
| 1132 | 1130 |
#ifdef TARGET_I386 |
| 1133 | 1131 |
if (wsize == 2) {
|
| ... | ... | |
| 1189 | 1187 |
cpu_physical_memory_rw(addr, buf, l, 0); |
| 1190 | 1188 |
} else {
|
| 1191 | 1189 |
env = mon_get_cpu(); |
| 1192 |
if (!env) |
|
| 1193 |
break; |
|
| 1194 | 1190 |
if (cpu_memory_rw_debug(env, addr, buf, l, 0) < 0) {
|
| 1195 | 1191 |
monitor_printf(mon, " Cannot access memory\n"); |
| 1196 | 1192 |
break; |
| ... | ... | |
| 1317 | 1313 |
uint8_t buf[1024]; |
| 1318 | 1314 |
|
| 1319 | 1315 |
env = mon_get_cpu(); |
| 1320 |
if (!env) |
|
| 1321 |
return; |
|
| 1322 | 1316 |
|
| 1323 | 1317 |
f = fopen(filename, "wb"); |
| 1324 | 1318 |
if (!f) {
|
| ... | ... | |
| 1753 | 1747 |
uint32_t pgd, pde, pte; |
| 1754 | 1748 |
|
| 1755 | 1749 |
env = mon_get_cpu(); |
| 1756 |
if (!env) |
|
| 1757 |
return; |
|
| 1758 | 1750 |
|
| 1759 | 1751 |
if (!(env->cr[0] & CR0_PG_MASK)) {
|
| 1760 | 1752 |
monitor_printf(mon, "PG disabled\n"); |
| ... | ... | |
| 1811 | 1803 |
uint32_t pgd, pde, pte, start, end; |
| 1812 | 1804 |
|
| 1813 | 1805 |
env = mon_get_cpu(); |
| 1814 |
if (!env) |
|
| 1815 |
return; |
|
| 1816 | 1806 |
|
| 1817 | 1807 |
if (!(env->cr[0] & CR0_PG_MASK)) {
|
| 1818 | 1808 |
monitor_printf(mon, "PG disabled\n"); |
| ... | ... | |
| 2658 | 2648 |
static target_long monitor_get_pc (const struct MonitorDef *md, int val) |
| 2659 | 2649 |
{
|
| 2660 | 2650 |
CPUState *env = mon_get_cpu(); |
| 2661 |
if (!env) |
|
| 2662 |
return 0; |
|
| 2663 | 2651 |
return env->eip + env->segs[R_CS].base; |
| 2664 | 2652 |
} |
| 2665 | 2653 |
#endif |
| ... | ... | |
| 2671 | 2659 |
unsigned int u; |
| 2672 | 2660 |
int i; |
| 2673 | 2661 |
|
| 2674 |
if (!env) |
|
| 2675 |
return 0; |
|
| 2676 |
|
|
| 2677 | 2662 |
u = 0; |
| 2678 | 2663 |
for (i = 0; i < 8; i++) |
| 2679 | 2664 |
u |= env->crf[i] << (32 - (4 * i)); |
| ... | ... | |
| 2684 | 2669 |
static target_long monitor_get_msr (const struct MonitorDef *md, int val) |
| 2685 | 2670 |
{
|
| 2686 | 2671 |
CPUState *env = mon_get_cpu(); |
| 2687 |
if (!env) |
|
| 2688 |
return 0; |
|
| 2689 | 2672 |
return env->msr; |
| 2690 | 2673 |
} |
| 2691 | 2674 |
|
| 2692 | 2675 |
static target_long monitor_get_xer (const struct MonitorDef *md, int val) |
| 2693 | 2676 |
{
|
| 2694 | 2677 |
CPUState *env = mon_get_cpu(); |
| 2695 |
if (!env) |
|
| 2696 |
return 0; |
|
| 2697 | 2678 |
return env->xer; |
| 2698 | 2679 |
} |
| 2699 | 2680 |
|
| 2700 | 2681 |
static target_long monitor_get_decr (const struct MonitorDef *md, int val) |
| 2701 | 2682 |
{
|
| 2702 | 2683 |
CPUState *env = mon_get_cpu(); |
| 2703 |
if (!env) |
|
| 2704 |
return 0; |
|
| 2705 | 2684 |
return cpu_ppc_load_decr(env); |
| 2706 | 2685 |
} |
| 2707 | 2686 |
|
| 2708 | 2687 |
static target_long monitor_get_tbu (const struct MonitorDef *md, int val) |
| 2709 | 2688 |
{
|
| 2710 | 2689 |
CPUState *env = mon_get_cpu(); |
| 2711 |
if (!env) |
|
| 2712 |
return 0; |
|
| 2713 | 2690 |
return cpu_ppc_load_tbu(env); |
| 2714 | 2691 |
} |
| 2715 | 2692 |
|
| 2716 | 2693 |
static target_long monitor_get_tbl (const struct MonitorDef *md, int val) |
| 2717 | 2694 |
{
|
| 2718 | 2695 |
CPUState *env = mon_get_cpu(); |
| 2719 |
if (!env) |
|
| 2720 |
return 0; |
|
| 2721 | 2696 |
return cpu_ppc_load_tbl(env); |
| 2722 | 2697 |
} |
| 2723 | 2698 |
#endif |
| ... | ... | |
| 2727 | 2702 |
static target_long monitor_get_psr (const struct MonitorDef *md, int val) |
| 2728 | 2703 |
{
|
| 2729 | 2704 |
CPUState *env = mon_get_cpu(); |
| 2730 |
if (!env) |
|
| 2731 |
return 0; |
|
| 2732 | 2705 |
return GET_PSR(env); |
| 2733 | 2706 |
} |
| 2734 | 2707 |
#endif |
| ... | ... | |
| 2736 | 2709 |
static target_long monitor_get_reg(const struct MonitorDef *md, int val) |
| 2737 | 2710 |
{
|
| 2738 | 2711 |
CPUState *env = mon_get_cpu(); |
| 2739 |
if (!env) |
|
| 2740 |
return 0; |
|
| 2741 | 2712 |
return env->regwptr[val]; |
| 2742 | 2713 |
} |
| 2743 | 2714 |
#endif |
| ... | ... | |
| 2989 | 2960 |
longjmp(expr_env, 1); |
| 2990 | 2961 |
} |
| 2991 | 2962 |
|
| 2992 |
/* return 0 if OK, -1 if not found, -2 if no CPU defined */
|
|
| 2963 |
/* return 0 if OK, -1 if not found */ |
|
| 2993 | 2964 |
static int get_monitor_def(target_long *pval, const char *name) |
| 2994 | 2965 |
{
|
| 2995 | 2966 |
const MonitorDef *md; |
| ... | ... | |
| 3001 | 2972 |
*pval = md->get_value(md, md->offset); |
| 3002 | 2973 |
} else {
|
| 3003 | 2974 |
CPUState *env = mon_get_cpu(); |
| 3004 |
if (!env) |
|
| 3005 |
return -2; |
|
| 3006 | 2975 |
ptr = (uint8_t *)env + md->offset; |
| 3007 | 2976 |
switch(md->type) {
|
| 3008 | 2977 |
case MD_I32: |
| ... | ... | |
| 3089 | 3058 |
pch++; |
| 3090 | 3059 |
*q = 0; |
| 3091 | 3060 |
ret = get_monitor_def(®, buf); |
| 3092 |
if (ret == -1)
|
|
| 3061 |
if (ret < 0)
|
|
| 3093 | 3062 |
expr_error(mon, "unknown register"); |
| 3094 |
else if (ret == -2) |
|
| 3095 |
expr_error(mon, "no cpu defined"); |
|
| 3096 | 3063 |
n = reg; |
| 3097 | 3064 |
} |
| 3098 | 3065 |
break; |
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