root / hw / lm32_pic.c @ 0b7ade1d
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1 | 4ef66fa7 | Michael Walle | /*
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2 | 4ef66fa7 | Michael Walle | * LatticeMico32 CPU interrupt controller logic.
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3 | 4ef66fa7 | Michael Walle | *
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4 | 4ef66fa7 | Michael Walle | * Copyright (c) 2010 Michael Walle <michael@walle.cc>
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5 | 4ef66fa7 | Michael Walle | *
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6 | 4ef66fa7 | Michael Walle | * This library is free software; you can redistribute it and/or
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7 | 4ef66fa7 | Michael Walle | * modify it under the terms of the GNU Lesser General Public
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8 | 4ef66fa7 | Michael Walle | * License as published by the Free Software Foundation; either
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9 | 4ef66fa7 | Michael Walle | * version 2 of the License, or (at your option) any later version.
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10 | 4ef66fa7 | Michael Walle | *
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11 | 4ef66fa7 | Michael Walle | * This library is distributed in the hope that it will be useful,
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12 | 4ef66fa7 | Michael Walle | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 4ef66fa7 | Michael Walle | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 4ef66fa7 | Michael Walle | * Lesser General Public License for more details.
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15 | 4ef66fa7 | Michael Walle | *
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16 | 4ef66fa7 | Michael Walle | * You should have received a copy of the GNU Lesser General Public
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17 | 4ef66fa7 | Michael Walle | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | 4ef66fa7 | Michael Walle | */
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19 | 4ef66fa7 | Michael Walle | |
20 | 4ef66fa7 | Michael Walle | #include <assert.h> |
21 | 4ef66fa7 | Michael Walle | |
22 | 4ef66fa7 | Michael Walle | #include "hw.h" |
23 | 4ef66fa7 | Michael Walle | #include "pc.h" |
24 | 4ef66fa7 | Michael Walle | #include "monitor.h" |
25 | 4ef66fa7 | Michael Walle | #include "sysbus.h" |
26 | 4ef66fa7 | Michael Walle | #include "trace.h" |
27 | 4ef66fa7 | Michael Walle | #include "lm32_pic.h" |
28 | 4ef66fa7 | Michael Walle | |
29 | 4ef66fa7 | Michael Walle | struct LM32PicState {
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30 | 4ef66fa7 | Michael Walle | SysBusDevice busdev; |
31 | 4ef66fa7 | Michael Walle | qemu_irq parent_irq; |
32 | 4ef66fa7 | Michael Walle | uint32_t im; /* interrupt mask */
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33 | 4ef66fa7 | Michael Walle | uint32_t ip; /* interrupt pending */
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34 | 4ef66fa7 | Michael Walle | uint32_t irq_state; |
35 | 4ef66fa7 | Michael Walle | |
36 | 4ef66fa7 | Michael Walle | /* statistics */
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37 | 4ef66fa7 | Michael Walle | uint32_t stats_irq_count[32];
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38 | 4ef66fa7 | Michael Walle | }; |
39 | 4ef66fa7 | Michael Walle | typedef struct LM32PicState LM32PicState; |
40 | 4ef66fa7 | Michael Walle | |
41 | 4ef66fa7 | Michael Walle | static LM32PicState *pic;
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42 | 661f1929 | Jan Kiszka | void lm32_do_pic_info(Monitor *mon)
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43 | 4ef66fa7 | Michael Walle | { |
44 | 4ef66fa7 | Michael Walle | if (pic == NULL) { |
45 | 4ef66fa7 | Michael Walle | return;
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46 | 4ef66fa7 | Michael Walle | } |
47 | 4ef66fa7 | Michael Walle | |
48 | 4ef66fa7 | Michael Walle | monitor_printf(mon, "lm32-pic: im=%08x ip=%08x irq_state=%08x\n",
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49 | 4ef66fa7 | Michael Walle | pic->im, pic->ip, pic->irq_state); |
50 | 4ef66fa7 | Michael Walle | } |
51 | 4ef66fa7 | Michael Walle | |
52 | 661f1929 | Jan Kiszka | void lm32_irq_info(Monitor *mon)
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53 | 4ef66fa7 | Michael Walle | { |
54 | 4ef66fa7 | Michael Walle | int i;
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55 | 4ef66fa7 | Michael Walle | uint32_t count; |
56 | 4ef66fa7 | Michael Walle | |
57 | 4ef66fa7 | Michael Walle | if (pic == NULL) { |
58 | 4ef66fa7 | Michael Walle | return;
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59 | 4ef66fa7 | Michael Walle | } |
60 | 4ef66fa7 | Michael Walle | |
61 | 4ef66fa7 | Michael Walle | monitor_printf(mon, "IRQ statistics:\n");
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62 | 4ef66fa7 | Michael Walle | for (i = 0; i < 32; i++) { |
63 | 4ef66fa7 | Michael Walle | count = pic->stats_irq_count[i]; |
64 | 4ef66fa7 | Michael Walle | if (count > 0) { |
65 | 4ef66fa7 | Michael Walle | monitor_printf(mon, "%2d: %u\n", i, count);
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66 | 4ef66fa7 | Michael Walle | } |
67 | 4ef66fa7 | Michael Walle | } |
68 | 4ef66fa7 | Michael Walle | } |
69 | 4ef66fa7 | Michael Walle | |
70 | 4ef66fa7 | Michael Walle | static void update_irq(LM32PicState *s) |
71 | 4ef66fa7 | Michael Walle | { |
72 | 4ef66fa7 | Michael Walle | s->ip |= s->irq_state; |
73 | 4ef66fa7 | Michael Walle | |
74 | 4ef66fa7 | Michael Walle | if (s->ip & s->im) {
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75 | 4ef66fa7 | Michael Walle | trace_lm32_pic_raise_irq(); |
76 | 4ef66fa7 | Michael Walle | qemu_irq_raise(s->parent_irq); |
77 | 4ef66fa7 | Michael Walle | } else {
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78 | 4ef66fa7 | Michael Walle | trace_lm32_pic_lower_irq(); |
79 | 4ef66fa7 | Michael Walle | qemu_irq_lower(s->parent_irq); |
80 | 4ef66fa7 | Michael Walle | } |
81 | 4ef66fa7 | Michael Walle | } |
82 | 4ef66fa7 | Michael Walle | |
83 | 4ef66fa7 | Michael Walle | static void irq_handler(void *opaque, int irq, int level) |
84 | 4ef66fa7 | Michael Walle | { |
85 | 4ef66fa7 | Michael Walle | LM32PicState *s = opaque; |
86 | 4ef66fa7 | Michael Walle | |
87 | 4ef66fa7 | Michael Walle | assert(irq < 32);
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88 | 4ef66fa7 | Michael Walle | trace_lm32_pic_interrupt(irq, level); |
89 | 4ef66fa7 | Michael Walle | |
90 | 4ef66fa7 | Michael Walle | if (level) {
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91 | 4ef66fa7 | Michael Walle | s->irq_state |= (1 << irq);
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92 | 4ef66fa7 | Michael Walle | s->stats_irq_count[irq]++; |
93 | 4ef66fa7 | Michael Walle | } else {
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94 | 4ef66fa7 | Michael Walle | s->irq_state &= ~(1 << irq);
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95 | 4ef66fa7 | Michael Walle | } |
96 | 4ef66fa7 | Michael Walle | |
97 | 4ef66fa7 | Michael Walle | update_irq(s); |
98 | 4ef66fa7 | Michael Walle | } |
99 | 4ef66fa7 | Michael Walle | |
100 | 4ef66fa7 | Michael Walle | void lm32_pic_set_im(DeviceState *d, uint32_t im)
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101 | 4ef66fa7 | Michael Walle | { |
102 | 4ef66fa7 | Michael Walle | LM32PicState *s = container_of(d, LM32PicState, busdev.qdev); |
103 | 4ef66fa7 | Michael Walle | |
104 | 4ef66fa7 | Michael Walle | trace_lm32_pic_set_im(im); |
105 | 4ef66fa7 | Michael Walle | s->im = im; |
106 | 4ef66fa7 | Michael Walle | |
107 | 4ef66fa7 | Michael Walle | update_irq(s); |
108 | 4ef66fa7 | Michael Walle | } |
109 | 4ef66fa7 | Michael Walle | |
110 | 4ef66fa7 | Michael Walle | void lm32_pic_set_ip(DeviceState *d, uint32_t ip)
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111 | 4ef66fa7 | Michael Walle | { |
112 | 4ef66fa7 | Michael Walle | LM32PicState *s = container_of(d, LM32PicState, busdev.qdev); |
113 | 4ef66fa7 | Michael Walle | |
114 | 4ef66fa7 | Michael Walle | trace_lm32_pic_set_ip(ip); |
115 | 4ef66fa7 | Michael Walle | |
116 | 4ef66fa7 | Michael Walle | /* ack interrupt */
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117 | 4ef66fa7 | Michael Walle | s->ip &= ~ip; |
118 | 4ef66fa7 | Michael Walle | |
119 | 4ef66fa7 | Michael Walle | update_irq(s); |
120 | 4ef66fa7 | Michael Walle | } |
121 | 4ef66fa7 | Michael Walle | |
122 | 4ef66fa7 | Michael Walle | uint32_t lm32_pic_get_im(DeviceState *d) |
123 | 4ef66fa7 | Michael Walle | { |
124 | 4ef66fa7 | Michael Walle | LM32PicState *s = container_of(d, LM32PicState, busdev.qdev); |
125 | 4ef66fa7 | Michael Walle | |
126 | 4ef66fa7 | Michael Walle | trace_lm32_pic_get_im(s->im); |
127 | 4ef66fa7 | Michael Walle | return s->im;
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128 | 4ef66fa7 | Michael Walle | } |
129 | 4ef66fa7 | Michael Walle | |
130 | 4ef66fa7 | Michael Walle | uint32_t lm32_pic_get_ip(DeviceState *d) |
131 | 4ef66fa7 | Michael Walle | { |
132 | 4ef66fa7 | Michael Walle | LM32PicState *s = container_of(d, LM32PicState, busdev.qdev); |
133 | 4ef66fa7 | Michael Walle | |
134 | 4ef66fa7 | Michael Walle | trace_lm32_pic_get_ip(s->ip); |
135 | 4ef66fa7 | Michael Walle | return s->ip;
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136 | 4ef66fa7 | Michael Walle | } |
137 | 4ef66fa7 | Michael Walle | |
138 | 4ef66fa7 | Michael Walle | static void pic_reset(DeviceState *d) |
139 | 4ef66fa7 | Michael Walle | { |
140 | 4ef66fa7 | Michael Walle | LM32PicState *s = container_of(d, LM32PicState, busdev.qdev); |
141 | 4ef66fa7 | Michael Walle | int i;
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142 | 4ef66fa7 | Michael Walle | |
143 | 4ef66fa7 | Michael Walle | s->im = 0;
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144 | 4ef66fa7 | Michael Walle | s->ip = 0;
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145 | 4ef66fa7 | Michael Walle | s->irq_state = 0;
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146 | 4ef66fa7 | Michael Walle | for (i = 0; i < 32; i++) { |
147 | 4ef66fa7 | Michael Walle | s->stats_irq_count[i] = 0;
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148 | 4ef66fa7 | Michael Walle | } |
149 | 4ef66fa7 | Michael Walle | } |
150 | 4ef66fa7 | Michael Walle | |
151 | 4ef66fa7 | Michael Walle | static int lm32_pic_init(SysBusDevice *dev) |
152 | 4ef66fa7 | Michael Walle | { |
153 | 4ef66fa7 | Michael Walle | LM32PicState *s = FROM_SYSBUS(typeof(*s), dev); |
154 | 4ef66fa7 | Michael Walle | |
155 | 4ef66fa7 | Michael Walle | qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
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156 | 4ef66fa7 | Michael Walle | sysbus_init_irq(dev, &s->parent_irq); |
157 | 4ef66fa7 | Michael Walle | |
158 | 4ef66fa7 | Michael Walle | pic = s; |
159 | 4ef66fa7 | Michael Walle | |
160 | 4ef66fa7 | Michael Walle | return 0; |
161 | 4ef66fa7 | Michael Walle | } |
162 | 4ef66fa7 | Michael Walle | |
163 | 4ef66fa7 | Michael Walle | static const VMStateDescription vmstate_lm32_pic = { |
164 | 4ef66fa7 | Michael Walle | .name = "lm32-pic",
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165 | 4ef66fa7 | Michael Walle | .version_id = 1,
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166 | 4ef66fa7 | Michael Walle | .minimum_version_id = 1,
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167 | 4ef66fa7 | Michael Walle | .minimum_version_id_old = 1,
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168 | 4ef66fa7 | Michael Walle | .fields = (VMStateField[]) { |
169 | 4ef66fa7 | Michael Walle | VMSTATE_UINT32(im, LM32PicState), |
170 | 4ef66fa7 | Michael Walle | VMSTATE_UINT32(ip, LM32PicState), |
171 | 4ef66fa7 | Michael Walle | VMSTATE_UINT32(irq_state, LM32PicState), |
172 | 4ef66fa7 | Michael Walle | VMSTATE_UINT32_ARRAY(stats_irq_count, LM32PicState, 32),
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173 | 4ef66fa7 | Michael Walle | VMSTATE_END_OF_LIST() |
174 | 4ef66fa7 | Michael Walle | } |
175 | 4ef66fa7 | Michael Walle | }; |
176 | 4ef66fa7 | Michael Walle | |
177 | 999e12bb | Anthony Liguori | static void lm32_pic_class_init(ObjectClass *klass, void *data) |
178 | 999e12bb | Anthony Liguori | { |
179 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
180 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
181 | 999e12bb | Anthony Liguori | |
182 | 999e12bb | Anthony Liguori | k->init = lm32_pic_init; |
183 | 39bffca2 | Anthony Liguori | dc->reset = pic_reset; |
184 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_lm32_pic; |
185 | 999e12bb | Anthony Liguori | } |
186 | 999e12bb | Anthony Liguori | |
187 | 39bffca2 | Anthony Liguori | static TypeInfo lm32_pic_info = {
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188 | 39bffca2 | Anthony Liguori | .name = "lm32-pic",
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189 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
190 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(LM32PicState),
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191 | 39bffca2 | Anthony Liguori | .class_init = lm32_pic_class_init, |
192 | 4ef66fa7 | Michael Walle | }; |
193 | 4ef66fa7 | Michael Walle | |
194 | 83f7d43a | Andreas Färber | static void lm32_pic_register_types(void) |
195 | 4ef66fa7 | Michael Walle | { |
196 | 39bffca2 | Anthony Liguori | type_register_static(&lm32_pic_info); |
197 | 4ef66fa7 | Michael Walle | } |
198 | 4ef66fa7 | Michael Walle | |
199 | 83f7d43a | Andreas Färber | type_init(lm32_pic_register_types) |