Revision 0ba365f4 target-mips/dsp_helper.c
b/target-mips/dsp_helper.c | ||
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#include "cpu.h" |
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#include "helper.h" |
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#include "qemu/bitops.h" |
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/* As the byte ordering doesn't matter, i.e. all columns are treated |
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identically, these unions can be used directly. */ |
... | ... | |
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dspc = env->active_tc.DSPControl; |
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#ifndef TARGET_MIPS64 |
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dspc = dspc & 0xFFFFFFC0; |
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dspc |= pos;
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dspc |= (pos & 0x3F);
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#else |
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dspc = dspc & 0xFFFFFF80; |
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dspc |= pos;
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dspc |= (pos & 0x7F);
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#endif |
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env->active_tc.DSPControl = dspc; |
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} |
... | ... | |
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if (sub >= -1) { |
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acc = ((uint64_t)env->active_tc.HI[ac] << 32) | |
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((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO); |
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temp = (acc >> (start_pos - size)) & |
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(((uint32_t)0x01 << (size + 1)) - 1); |
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temp = extract64(acc, start_pos - size, size + 1); |
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set_DSPControl_pos(start_pos - (size + 1), env);
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set_DSPControl_pos(sub, env);
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set_DSPControl_efi(0, env); |
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} else { |
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set_DSPControl_efi(1, env); |
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