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1 | 574bbf7b | bellard | /*
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2 | 574bbf7b | bellard | * APIC support
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3 | 5fafdf24 | ths | *
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4 | 574bbf7b | bellard | * Copyright (c) 2004-2005 Fabrice Bellard
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5 | 574bbf7b | bellard | *
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6 | 574bbf7b | bellard | * This library is free software; you can redistribute it and/or
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7 | 574bbf7b | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 574bbf7b | bellard | * License as published by the Free Software Foundation; either
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9 | 574bbf7b | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 574bbf7b | bellard | *
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11 | 574bbf7b | bellard | * This library is distributed in the hope that it will be useful,
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12 | 574bbf7b | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 574bbf7b | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 574bbf7b | bellard | * Lesser General Public License for more details.
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15 | 574bbf7b | bellard | *
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16 | 574bbf7b | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>
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18 | 574bbf7b | bellard | */
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19 | dae01685 | Jan Kiszka | #include "apic_internal.h" |
20 | aa28b9bf | Blue Swirl | #include "apic.h" |
21 | 0280b571 | Jan Kiszka | #include "ioapic.h" |
22 | 08a82ac0 | Jan Kiszka | #include "msi.h" |
23 | bb7e7293 | aurel32 | #include "host-utils.h" |
24 | d8023f31 | Blue Swirl | #include "trace.h" |
25 | d96e1737 | Jan Kiszka | #include "pc.h" |
26 | 574bbf7b | bellard | |
27 | d3e9db93 | bellard | #define MAX_APIC_WORDS 8 |
28 | d3e9db93 | bellard | |
29 | 54c96da7 | Michael S. Tsirkin | /* Intel APIC constants: from include/asm/msidef.h */
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30 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_VECTOR_SHIFT 0 |
31 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_VECTOR_MASK 0x000000ff |
32 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
33 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_TRIGGER_SHIFT 15 |
34 | 54c96da7 | Michael S. Tsirkin | #define MSI_DATA_LEVEL_SHIFT 14 |
35 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_MODE_SHIFT 2 |
36 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_ID_SHIFT 12 |
37 | 54c96da7 | Michael S. Tsirkin | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
38 | 54c96da7 | Michael S. Tsirkin | |
39 | e5ad936b | Jan Kiszka | #define SYNC_FROM_VAPIC 0x1 |
40 | e5ad936b | Jan Kiszka | #define SYNC_TO_VAPIC 0x2 |
41 | e5ad936b | Jan Kiszka | #define SYNC_ISR_IRR_TO_VAPIC 0x4 |
42 | e5ad936b | Jan Kiszka | |
43 | dae01685 | Jan Kiszka | static APICCommonState *local_apics[MAX_APICS + 1]; |
44 | 73822ec8 | aliguori | |
45 | dae01685 | Jan Kiszka | static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); |
46 | dae01685 | Jan Kiszka | static void apic_update_irq(APICCommonState *s); |
47 | 610626af | aliguori | static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, |
48 | 610626af | aliguori | uint8_t dest, uint8_t dest_mode); |
49 | d592d303 | bellard | |
50 | 3b63c04e | aurel32 | /* Find first bit starting from msb */
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51 | 3b63c04e | aurel32 | static int fls_bit(uint32_t value) |
52 | 3b63c04e | aurel32 | { |
53 | 3b63c04e | aurel32 | return 31 - clz32(value); |
54 | 3b63c04e | aurel32 | } |
55 | 3b63c04e | aurel32 | |
56 | e95f5491 | aurel32 | /* Find first bit starting from lsb */
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57 | d3e9db93 | bellard | static int ffs_bit(uint32_t value) |
58 | d3e9db93 | bellard | { |
59 | bb7e7293 | aurel32 | return ctz32(value);
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60 | d3e9db93 | bellard | } |
61 | d3e9db93 | bellard | |
62 | d3e9db93 | bellard | static inline void set_bit(uint32_t *tab, int index) |
63 | d3e9db93 | bellard | { |
64 | d3e9db93 | bellard | int i, mask;
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65 | d3e9db93 | bellard | i = index >> 5;
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66 | d3e9db93 | bellard | mask = 1 << (index & 0x1f); |
67 | d3e9db93 | bellard | tab[i] |= mask; |
68 | d3e9db93 | bellard | } |
69 | d3e9db93 | bellard | |
70 | d3e9db93 | bellard | static inline void reset_bit(uint32_t *tab, int index) |
71 | d3e9db93 | bellard | { |
72 | d3e9db93 | bellard | int i, mask;
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73 | d3e9db93 | bellard | i = index >> 5;
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74 | d3e9db93 | bellard | mask = 1 << (index & 0x1f); |
75 | d3e9db93 | bellard | tab[i] &= ~mask; |
76 | d3e9db93 | bellard | } |
77 | d3e9db93 | bellard | |
78 | 73822ec8 | aliguori | static inline int get_bit(uint32_t *tab, int index) |
79 | 73822ec8 | aliguori | { |
80 | 73822ec8 | aliguori | int i, mask;
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81 | 73822ec8 | aliguori | i = index >> 5;
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82 | 73822ec8 | aliguori | mask = 1 << (index & 0x1f); |
83 | 73822ec8 | aliguori | return !!(tab[i] & mask);
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84 | 73822ec8 | aliguori | } |
85 | 73822ec8 | aliguori | |
86 | e5ad936b | Jan Kiszka | /* return -1 if no bit is set */
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87 | e5ad936b | Jan Kiszka | static int get_highest_priority_int(uint32_t *tab) |
88 | e5ad936b | Jan Kiszka | { |
89 | e5ad936b | Jan Kiszka | int i;
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90 | e5ad936b | Jan Kiszka | for (i = 7; i >= 0; i--) { |
91 | e5ad936b | Jan Kiszka | if (tab[i] != 0) { |
92 | e5ad936b | Jan Kiszka | return i * 32 + fls_bit(tab[i]); |
93 | e5ad936b | Jan Kiszka | } |
94 | e5ad936b | Jan Kiszka | } |
95 | e5ad936b | Jan Kiszka | return -1; |
96 | e5ad936b | Jan Kiszka | } |
97 | e5ad936b | Jan Kiszka | |
98 | e5ad936b | Jan Kiszka | static void apic_sync_vapic(APICCommonState *s, int sync_type) |
99 | e5ad936b | Jan Kiszka | { |
100 | e5ad936b | Jan Kiszka | VAPICState vapic_state; |
101 | e5ad936b | Jan Kiszka | size_t length; |
102 | e5ad936b | Jan Kiszka | off_t start; |
103 | e5ad936b | Jan Kiszka | int vector;
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104 | e5ad936b | Jan Kiszka | |
105 | e5ad936b | Jan Kiszka | if (!s->vapic_paddr) {
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106 | e5ad936b | Jan Kiszka | return;
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107 | e5ad936b | Jan Kiszka | } |
108 | e5ad936b | Jan Kiszka | if (sync_type & SYNC_FROM_VAPIC) {
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109 | e5ad936b | Jan Kiszka | cpu_physical_memory_rw(s->vapic_paddr, (void *)&vapic_state,
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110 | e5ad936b | Jan Kiszka | sizeof(vapic_state), 0); |
111 | e5ad936b | Jan Kiszka | s->tpr = vapic_state.tpr; |
112 | e5ad936b | Jan Kiszka | } |
113 | e5ad936b | Jan Kiszka | if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) {
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114 | e5ad936b | Jan Kiszka | start = offsetof(VAPICState, isr); |
115 | e5ad936b | Jan Kiszka | length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr); |
116 | e5ad936b | Jan Kiszka | |
117 | e5ad936b | Jan Kiszka | if (sync_type & SYNC_TO_VAPIC) {
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118 | e5ad936b | Jan Kiszka | assert(qemu_cpu_is_self(s->cpu_env)); |
119 | e5ad936b | Jan Kiszka | |
120 | e5ad936b | Jan Kiszka | vapic_state.tpr = s->tpr; |
121 | e5ad936b | Jan Kiszka | vapic_state.enabled = 1;
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122 | e5ad936b | Jan Kiszka | start = 0;
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123 | e5ad936b | Jan Kiszka | length = sizeof(VAPICState);
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124 | e5ad936b | Jan Kiszka | } |
125 | e5ad936b | Jan Kiszka | |
126 | e5ad936b | Jan Kiszka | vector = get_highest_priority_int(s->isr); |
127 | e5ad936b | Jan Kiszka | if (vector < 0) { |
128 | e5ad936b | Jan Kiszka | vector = 0;
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129 | e5ad936b | Jan Kiszka | } |
130 | e5ad936b | Jan Kiszka | vapic_state.isr = vector & 0xf0;
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131 | e5ad936b | Jan Kiszka | |
132 | e5ad936b | Jan Kiszka | vapic_state.zero = 0;
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133 | e5ad936b | Jan Kiszka | |
134 | e5ad936b | Jan Kiszka | vector = get_highest_priority_int(s->irr); |
135 | e5ad936b | Jan Kiszka | if (vector < 0) { |
136 | e5ad936b | Jan Kiszka | vector = 0;
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137 | e5ad936b | Jan Kiszka | } |
138 | e5ad936b | Jan Kiszka | vapic_state.irr = vector & 0xff;
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139 | e5ad936b | Jan Kiszka | |
140 | e5ad936b | Jan Kiszka | cpu_physical_memory_write_rom(s->vapic_paddr + start, |
141 | e5ad936b | Jan Kiszka | ((void *)&vapic_state) + start, length);
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142 | e5ad936b | Jan Kiszka | } |
143 | e5ad936b | Jan Kiszka | } |
144 | e5ad936b | Jan Kiszka | |
145 | e5ad936b | Jan Kiszka | static void apic_vapic_base_update(APICCommonState *s) |
146 | e5ad936b | Jan Kiszka | { |
147 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
148 | e5ad936b | Jan Kiszka | } |
149 | e5ad936b | Jan Kiszka | |
150 | dae01685 | Jan Kiszka | static void apic_local_deliver(APICCommonState *s, int vector) |
151 | a5b38b51 | aurel32 | { |
152 | a5b38b51 | aurel32 | uint32_t lvt = s->lvt[vector]; |
153 | a5b38b51 | aurel32 | int trigger_mode;
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154 | a5b38b51 | aurel32 | |
155 | d8023f31 | Blue Swirl | trace_apic_local_deliver(vector, (lvt >> 8) & 7); |
156 | d8023f31 | Blue Swirl | |
157 | a5b38b51 | aurel32 | if (lvt & APIC_LVT_MASKED)
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158 | a5b38b51 | aurel32 | return;
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159 | a5b38b51 | aurel32 | |
160 | a5b38b51 | aurel32 | switch ((lvt >> 8) & 7) { |
161 | a5b38b51 | aurel32 | case APIC_DM_SMI:
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162 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI); |
163 | a5b38b51 | aurel32 | break;
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164 | a5b38b51 | aurel32 | |
165 | a5b38b51 | aurel32 | case APIC_DM_NMI:
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166 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI); |
167 | a5b38b51 | aurel32 | break;
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168 | a5b38b51 | aurel32 | |
169 | a5b38b51 | aurel32 | case APIC_DM_EXTINT:
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170 | cf6d64bf | Blue Swirl | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
171 | a5b38b51 | aurel32 | break;
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172 | a5b38b51 | aurel32 | |
173 | a5b38b51 | aurel32 | case APIC_DM_FIXED:
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174 | a5b38b51 | aurel32 | trigger_mode = APIC_TRIGGER_EDGE; |
175 | a5b38b51 | aurel32 | if ((vector == APIC_LVT_LINT0 || vector == APIC_LVT_LINT1) &&
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176 | a5b38b51 | aurel32 | (lvt & APIC_LVT_LEVEL_TRIGGER)) |
177 | a5b38b51 | aurel32 | trigger_mode = APIC_TRIGGER_LEVEL; |
178 | a5b38b51 | aurel32 | apic_set_irq(s, lvt & 0xff, trigger_mode);
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179 | a5b38b51 | aurel32 | } |
180 | a5b38b51 | aurel32 | } |
181 | a5b38b51 | aurel32 | |
182 | 92a16d7a | Blue Swirl | void apic_deliver_pic_intr(DeviceState *d, int level) |
183 | 1a7de94a | aurel32 | { |
184 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
185 | 92a16d7a | Blue Swirl | |
186 | cf6d64bf | Blue Swirl | if (level) {
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187 | cf6d64bf | Blue Swirl | apic_local_deliver(s, APIC_LVT_LINT0); |
188 | cf6d64bf | Blue Swirl | } else {
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189 | 1a7de94a | aurel32 | uint32_t lvt = s->lvt[APIC_LVT_LINT0]; |
190 | 1a7de94a | aurel32 | |
191 | 1a7de94a | aurel32 | switch ((lvt >> 8) & 7) { |
192 | 1a7de94a | aurel32 | case APIC_DM_FIXED:
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193 | 1a7de94a | aurel32 | if (!(lvt & APIC_LVT_LEVEL_TRIGGER))
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194 | 1a7de94a | aurel32 | break;
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195 | 1a7de94a | aurel32 | reset_bit(s->irr, lvt & 0xff);
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196 | 1a7de94a | aurel32 | /* fall through */
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197 | 1a7de94a | aurel32 | case APIC_DM_EXTINT:
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198 | cf6d64bf | Blue Swirl | cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
199 | 1a7de94a | aurel32 | break;
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200 | 1a7de94a | aurel32 | } |
201 | 1a7de94a | aurel32 | } |
202 | 1a7de94a | aurel32 | } |
203 | 1a7de94a | aurel32 | |
204 | dae01685 | Jan Kiszka | static void apic_external_nmi(APICCommonState *s) |
205 | 02c09195 | Jan Kiszka | { |
206 | 02c09195 | Jan Kiszka | apic_local_deliver(s, APIC_LVT_LINT1); |
207 | 02c09195 | Jan Kiszka | } |
208 | 02c09195 | Jan Kiszka | |
209 | d3e9db93 | bellard | #define foreach_apic(apic, deliver_bitmask, code) \
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210 | d3e9db93 | bellard | {\ |
211 | d3e9db93 | bellard | int __i, __j, __mask;\
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212 | d3e9db93 | bellard | for(__i = 0; __i < MAX_APIC_WORDS; __i++) {\ |
213 | d3e9db93 | bellard | __mask = deliver_bitmask[__i];\ |
214 | d3e9db93 | bellard | if (__mask) {\
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215 | d3e9db93 | bellard | for(__j = 0; __j < 32; __j++) {\ |
216 | d3e9db93 | bellard | if (__mask & (1 << __j)) {\ |
217 | d3e9db93 | bellard | apic = local_apics[__i * 32 + __j];\
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218 | d3e9db93 | bellard | if (apic) {\
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219 | d3e9db93 | bellard | code;\ |
220 | d3e9db93 | bellard | }\ |
221 | d3e9db93 | bellard | }\ |
222 | d3e9db93 | bellard | }\ |
223 | d3e9db93 | bellard | }\ |
224 | d3e9db93 | bellard | }\ |
225 | d3e9db93 | bellard | } |
226 | d3e9db93 | bellard | |
227 | 5fafdf24 | ths | static void apic_bus_deliver(const uint32_t *deliver_bitmask, |
228 | 1f6f408c | Jan Kiszka | uint8_t delivery_mode, uint8_t vector_num, |
229 | d592d303 | bellard | uint8_t trigger_mode) |
230 | d592d303 | bellard | { |
231 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
232 | d592d303 | bellard | |
233 | d592d303 | bellard | switch (delivery_mode) {
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234 | d592d303 | bellard | case APIC_DM_LOWPRI:
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235 | 8dd69b8f | bellard | /* XXX: search for focus processor, arbitration */
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236 | d3e9db93 | bellard | { |
237 | d3e9db93 | bellard | int i, d;
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238 | d3e9db93 | bellard | d = -1;
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239 | d3e9db93 | bellard | for(i = 0; i < MAX_APIC_WORDS; i++) { |
240 | d3e9db93 | bellard | if (deliver_bitmask[i]) {
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241 | d3e9db93 | bellard | d = i * 32 + ffs_bit(deliver_bitmask[i]);
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242 | d3e9db93 | bellard | break;
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243 | d3e9db93 | bellard | } |
244 | d3e9db93 | bellard | } |
245 | d3e9db93 | bellard | if (d >= 0) { |
246 | d3e9db93 | bellard | apic_iter = local_apics[d]; |
247 | d3e9db93 | bellard | if (apic_iter) {
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248 | d3e9db93 | bellard | apic_set_irq(apic_iter, vector_num, trigger_mode); |
249 | d3e9db93 | bellard | } |
250 | d3e9db93 | bellard | } |
251 | 8dd69b8f | bellard | } |
252 | d3e9db93 | bellard | return;
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253 | 8dd69b8f | bellard | |
254 | d592d303 | bellard | case APIC_DM_FIXED:
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255 | d592d303 | bellard | break;
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256 | d592d303 | bellard | |
257 | d592d303 | bellard | case APIC_DM_SMI:
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258 | e2eb9d3e | aurel32 | foreach_apic(apic_iter, deliver_bitmask, |
259 | e2eb9d3e | aurel32 | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_SMI) ); |
260 | e2eb9d3e | aurel32 | return;
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261 | e2eb9d3e | aurel32 | |
262 | d592d303 | bellard | case APIC_DM_NMI:
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263 | e2eb9d3e | aurel32 | foreach_apic(apic_iter, deliver_bitmask, |
264 | e2eb9d3e | aurel32 | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_NMI) ); |
265 | e2eb9d3e | aurel32 | return;
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266 | d592d303 | bellard | |
267 | d592d303 | bellard | case APIC_DM_INIT:
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268 | d592d303 | bellard | /* normal INIT IPI sent to processors */
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269 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
270 | b09ea7d5 | Gleb Natapov | cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) ); |
271 | d592d303 | bellard | return;
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272 | 3b46e624 | ths | |
273 | d592d303 | bellard | case APIC_DM_EXTINT:
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274 | b1fc0348 | bellard | /* handled in I/O APIC code */
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275 | d592d303 | bellard | break;
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276 | d592d303 | bellard | |
277 | d592d303 | bellard | default:
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278 | d592d303 | bellard | return;
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279 | d592d303 | bellard | } |
280 | d592d303 | bellard | |
281 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
282 | d3e9db93 | bellard | apic_set_irq(apic_iter, vector_num, trigger_mode) ); |
283 | d592d303 | bellard | } |
284 | 574bbf7b | bellard | |
285 | 1f6f408c | Jan Kiszka | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
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286 | 1f6f408c | Jan Kiszka | uint8_t vector_num, uint8_t trigger_mode) |
287 | 610626af | aliguori | { |
288 | 610626af | aliguori | uint32_t deliver_bitmask[MAX_APIC_WORDS]; |
289 | 610626af | aliguori | |
290 | d8023f31 | Blue Swirl | trace_apic_deliver_irq(dest, dest_mode, delivery_mode, vector_num, |
291 | 1f6f408c | Jan Kiszka | trigger_mode); |
292 | d8023f31 | Blue Swirl | |
293 | 610626af | aliguori | apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); |
294 | 1f6f408c | Jan Kiszka | apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); |
295 | 610626af | aliguori | } |
296 | 610626af | aliguori | |
297 | dae01685 | Jan Kiszka | static void apic_set_base(APICCommonState *s, uint64_t val) |
298 | 574bbf7b | bellard | { |
299 | 5fafdf24 | ths | s->apicbase = (val & 0xfffff000) |
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300 | 574bbf7b | bellard | (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); |
301 | 574bbf7b | bellard | /* if disabled, cannot be enabled again */
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302 | 574bbf7b | bellard | if (!(val & MSR_IA32_APICBASE_ENABLE)) {
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303 | 574bbf7b | bellard | s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; |
304 | 0e26b7b8 | Blue Swirl | cpu_clear_apic_feature(s->cpu_env); |
305 | 574bbf7b | bellard | s->spurious_vec &= ~APIC_SV_ENABLE; |
306 | 574bbf7b | bellard | } |
307 | 574bbf7b | bellard | } |
308 | 574bbf7b | bellard | |
309 | dae01685 | Jan Kiszka | static void apic_set_tpr(APICCommonState *s, uint8_t val) |
310 | 574bbf7b | bellard | { |
311 | e5ad936b | Jan Kiszka | /* Updates from cr8 are ignored while the VAPIC is active */
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312 | e5ad936b | Jan Kiszka | if (!s->vapic_paddr) {
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313 | e5ad936b | Jan Kiszka | s->tpr = val << 4;
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314 | e5ad936b | Jan Kiszka | apic_update_irq(s); |
315 | e5ad936b | Jan Kiszka | } |
316 | 9230e66e | bellard | } |
317 | 9230e66e | bellard | |
318 | e5ad936b | Jan Kiszka | static uint8_t apic_get_tpr(APICCommonState *s)
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319 | d592d303 | bellard | { |
320 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
321 | e5ad936b | Jan Kiszka | return s->tpr >> 4; |
322 | d592d303 | bellard | } |
323 | d592d303 | bellard | |
324 | dae01685 | Jan Kiszka | static int apic_get_ppr(APICCommonState *s) |
325 | 574bbf7b | bellard | { |
326 | 574bbf7b | bellard | int tpr, isrv, ppr;
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327 | 574bbf7b | bellard | |
328 | 574bbf7b | bellard | tpr = (s->tpr >> 4);
|
329 | 574bbf7b | bellard | isrv = get_highest_priority_int(s->isr); |
330 | 574bbf7b | bellard | if (isrv < 0) |
331 | 574bbf7b | bellard | isrv = 0;
|
332 | 574bbf7b | bellard | isrv >>= 4;
|
333 | 574bbf7b | bellard | if (tpr >= isrv)
|
334 | 574bbf7b | bellard | ppr = s->tpr; |
335 | 574bbf7b | bellard | else
|
336 | 574bbf7b | bellard | ppr = isrv << 4;
|
337 | 574bbf7b | bellard | return ppr;
|
338 | 574bbf7b | bellard | } |
339 | 574bbf7b | bellard | |
340 | dae01685 | Jan Kiszka | static int apic_get_arb_pri(APICCommonState *s) |
341 | d592d303 | bellard | { |
342 | d592d303 | bellard | /* XXX: arbitration */
|
343 | d592d303 | bellard | return 0; |
344 | d592d303 | bellard | } |
345 | d592d303 | bellard | |
346 | 0fbfbb59 | Gleb Natapov | |
347 | 0fbfbb59 | Gleb Natapov | /*
|
348 | 0fbfbb59 | Gleb Natapov | * <0 - low prio interrupt,
|
349 | 0fbfbb59 | Gleb Natapov | * 0 - no interrupt,
|
350 | 0fbfbb59 | Gleb Natapov | * >0 - interrupt number
|
351 | 0fbfbb59 | Gleb Natapov | */
|
352 | dae01685 | Jan Kiszka | static int apic_irq_pending(APICCommonState *s) |
353 | 574bbf7b | bellard | { |
354 | d592d303 | bellard | int irrv, ppr;
|
355 | 574bbf7b | bellard | irrv = get_highest_priority_int(s->irr); |
356 | 0fbfbb59 | Gleb Natapov | if (irrv < 0) { |
357 | 0fbfbb59 | Gleb Natapov | return 0; |
358 | 0fbfbb59 | Gleb Natapov | } |
359 | d592d303 | bellard | ppr = apic_get_ppr(s); |
360 | 0fbfbb59 | Gleb Natapov | if (ppr && (irrv & 0xf0) <= (ppr & 0xf0)) { |
361 | 0fbfbb59 | Gleb Natapov | return -1; |
362 | 0fbfbb59 | Gleb Natapov | } |
363 | 0fbfbb59 | Gleb Natapov | |
364 | 0fbfbb59 | Gleb Natapov | return irrv;
|
365 | 0fbfbb59 | Gleb Natapov | } |
366 | 0fbfbb59 | Gleb Natapov | |
367 | 0fbfbb59 | Gleb Natapov | /* signal the CPU if an irq is pending */
|
368 | dae01685 | Jan Kiszka | static void apic_update_irq(APICCommonState *s) |
369 | 0fbfbb59 | Gleb Natapov | { |
370 | 0fbfbb59 | Gleb Natapov | if (!(s->spurious_vec & APIC_SV_ENABLE)) {
|
371 | 574bbf7b | bellard | return;
|
372 | 0fbfbb59 | Gleb Natapov | } |
373 | 0fbfbb59 | Gleb Natapov | if (apic_irq_pending(s) > 0) { |
374 | 0fbfbb59 | Gleb Natapov | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); |
375 | d96e1737 | Jan Kiszka | } else if (apic_accept_pic_intr(&s->busdev.qdev) && |
376 | d96e1737 | Jan Kiszka | pic_get_output(isa_pic)) { |
377 | d96e1737 | Jan Kiszka | apic_deliver_pic_intr(&s->busdev.qdev, 1);
|
378 | 0fbfbb59 | Gleb Natapov | } |
379 | 574bbf7b | bellard | } |
380 | 574bbf7b | bellard | |
381 | e5ad936b | Jan Kiszka | void apic_poll_irq(DeviceState *d)
|
382 | e5ad936b | Jan Kiszka | { |
383 | e5ad936b | Jan Kiszka | APICCommonState *s = APIC_COMMON(d); |
384 | e5ad936b | Jan Kiszka | |
385 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
386 | e5ad936b | Jan Kiszka | apic_update_irq(s); |
387 | e5ad936b | Jan Kiszka | } |
388 | e5ad936b | Jan Kiszka | |
389 | dae01685 | Jan Kiszka | static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode) |
390 | 574bbf7b | bellard | { |
391 | 343270ea | Jan Kiszka | apic_report_irq_delivered(!get_bit(s->irr, vector_num)); |
392 | 73822ec8 | aliguori | |
393 | 574bbf7b | bellard | set_bit(s->irr, vector_num); |
394 | 574bbf7b | bellard | if (trigger_mode)
|
395 | 574bbf7b | bellard | set_bit(s->tmr, vector_num); |
396 | 574bbf7b | bellard | else
|
397 | 574bbf7b | bellard | reset_bit(s->tmr, vector_num); |
398 | e5ad936b | Jan Kiszka | if (s->vapic_paddr) {
|
399 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_ISR_IRR_TO_VAPIC); |
400 | e5ad936b | Jan Kiszka | /*
|
401 | e5ad936b | Jan Kiszka | * The vcpu thread needs to see the new IRR before we pull its current
|
402 | e5ad936b | Jan Kiszka | * TPR value. That way, if we miss a lowering of the TRP, the guest
|
403 | e5ad936b | Jan Kiszka | * has the chance to notice the new IRR and poll for IRQs on its own.
|
404 | e5ad936b | Jan Kiszka | */
|
405 | e5ad936b | Jan Kiszka | smp_wmb(); |
406 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
407 | e5ad936b | Jan Kiszka | } |
408 | 574bbf7b | bellard | apic_update_irq(s); |
409 | 574bbf7b | bellard | } |
410 | 574bbf7b | bellard | |
411 | dae01685 | Jan Kiszka | static void apic_eoi(APICCommonState *s) |
412 | 574bbf7b | bellard | { |
413 | 574bbf7b | bellard | int isrv;
|
414 | 574bbf7b | bellard | isrv = get_highest_priority_int(s->isr); |
415 | 574bbf7b | bellard | if (isrv < 0) |
416 | 574bbf7b | bellard | return;
|
417 | 574bbf7b | bellard | reset_bit(s->isr, isrv); |
418 | 0280b571 | Jan Kiszka | if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) {
|
419 | 0280b571 | Jan Kiszka | ioapic_eoi_broadcast(isrv); |
420 | 0280b571 | Jan Kiszka | } |
421 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC); |
422 | 574bbf7b | bellard | apic_update_irq(s); |
423 | 574bbf7b | bellard | } |
424 | 574bbf7b | bellard | |
425 | 678e12cc | Gleb Natapov | static int apic_find_dest(uint8_t dest) |
426 | 678e12cc | Gleb Natapov | { |
427 | dae01685 | Jan Kiszka | APICCommonState *apic = local_apics[dest]; |
428 | 678e12cc | Gleb Natapov | int i;
|
429 | 678e12cc | Gleb Natapov | |
430 | 678e12cc | Gleb Natapov | if (apic && apic->id == dest)
|
431 | 678e12cc | Gleb Natapov | return dest; /* shortcut in case apic->id == apic->idx */ |
432 | 678e12cc | Gleb Natapov | |
433 | 678e12cc | Gleb Natapov | for (i = 0; i < MAX_APICS; i++) { |
434 | 678e12cc | Gleb Natapov | apic = local_apics[i]; |
435 | 678e12cc | Gleb Natapov | if (apic && apic->id == dest)
|
436 | 678e12cc | Gleb Natapov | return i;
|
437 | b538e53e | Alex Williamson | if (!apic)
|
438 | b538e53e | Alex Williamson | break;
|
439 | 678e12cc | Gleb Natapov | } |
440 | 678e12cc | Gleb Natapov | |
441 | 678e12cc | Gleb Natapov | return -1; |
442 | 678e12cc | Gleb Natapov | } |
443 | 678e12cc | Gleb Natapov | |
444 | d3e9db93 | bellard | static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, |
445 | d3e9db93 | bellard | uint8_t dest, uint8_t dest_mode) |
446 | d592d303 | bellard | { |
447 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
448 | d3e9db93 | bellard | int i;
|
449 | d592d303 | bellard | |
450 | d592d303 | bellard | if (dest_mode == 0) { |
451 | d3e9db93 | bellard | if (dest == 0xff) { |
452 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, MAX_APIC_WORDS * sizeof(uint32_t)); |
453 | d3e9db93 | bellard | } else {
|
454 | 678e12cc | Gleb Natapov | int idx = apic_find_dest(dest);
|
455 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); |
456 | 678e12cc | Gleb Natapov | if (idx >= 0) |
457 | 678e12cc | Gleb Natapov | set_bit(deliver_bitmask, idx); |
458 | d3e9db93 | bellard | } |
459 | d592d303 | bellard | } else {
|
460 | d592d303 | bellard | /* XXX: cluster mode */
|
461 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); |
462 | d3e9db93 | bellard | for(i = 0; i < MAX_APICS; i++) { |
463 | d3e9db93 | bellard | apic_iter = local_apics[i]; |
464 | d3e9db93 | bellard | if (apic_iter) {
|
465 | d3e9db93 | bellard | if (apic_iter->dest_mode == 0xf) { |
466 | d3e9db93 | bellard | if (dest & apic_iter->log_dest)
|
467 | d3e9db93 | bellard | set_bit(deliver_bitmask, i); |
468 | d3e9db93 | bellard | } else if (apic_iter->dest_mode == 0x0) { |
469 | d3e9db93 | bellard | if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && |
470 | d3e9db93 | bellard | (dest & apic_iter->log_dest & 0x0f)) {
|
471 | d3e9db93 | bellard | set_bit(deliver_bitmask, i); |
472 | d3e9db93 | bellard | } |
473 | d3e9db93 | bellard | } |
474 | b538e53e | Alex Williamson | } else {
|
475 | b538e53e | Alex Williamson | break;
|
476 | d3e9db93 | bellard | } |
477 | d592d303 | bellard | } |
478 | d592d303 | bellard | } |
479 | d592d303 | bellard | } |
480 | d592d303 | bellard | |
481 | dae01685 | Jan Kiszka | static void apic_startup(APICCommonState *s, int vector_num) |
482 | e0fd8781 | bellard | { |
483 | b09ea7d5 | Gleb Natapov | s->sipi_vector = vector_num; |
484 | b09ea7d5 | Gleb Natapov | cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); |
485 | b09ea7d5 | Gleb Natapov | } |
486 | b09ea7d5 | Gleb Natapov | |
487 | 92a16d7a | Blue Swirl | void apic_sipi(DeviceState *d)
|
488 | b09ea7d5 | Gleb Natapov | { |
489 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
490 | 92a16d7a | Blue Swirl | |
491 | 4a942cea | Blue Swirl | cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); |
492 | b09ea7d5 | Gleb Natapov | |
493 | b09ea7d5 | Gleb Natapov | if (!s->wait_for_sipi)
|
494 | e0fd8781 | bellard | return;
|
495 | 0e26b7b8 | Blue Swirl | cpu_x86_load_seg_cache_sipi(s->cpu_env, s->sipi_vector); |
496 | b09ea7d5 | Gleb Natapov | s->wait_for_sipi = 0;
|
497 | e0fd8781 | bellard | } |
498 | e0fd8781 | bellard | |
499 | 92a16d7a | Blue Swirl | static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, |
500 | d592d303 | bellard | uint8_t delivery_mode, uint8_t vector_num, |
501 | 1f6f408c | Jan Kiszka | uint8_t trigger_mode) |
502 | d592d303 | bellard | { |
503 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
504 | d3e9db93 | bellard | uint32_t deliver_bitmask[MAX_APIC_WORDS]; |
505 | d592d303 | bellard | int dest_shorthand = (s->icr[0] >> 18) & 3; |
506 | dae01685 | Jan Kiszka | APICCommonState *apic_iter; |
507 | d592d303 | bellard | |
508 | e0fd8781 | bellard | switch (dest_shorthand) {
|
509 | d3e9db93 | bellard | case 0: |
510 | d3e9db93 | bellard | apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); |
511 | d3e9db93 | bellard | break;
|
512 | d3e9db93 | bellard | case 1: |
513 | d3e9db93 | bellard | memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask)); |
514 | 678e12cc | Gleb Natapov | set_bit(deliver_bitmask, s->idx); |
515 | d3e9db93 | bellard | break;
|
516 | d3e9db93 | bellard | case 2: |
517 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); |
518 | d3e9db93 | bellard | break;
|
519 | d3e9db93 | bellard | case 3: |
520 | d3e9db93 | bellard | memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); |
521 | 678e12cc | Gleb Natapov | reset_bit(deliver_bitmask, s->idx); |
522 | d3e9db93 | bellard | break;
|
523 | e0fd8781 | bellard | } |
524 | e0fd8781 | bellard | |
525 | d592d303 | bellard | switch (delivery_mode) {
|
526 | d592d303 | bellard | case APIC_DM_INIT:
|
527 | d592d303 | bellard | { |
528 | d592d303 | bellard | int trig_mode = (s->icr[0] >> 15) & 1; |
529 | d592d303 | bellard | int level = (s->icr[0] >> 14) & 1; |
530 | d592d303 | bellard | if (level == 0 && trig_mode == 1) { |
531 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
532 | d3e9db93 | bellard | apic_iter->arb_id = apic_iter->id ); |
533 | d592d303 | bellard | return;
|
534 | d592d303 | bellard | } |
535 | d592d303 | bellard | } |
536 | d592d303 | bellard | break;
|
537 | d592d303 | bellard | |
538 | d592d303 | bellard | case APIC_DM_SIPI:
|
539 | 5fafdf24 | ths | foreach_apic(apic_iter, deliver_bitmask, |
540 | d3e9db93 | bellard | apic_startup(apic_iter, vector_num) ); |
541 | d592d303 | bellard | return;
|
542 | d592d303 | bellard | } |
543 | d592d303 | bellard | |
544 | 1f6f408c | Jan Kiszka | apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); |
545 | d592d303 | bellard | } |
546 | d592d303 | bellard | |
547 | 92a16d7a | Blue Swirl | int apic_get_interrupt(DeviceState *d)
|
548 | 574bbf7b | bellard | { |
549 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
550 | 574bbf7b | bellard | int intno;
|
551 | 574bbf7b | bellard | |
552 | 574bbf7b | bellard | /* if the APIC is installed or enabled, we let the 8259 handle the
|
553 | 574bbf7b | bellard | IRQs */
|
554 | 574bbf7b | bellard | if (!s)
|
555 | 574bbf7b | bellard | return -1; |
556 | 574bbf7b | bellard | if (!(s->spurious_vec & APIC_SV_ENABLE))
|
557 | 574bbf7b | bellard | return -1; |
558 | 3b46e624 | ths | |
559 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
560 | 0fbfbb59 | Gleb Natapov | intno = apic_irq_pending(s); |
561 | 0fbfbb59 | Gleb Natapov | |
562 | 0fbfbb59 | Gleb Natapov | if (intno == 0) { |
563 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
564 | 574bbf7b | bellard | return -1; |
565 | 0fbfbb59 | Gleb Natapov | } else if (intno < 0) { |
566 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
567 | d592d303 | bellard | return s->spurious_vec & 0xff; |
568 | 0fbfbb59 | Gleb Natapov | } |
569 | b4511723 | bellard | reset_bit(s->irr, intno); |
570 | 574bbf7b | bellard | set_bit(s->isr, intno); |
571 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
572 | 574bbf7b | bellard | apic_update_irq(s); |
573 | 574bbf7b | bellard | return intno;
|
574 | 574bbf7b | bellard | } |
575 | 574bbf7b | bellard | |
576 | 92a16d7a | Blue Swirl | int apic_accept_pic_intr(DeviceState *d)
|
577 | 0e21e12b | ths | { |
578 | dae01685 | Jan Kiszka | APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
579 | 0e21e12b | ths | uint32_t lvt0; |
580 | 0e21e12b | ths | |
581 | 0e21e12b | ths | if (!s)
|
582 | 0e21e12b | ths | return -1; |
583 | 0e21e12b | ths | |
584 | 0e21e12b | ths | lvt0 = s->lvt[APIC_LVT_LINT0]; |
585 | 0e21e12b | ths | |
586 | a5b38b51 | aurel32 | if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) == 0 || |
587 | a5b38b51 | aurel32 | (lvt0 & APIC_LVT_MASKED) == 0)
|
588 | 0e21e12b | ths | return 1; |
589 | 0e21e12b | ths | |
590 | 0e21e12b | ths | return 0; |
591 | 0e21e12b | ths | } |
592 | 0e21e12b | ths | |
593 | dae01685 | Jan Kiszka | static uint32_t apic_get_current_count(APICCommonState *s)
|
594 | 574bbf7b | bellard | { |
595 | 574bbf7b | bellard | int64_t d; |
596 | 574bbf7b | bellard | uint32_t val; |
597 | 74475455 | Paolo Bonzini | d = (qemu_get_clock_ns(vm_clock) - s->initial_count_load_time) >> |
598 | 574bbf7b | bellard | s->count_shift; |
599 | 574bbf7b | bellard | if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) {
|
600 | 574bbf7b | bellard | /* periodic */
|
601 | d592d303 | bellard | val = s->initial_count - (d % ((uint64_t)s->initial_count + 1));
|
602 | 574bbf7b | bellard | } else {
|
603 | 574bbf7b | bellard | if (d >= s->initial_count)
|
604 | 574bbf7b | bellard | val = 0;
|
605 | 574bbf7b | bellard | else
|
606 | 574bbf7b | bellard | val = s->initial_count - d; |
607 | 574bbf7b | bellard | } |
608 | 574bbf7b | bellard | return val;
|
609 | 574bbf7b | bellard | } |
610 | 574bbf7b | bellard | |
611 | dae01685 | Jan Kiszka | static void apic_timer_update(APICCommonState *s, int64_t current_time) |
612 | 574bbf7b | bellard | { |
613 | 7a380ca3 | Jan Kiszka | if (apic_next_timer(s, current_time)) {
|
614 | 7a380ca3 | Jan Kiszka | qemu_mod_timer(s->timer, s->next_time); |
615 | 574bbf7b | bellard | } else {
|
616 | 574bbf7b | bellard | qemu_del_timer(s->timer); |
617 | 574bbf7b | bellard | } |
618 | 574bbf7b | bellard | } |
619 | 574bbf7b | bellard | |
620 | 574bbf7b | bellard | static void apic_timer(void *opaque) |
621 | 574bbf7b | bellard | { |
622 | dae01685 | Jan Kiszka | APICCommonState *s = opaque; |
623 | 574bbf7b | bellard | |
624 | cf6d64bf | Blue Swirl | apic_local_deliver(s, APIC_LVT_TIMER); |
625 | 574bbf7b | bellard | apic_timer_update(s, s->next_time); |
626 | 574bbf7b | bellard | } |
627 | 574bbf7b | bellard | |
628 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readb(void *opaque, target_phys_addr_t addr) |
629 | 574bbf7b | bellard | { |
630 | 574bbf7b | bellard | return 0; |
631 | 574bbf7b | bellard | } |
632 | 574bbf7b | bellard | |
633 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readw(void *opaque, target_phys_addr_t addr) |
634 | 574bbf7b | bellard | { |
635 | 574bbf7b | bellard | return 0; |
636 | 574bbf7b | bellard | } |
637 | 574bbf7b | bellard | |
638 | c227f099 | Anthony Liguori | static void apic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
639 | 574bbf7b | bellard | { |
640 | 574bbf7b | bellard | } |
641 | 574bbf7b | bellard | |
642 | c227f099 | Anthony Liguori | static void apic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) |
643 | 574bbf7b | bellard | { |
644 | 574bbf7b | bellard | } |
645 | 574bbf7b | bellard | |
646 | c227f099 | Anthony Liguori | static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) |
647 | 574bbf7b | bellard | { |
648 | 92a16d7a | Blue Swirl | DeviceState *d; |
649 | dae01685 | Jan Kiszka | APICCommonState *s; |
650 | 574bbf7b | bellard | uint32_t val; |
651 | 574bbf7b | bellard | int index;
|
652 | 574bbf7b | bellard | |
653 | 92a16d7a | Blue Swirl | d = cpu_get_current_apic(); |
654 | 92a16d7a | Blue Swirl | if (!d) {
|
655 | 574bbf7b | bellard | return 0; |
656 | 0e26b7b8 | Blue Swirl | } |
657 | dae01685 | Jan Kiszka | s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
658 | 574bbf7b | bellard | |
659 | 574bbf7b | bellard | index = (addr >> 4) & 0xff; |
660 | 574bbf7b | bellard | switch(index) {
|
661 | 574bbf7b | bellard | case 0x02: /* id */ |
662 | 574bbf7b | bellard | val = s->id << 24;
|
663 | 574bbf7b | bellard | break;
|
664 | 574bbf7b | bellard | case 0x03: /* version */ |
665 | 574bbf7b | bellard | val = 0x11 | ((APIC_LVT_NB - 1) << 16); /* version 0x11 */ |
666 | 574bbf7b | bellard | break;
|
667 | 574bbf7b | bellard | case 0x08: |
668 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
669 | e5ad936b | Jan Kiszka | if (apic_report_tpr_access) {
|
670 | e5ad936b | Jan Kiszka | cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_READ); |
671 | e5ad936b | Jan Kiszka | } |
672 | 574bbf7b | bellard | val = s->tpr; |
673 | 574bbf7b | bellard | break;
|
674 | d592d303 | bellard | case 0x09: |
675 | d592d303 | bellard | val = apic_get_arb_pri(s); |
676 | d592d303 | bellard | break;
|
677 | 574bbf7b | bellard | case 0x0a: |
678 | 574bbf7b | bellard | /* ppr */
|
679 | 574bbf7b | bellard | val = apic_get_ppr(s); |
680 | 574bbf7b | bellard | break;
|
681 | b237db36 | aurel32 | case 0x0b: |
682 | b237db36 | aurel32 | val = 0;
|
683 | b237db36 | aurel32 | break;
|
684 | d592d303 | bellard | case 0x0d: |
685 | d592d303 | bellard | val = s->log_dest << 24;
|
686 | d592d303 | bellard | break;
|
687 | d592d303 | bellard | case 0x0e: |
688 | d592d303 | bellard | val = s->dest_mode << 28;
|
689 | d592d303 | bellard | break;
|
690 | 574bbf7b | bellard | case 0x0f: |
691 | 574bbf7b | bellard | val = s->spurious_vec; |
692 | 574bbf7b | bellard | break;
|
693 | 574bbf7b | bellard | case 0x10 ... 0x17: |
694 | 574bbf7b | bellard | val = s->isr[index & 7];
|
695 | 574bbf7b | bellard | break;
|
696 | 574bbf7b | bellard | case 0x18 ... 0x1f: |
697 | 574bbf7b | bellard | val = s->tmr[index & 7];
|
698 | 574bbf7b | bellard | break;
|
699 | 574bbf7b | bellard | case 0x20 ... 0x27: |
700 | 574bbf7b | bellard | val = s->irr[index & 7];
|
701 | 574bbf7b | bellard | break;
|
702 | 574bbf7b | bellard | case 0x28: |
703 | 574bbf7b | bellard | val = s->esr; |
704 | 574bbf7b | bellard | break;
|
705 | 574bbf7b | bellard | case 0x30: |
706 | 574bbf7b | bellard | case 0x31: |
707 | 574bbf7b | bellard | val = s->icr[index & 1];
|
708 | 574bbf7b | bellard | break;
|
709 | e0fd8781 | bellard | case 0x32 ... 0x37: |
710 | e0fd8781 | bellard | val = s->lvt[index - 0x32];
|
711 | e0fd8781 | bellard | break;
|
712 | 574bbf7b | bellard | case 0x38: |
713 | 574bbf7b | bellard | val = s->initial_count; |
714 | 574bbf7b | bellard | break;
|
715 | 574bbf7b | bellard | case 0x39: |
716 | 574bbf7b | bellard | val = apic_get_current_count(s); |
717 | 574bbf7b | bellard | break;
|
718 | 574bbf7b | bellard | case 0x3e: |
719 | 574bbf7b | bellard | val = s->divide_conf; |
720 | 574bbf7b | bellard | break;
|
721 | 574bbf7b | bellard | default:
|
722 | 574bbf7b | bellard | s->esr |= ESR_ILLEGAL_ADDRESS; |
723 | 574bbf7b | bellard | val = 0;
|
724 | 574bbf7b | bellard | break;
|
725 | 574bbf7b | bellard | } |
726 | d8023f31 | Blue Swirl | trace_apic_mem_readl(addr, val); |
727 | 574bbf7b | bellard | return val;
|
728 | 574bbf7b | bellard | } |
729 | 574bbf7b | bellard | |
730 | f5095c63 | Andreas Färber | static void apic_send_msi(target_phys_addr_t addr, uint32_t data) |
731 | 54c96da7 | Michael S. Tsirkin | { |
732 | 54c96da7 | Michael S. Tsirkin | uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
733 | 54c96da7 | Michael S. Tsirkin | uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
734 | 54c96da7 | Michael S. Tsirkin | uint8_t dest_mode = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1;
|
735 | 54c96da7 | Michael S. Tsirkin | uint8_t trigger_mode = (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1;
|
736 | 54c96da7 | Michael S. Tsirkin | uint8_t delivery = (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7;
|
737 | 54c96da7 | Michael S. Tsirkin | /* XXX: Ignore redirection hint. */
|
738 | 1f6f408c | Jan Kiszka | apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); |
739 | 54c96da7 | Michael S. Tsirkin | } |
740 | 54c96da7 | Michael S. Tsirkin | |
741 | c227f099 | Anthony Liguori | static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) |
742 | 574bbf7b | bellard | { |
743 | 92a16d7a | Blue Swirl | DeviceState *d; |
744 | dae01685 | Jan Kiszka | APICCommonState *s; |
745 | 54c96da7 | Michael S. Tsirkin | int index = (addr >> 4) & 0xff; |
746 | 54c96da7 | Michael S. Tsirkin | if (addr > 0xfff || !index) { |
747 | 54c96da7 | Michael S. Tsirkin | /* MSI and MMIO APIC are at the same memory location,
|
748 | 54c96da7 | Michael S. Tsirkin | * but actually not on the global bus: MSI is on PCI bus
|
749 | 54c96da7 | Michael S. Tsirkin | * APIC is connected directly to the CPU.
|
750 | 54c96da7 | Michael S. Tsirkin | * Mapping them on the global bus happens to work because
|
751 | 54c96da7 | Michael S. Tsirkin | * MSI registers are reserved in APIC MMIO and vice versa. */
|
752 | 54c96da7 | Michael S. Tsirkin | apic_send_msi(addr, val); |
753 | 54c96da7 | Michael S. Tsirkin | return;
|
754 | 54c96da7 | Michael S. Tsirkin | } |
755 | 574bbf7b | bellard | |
756 | 92a16d7a | Blue Swirl | d = cpu_get_current_apic(); |
757 | 92a16d7a | Blue Swirl | if (!d) {
|
758 | 574bbf7b | bellard | return;
|
759 | 0e26b7b8 | Blue Swirl | } |
760 | dae01685 | Jan Kiszka | s = DO_UPCAST(APICCommonState, busdev.qdev, d); |
761 | 574bbf7b | bellard | |
762 | d8023f31 | Blue Swirl | trace_apic_mem_writel(addr, val); |
763 | 574bbf7b | bellard | |
764 | 574bbf7b | bellard | switch(index) {
|
765 | 574bbf7b | bellard | case 0x02: |
766 | 574bbf7b | bellard | s->id = (val >> 24);
|
767 | 574bbf7b | bellard | break;
|
768 | e0fd8781 | bellard | case 0x03: |
769 | e0fd8781 | bellard | break;
|
770 | 574bbf7b | bellard | case 0x08: |
771 | e5ad936b | Jan Kiszka | if (apic_report_tpr_access) {
|
772 | e5ad936b | Jan Kiszka | cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_WRITE); |
773 | e5ad936b | Jan Kiszka | } |
774 | 574bbf7b | bellard | s->tpr = val; |
775 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_TO_VAPIC); |
776 | d592d303 | bellard | apic_update_irq(s); |
777 | 574bbf7b | bellard | break;
|
778 | e0fd8781 | bellard | case 0x09: |
779 | e0fd8781 | bellard | case 0x0a: |
780 | e0fd8781 | bellard | break;
|
781 | 574bbf7b | bellard | case 0x0b: /* EOI */ |
782 | 574bbf7b | bellard | apic_eoi(s); |
783 | 574bbf7b | bellard | break;
|
784 | d592d303 | bellard | case 0x0d: |
785 | d592d303 | bellard | s->log_dest = val >> 24;
|
786 | d592d303 | bellard | break;
|
787 | d592d303 | bellard | case 0x0e: |
788 | d592d303 | bellard | s->dest_mode = val >> 28;
|
789 | d592d303 | bellard | break;
|
790 | 574bbf7b | bellard | case 0x0f: |
791 | 574bbf7b | bellard | s->spurious_vec = val & 0x1ff;
|
792 | d592d303 | bellard | apic_update_irq(s); |
793 | 574bbf7b | bellard | break;
|
794 | e0fd8781 | bellard | case 0x10 ... 0x17: |
795 | e0fd8781 | bellard | case 0x18 ... 0x1f: |
796 | e0fd8781 | bellard | case 0x20 ... 0x27: |
797 | e0fd8781 | bellard | case 0x28: |
798 | e0fd8781 | bellard | break;
|
799 | 574bbf7b | bellard | case 0x30: |
800 | d592d303 | bellard | s->icr[0] = val;
|
801 | 92a16d7a | Blue Swirl | apic_deliver(d, (s->icr[1] >> 24) & 0xff, (s->icr[0] >> 11) & 1, |
802 | d592d303 | bellard | (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), |
803 | 1f6f408c | Jan Kiszka | (s->icr[0] >> 15) & 1); |
804 | d592d303 | bellard | break;
|
805 | 574bbf7b | bellard | case 0x31: |
806 | d592d303 | bellard | s->icr[1] = val;
|
807 | 574bbf7b | bellard | break;
|
808 | 574bbf7b | bellard | case 0x32 ... 0x37: |
809 | 574bbf7b | bellard | { |
810 | 574bbf7b | bellard | int n = index - 0x32; |
811 | 574bbf7b | bellard | s->lvt[n] = val; |
812 | 574bbf7b | bellard | if (n == APIC_LVT_TIMER)
|
813 | 74475455 | Paolo Bonzini | apic_timer_update(s, qemu_get_clock_ns(vm_clock)); |
814 | 574bbf7b | bellard | } |
815 | 574bbf7b | bellard | break;
|
816 | 574bbf7b | bellard | case 0x38: |
817 | 574bbf7b | bellard | s->initial_count = val; |
818 | 74475455 | Paolo Bonzini | s->initial_count_load_time = qemu_get_clock_ns(vm_clock); |
819 | 574bbf7b | bellard | apic_timer_update(s, s->initial_count_load_time); |
820 | 574bbf7b | bellard | break;
|
821 | e0fd8781 | bellard | case 0x39: |
822 | e0fd8781 | bellard | break;
|
823 | 574bbf7b | bellard | case 0x3e: |
824 | 574bbf7b | bellard | { |
825 | 574bbf7b | bellard | int v;
|
826 | 574bbf7b | bellard | s->divide_conf = val & 0xb;
|
827 | 574bbf7b | bellard | v = (s->divide_conf & 3) | ((s->divide_conf >> 1) & 4); |
828 | 574bbf7b | bellard | s->count_shift = (v + 1) & 7; |
829 | 574bbf7b | bellard | } |
830 | 574bbf7b | bellard | break;
|
831 | 574bbf7b | bellard | default:
|
832 | 574bbf7b | bellard | s->esr |= ESR_ILLEGAL_ADDRESS; |
833 | 574bbf7b | bellard | break;
|
834 | 574bbf7b | bellard | } |
835 | 574bbf7b | bellard | } |
836 | 574bbf7b | bellard | |
837 | e5ad936b | Jan Kiszka | static void apic_pre_save(APICCommonState *s) |
838 | e5ad936b | Jan Kiszka | { |
839 | e5ad936b | Jan Kiszka | apic_sync_vapic(s, SYNC_FROM_VAPIC); |
840 | e5ad936b | Jan Kiszka | } |
841 | e5ad936b | Jan Kiszka | |
842 | 7a380ca3 | Jan Kiszka | static void apic_post_load(APICCommonState *s) |
843 | 7a380ca3 | Jan Kiszka | { |
844 | 7a380ca3 | Jan Kiszka | if (s->timer_expiry != -1) { |
845 | 7a380ca3 | Jan Kiszka | qemu_mod_timer(s->timer, s->timer_expiry); |
846 | 7a380ca3 | Jan Kiszka | } else {
|
847 | 7a380ca3 | Jan Kiszka | qemu_del_timer(s->timer); |
848 | 7a380ca3 | Jan Kiszka | } |
849 | 7a380ca3 | Jan Kiszka | } |
850 | 7a380ca3 | Jan Kiszka | |
851 | 312b4234 | Avi Kivity | static const MemoryRegionOps apic_io_ops = { |
852 | 312b4234 | Avi Kivity | .old_mmio = { |
853 | 312b4234 | Avi Kivity | .read = { apic_mem_readb, apic_mem_readw, apic_mem_readl, }, |
854 | 312b4234 | Avi Kivity | .write = { apic_mem_writeb, apic_mem_writew, apic_mem_writel, }, |
855 | 312b4234 | Avi Kivity | }, |
856 | 312b4234 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
857 | 574bbf7b | bellard | }; |
858 | 574bbf7b | bellard | |
859 | dae01685 | Jan Kiszka | static void apic_init(APICCommonState *s) |
860 | 8546b099 | Blue Swirl | { |
861 | dae01685 | Jan Kiszka | memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic-msi",
|
862 | dae01685 | Jan Kiszka | MSI_SPACE_SIZE); |
863 | 8546b099 | Blue Swirl | |
864 | 74475455 | Paolo Bonzini | s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s); |
865 | 8546b099 | Blue Swirl | local_apics[s->idx] = s; |
866 | 08a82ac0 | Jan Kiszka | |
867 | 08a82ac0 | Jan Kiszka | msi_supported = true;
|
868 | 8546b099 | Blue Swirl | } |
869 | 8546b099 | Blue Swirl | |
870 | 999e12bb | Anthony Liguori | static void apic_class_init(ObjectClass *klass, void *data) |
871 | 999e12bb | Anthony Liguori | { |
872 | 999e12bb | Anthony Liguori | APICCommonClass *k = APIC_COMMON_CLASS(klass); |
873 | 999e12bb | Anthony Liguori | |
874 | 999e12bb | Anthony Liguori | k->init = apic_init; |
875 | 999e12bb | Anthony Liguori | k->set_base = apic_set_base; |
876 | 999e12bb | Anthony Liguori | k->set_tpr = apic_set_tpr; |
877 | e5ad936b | Jan Kiszka | k->get_tpr = apic_get_tpr; |
878 | e5ad936b | Jan Kiszka | k->vapic_base_update = apic_vapic_base_update; |
879 | 999e12bb | Anthony Liguori | k->external_nmi = apic_external_nmi; |
880 | e5ad936b | Jan Kiszka | k->pre_save = apic_pre_save; |
881 | 999e12bb | Anthony Liguori | k->post_load = apic_post_load; |
882 | 999e12bb | Anthony Liguori | } |
883 | 999e12bb | Anthony Liguori | |
884 | 39bffca2 | Anthony Liguori | static TypeInfo apic_info = {
|
885 | 39bffca2 | Anthony Liguori | .name = "apic",
|
886 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(APICCommonState),
|
887 | 39bffca2 | Anthony Liguori | .parent = TYPE_APIC_COMMON, |
888 | 39bffca2 | Anthony Liguori | .class_init = apic_class_init, |
889 | 8546b099 | Blue Swirl | }; |
890 | 8546b099 | Blue Swirl | |
891 | 83f7d43a | Andreas Färber | static void apic_register_types(void) |
892 | 8546b099 | Blue Swirl | { |
893 | 39bffca2 | Anthony Liguori | type_register_static(&apic_info); |
894 | 8546b099 | Blue Swirl | } |
895 | 8546b099 | Blue Swirl | |
896 | 83f7d43a | Andreas Färber | type_init(apic_register_types) |