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#ifndef QEMU_PAM_H
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#define QEMU_PAM_H
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/*
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 * Copyright (c) 2006 Fabrice Bellard
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 * Copyright (c) 2011 Isaku Yamahata <yamahata at valinux co jp>
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 *               VA Linux Systems Japan K.K.
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 * Copyright (c) 2012 Jason Baron <jbaron@redhat.com>
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 *
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 * Split out from piix_pci.c
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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/*
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 * SMRAM memory area and PAM memory area in Legacy address range for PC.
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 * PAM: Programmable Attribute Map registers
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 *
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 * 0xa0000 - 0xbffff compatible SMRAM
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 *
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 * 0xc0000 - 0xc3fff Expansion area memory segments
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 * 0xc4000 - 0xc7fff
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 * 0xc8000 - 0xcbfff
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 * 0xcc000 - 0xcffff
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 * 0xd0000 - 0xd3fff
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 * 0xd4000 - 0xd7fff
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 * 0xd8000 - 0xdbfff
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 * 0xdc000 - 0xdffff
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 * 0xe0000 - 0xe3fff Extended System BIOS Area Memory Segments
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 * 0xe4000 - 0xe7fff
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 * 0xe8000 - 0xebfff
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 * 0xec000 - 0xeffff
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 *
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 * 0xf0000 - 0xfffff System BIOS Area Memory Segments
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 */
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#include "qemu-common.h"
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#include "exec/memory.h"
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#define SMRAM_C_BASE    0xa0000
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#define SMRAM_C_END     0xc0000
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#define SMRAM_C_SIZE    0x20000
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#define PAM_EXPAN_BASE  0xc0000
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#define PAM_EXPAN_SIZE  0x04000
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#define PAM_EXBIOS_BASE 0xe0000
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#define PAM_EXBIOS_SIZE 0x04000
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#define PAM_BIOS_BASE   0xf0000
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#define PAM_BIOS_END    0xfffff
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/* 64KB: Intel 3 series express chipset family p. 58*/
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#define PAM_BIOS_SIZE   0x10000
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/* PAM registers: log nibble and high nibble*/
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#define PAM_ATTR_WE     ((uint8_t)2)
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#define PAM_ATTR_RE     ((uint8_t)1)
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#define PAM_ATTR_MASK   ((uint8_t)3)
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/* SMRAM register */
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#define SMRAM_D_OPEN           ((uint8_t)(1 << 6))
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#define SMRAM_D_CLS            ((uint8_t)(1 << 5))
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#define SMRAM_D_LCK            ((uint8_t)(1 << 4))
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#define SMRAM_G_SMRAME         ((uint8_t)(1 << 3))
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#define SMRAM_C_BASE_SEG_MASK  ((uint8_t)0x7)
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#define SMRAM_C_BASE_SEG       ((uint8_t)0x2)  /* hardwired to b010 */
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typedef struct PAMMemoryRegion {
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    MemoryRegion alias[4];  /* index = PAM value */
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    unsigned current;
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} PAMMemoryRegion;
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void smram_update(MemoryRegion *smram_region, uint8_t smram,
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                  uint8_t smm_enabled);
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void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram,
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                   MemoryRegion *smram_region);
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void init_pam(MemoryRegion *ram, MemoryRegion *system, MemoryRegion *pci,
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              PAMMemoryRegion *mem, uint32_t start, uint32_t size);
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void pam_update(PAMMemoryRegion *mem, int idx, uint8_t val);
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#endif /* QEMU_PAM_H */