root / hw / spapr_pci.c @ 0dad6c35
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1 | 3384f95c | David Gibson | /*
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2 | 3384f95c | David Gibson | * QEMU sPAPR PCI host originated from Uninorth PCI host
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3 | 3384f95c | David Gibson | *
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4 | 3384f95c | David Gibson | * Copyright (c) 2011 Alexey Kardashevskiy, IBM Corporation.
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5 | 3384f95c | David Gibson | * Copyright (C) 2011 David Gibson, IBM Corporation.
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6 | 3384f95c | David Gibson | *
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7 | 3384f95c | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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8 | 3384f95c | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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9 | 3384f95c | David Gibson | * in the Software without restriction, including without limitation the rights
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10 | 3384f95c | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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11 | 3384f95c | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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12 | 3384f95c | David Gibson | * furnished to do so, subject to the following conditions:
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13 | 3384f95c | David Gibson | *
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14 | 3384f95c | David Gibson | * The above copyright notice and this permission notice shall be included in
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15 | 3384f95c | David Gibson | * all copies or substantial portions of the Software.
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16 | 3384f95c | David Gibson | *
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17 | 3384f95c | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 | 3384f95c | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 | 3384f95c | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 | 3384f95c | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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21 | 3384f95c | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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22 | 3384f95c | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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23 | 3384f95c | David Gibson | * THE SOFTWARE.
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24 | 3384f95c | David Gibson | */
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25 | 3384f95c | David Gibson | #include "hw.h" |
26 | 3384f95c | David Gibson | #include "pci.h" |
27 | 3384f95c | David Gibson | #include "pci_host.h" |
28 | 3384f95c | David Gibson | #include "hw/spapr.h" |
29 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
30 | 3384f95c | David Gibson | #include "exec-memory.h" |
31 | 3384f95c | David Gibson | #include <libfdt.h> |
32 | 3384f95c | David Gibson | |
33 | 3384f95c | David Gibson | #include "hw/pci_internals.h" |
34 | 3384f95c | David Gibson | |
35 | 3384f95c | David Gibson | static const uint32_t bars[] = { |
36 | 3384f95c | David Gibson | PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, |
37 | 3384f95c | David Gibson | PCI_BASE_ADDRESS_2, PCI_BASE_ADDRESS_3, |
38 | 3384f95c | David Gibson | PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_5 |
39 | 3384f95c | David Gibson | /*, PCI_ROM_ADDRESS*/
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40 | 3384f95c | David Gibson | }; |
41 | 3384f95c | David Gibson | |
42 | 3384f95c | David Gibson | static PCIDevice *find_dev(sPAPREnvironment *spapr,
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43 | 3384f95c | David Gibson | uint64_t buid, uint32_t config_addr) |
44 | 3384f95c | David Gibson | { |
45 | 3384f95c | David Gibson | DeviceState *qdev; |
46 | 3384f95c | David Gibson | int devfn = (config_addr >> 8) & 0xFF; |
47 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
48 | 3384f95c | David Gibson | |
49 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
50 | 3384f95c | David Gibson | if (phb->buid != buid) {
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51 | 3384f95c | David Gibson | continue;
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52 | 3384f95c | David Gibson | } |
53 | 3384f95c | David Gibson | |
54 | 3a26360d | Anthony Liguori | QTAILQ_FOREACH(qdev, &phb->host_state.bus->qbus.children, sibling) { |
55 | 3384f95c | David Gibson | PCIDevice *dev = (PCIDevice *)qdev; |
56 | 3384f95c | David Gibson | if (dev->devfn == devfn) {
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57 | 3384f95c | David Gibson | return dev;
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58 | 3384f95c | David Gibson | } |
59 | 3384f95c | David Gibson | } |
60 | 3384f95c | David Gibson | } |
61 | 3384f95c | David Gibson | |
62 | 3384f95c | David Gibson | return NULL; |
63 | 3384f95c | David Gibson | } |
64 | 3384f95c | David Gibson | |
65 | 3f7565c9 | Benjamin Herrenschmidt | static uint32_t rtas_pci_cfgaddr(uint32_t arg)
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66 | 3f7565c9 | Benjamin Herrenschmidt | { |
67 | 3f7565c9 | Benjamin Herrenschmidt | return ((arg >> 20) & 0xf00) | (arg & 0xff); |
68 | 3f7565c9 | Benjamin Herrenschmidt | } |
69 | 3f7565c9 | Benjamin Herrenschmidt | |
70 | 88045ac5 | Alexander Graf | static uint32_t rtas_read_pci_config_do(PCIDevice *pci_dev, uint32_t addr,
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71 | 88045ac5 | Alexander Graf | uint32_t limit, uint32_t len) |
72 | 88045ac5 | Alexander Graf | { |
73 | 88045ac5 | Alexander Graf | if ((addr + len) <= limit) {
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74 | 88045ac5 | Alexander Graf | return pci_host_config_read_common(pci_dev, addr, limit, len);
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75 | 88045ac5 | Alexander Graf | } else {
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76 | 88045ac5 | Alexander Graf | return ~0x0; |
77 | 88045ac5 | Alexander Graf | } |
78 | 88045ac5 | Alexander Graf | } |
79 | 88045ac5 | Alexander Graf | |
80 | 88045ac5 | Alexander Graf | static void rtas_write_pci_config_do(PCIDevice *pci_dev, uint32_t addr, |
81 | 88045ac5 | Alexander Graf | uint32_t limit, uint32_t val, |
82 | 88045ac5 | Alexander Graf | uint32_t len) |
83 | 88045ac5 | Alexander Graf | { |
84 | 88045ac5 | Alexander Graf | if ((addr + len) <= limit) {
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85 | 88045ac5 | Alexander Graf | pci_host_config_write_common(pci_dev, addr, limit, val, len); |
86 | 88045ac5 | Alexander Graf | } |
87 | 88045ac5 | Alexander Graf | } |
88 | 88045ac5 | Alexander Graf | |
89 | 3384f95c | David Gibson | static void rtas_ibm_read_pci_config(sPAPREnvironment *spapr, |
90 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
91 | 3384f95c | David Gibson | target_ulong args, |
92 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
93 | 3384f95c | David Gibson | { |
94 | 3384f95c | David Gibson | uint32_t val, size, addr; |
95 | 3384f95c | David Gibson | uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
96 | 3384f95c | David Gibson | PCIDevice *dev = find_dev(spapr, buid, rtas_ld(args, 0));
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97 | 3384f95c | David Gibson | |
98 | 3384f95c | David Gibson | if (!dev) {
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99 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
100 | 3384f95c | David Gibson | return;
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101 | 3384f95c | David Gibson | } |
102 | 3384f95c | David Gibson | size = rtas_ld(args, 3);
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103 | 3f7565c9 | Benjamin Herrenschmidt | addr = rtas_pci_cfgaddr(rtas_ld(args, 0));
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104 | 88045ac5 | Alexander Graf | val = rtas_read_pci_config_do(dev, addr, pci_config_size(dev), size); |
105 | 3384f95c | David Gibson | rtas_st(rets, 0, 0); |
106 | 3384f95c | David Gibson | rtas_st(rets, 1, val);
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107 | 3384f95c | David Gibson | } |
108 | 3384f95c | David Gibson | |
109 | 3384f95c | David Gibson | static void rtas_read_pci_config(sPAPREnvironment *spapr, |
110 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
111 | 3384f95c | David Gibson | target_ulong args, |
112 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
113 | 3384f95c | David Gibson | { |
114 | 3384f95c | David Gibson | uint32_t val, size, addr; |
115 | 3384f95c | David Gibson | PCIDevice *dev = find_dev(spapr, 0, rtas_ld(args, 0)); |
116 | 3384f95c | David Gibson | |
117 | 3384f95c | David Gibson | if (!dev) {
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118 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
119 | 3384f95c | David Gibson | return;
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120 | 3384f95c | David Gibson | } |
121 | 3384f95c | David Gibson | size = rtas_ld(args, 1);
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122 | 3f7565c9 | Benjamin Herrenschmidt | addr = rtas_pci_cfgaddr(rtas_ld(args, 0));
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123 | 88045ac5 | Alexander Graf | val = rtas_read_pci_config_do(dev, addr, pci_config_size(dev), size); |
124 | 3384f95c | David Gibson | rtas_st(rets, 0, 0); |
125 | 3384f95c | David Gibson | rtas_st(rets, 1, val);
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126 | 3384f95c | David Gibson | } |
127 | 3384f95c | David Gibson | |
128 | 3384f95c | David Gibson | static void rtas_ibm_write_pci_config(sPAPREnvironment *spapr, |
129 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
130 | 3384f95c | David Gibson | target_ulong args, |
131 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
132 | 3384f95c | David Gibson | { |
133 | 3384f95c | David Gibson | uint32_t val, size, addr; |
134 | 3384f95c | David Gibson | uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
135 | 3384f95c | David Gibson | PCIDevice *dev = find_dev(spapr, buid, rtas_ld(args, 0));
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136 | 3384f95c | David Gibson | |
137 | 3384f95c | David Gibson | if (!dev) {
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138 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
139 | 3384f95c | David Gibson | return;
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140 | 3384f95c | David Gibson | } |
141 | 3384f95c | David Gibson | val = rtas_ld(args, 4);
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142 | 3384f95c | David Gibson | size = rtas_ld(args, 3);
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143 | 3f7565c9 | Benjamin Herrenschmidt | addr = rtas_pci_cfgaddr(rtas_ld(args, 0));
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144 | 88045ac5 | Alexander Graf | rtas_write_pci_config_do(dev, addr, pci_config_size(dev), val, size); |
145 | 3384f95c | David Gibson | rtas_st(rets, 0, 0); |
146 | 3384f95c | David Gibson | } |
147 | 3384f95c | David Gibson | |
148 | 3384f95c | David Gibson | static void rtas_write_pci_config(sPAPREnvironment *spapr, |
149 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
150 | 3384f95c | David Gibson | target_ulong args, |
151 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
152 | 3384f95c | David Gibson | { |
153 | 3384f95c | David Gibson | uint32_t val, size, addr; |
154 | 3384f95c | David Gibson | PCIDevice *dev = find_dev(spapr, 0, rtas_ld(args, 0)); |
155 | 3384f95c | David Gibson | |
156 | 3384f95c | David Gibson | if (!dev) {
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157 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
158 | 3384f95c | David Gibson | return;
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159 | 3384f95c | David Gibson | } |
160 | 3384f95c | David Gibson | val = rtas_ld(args, 2);
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161 | 3384f95c | David Gibson | size = rtas_ld(args, 1);
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162 | 3f7565c9 | Benjamin Herrenschmidt | addr = rtas_pci_cfgaddr(rtas_ld(args, 0));
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163 | 88045ac5 | Alexander Graf | rtas_write_pci_config_do(dev, addr, pci_config_size(dev), val, size); |
164 | 3384f95c | David Gibson | rtas_st(rets, 0, 0); |
165 | 3384f95c | David Gibson | } |
166 | 3384f95c | David Gibson | |
167 | 3384f95c | David Gibson | static int pci_spapr_map_irq(PCIDevice *pci_dev, int irq_num) |
168 | 3384f95c | David Gibson | { |
169 | 3384f95c | David Gibson | /*
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170 | 3384f95c | David Gibson | * Here we need to convert pci_dev + irq_num to some unique value
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171 | 3384f95c | David Gibson | * which is less than number of IRQs on the specific bus (now it
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172 | 3384f95c | David Gibson | * is 16). At the moment irq_num == device_id (number of the
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173 | 3384f95c | David Gibson | * slot?)
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174 | 3384f95c | David Gibson | * FIXME: we should swizzle in fn and irq_num
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175 | 3384f95c | David Gibson | */
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176 | 3384f95c | David Gibson | return (pci_dev->devfn >> 3) % SPAPR_PCI_NUM_LSI; |
177 | 3384f95c | David Gibson | } |
178 | 3384f95c | David Gibson | |
179 | 3384f95c | David Gibson | static void pci_spapr_set_irq(void *opaque, int irq_num, int level) |
180 | 3384f95c | David Gibson | { |
181 | 3384f95c | David Gibson | /*
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182 | 3384f95c | David Gibson | * Here we use the number returned by pci_spapr_map_irq to find a
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183 | 3384f95c | David Gibson | * corresponding qemu_irq.
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184 | 3384f95c | David Gibson | */
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185 | 3384f95c | David Gibson | sPAPRPHBState *phb = opaque; |
186 | 3384f95c | David Gibson | |
187 | 3384f95c | David Gibson | qemu_set_irq(phb->lsi_table[irq_num].qirq, level); |
188 | 3384f95c | David Gibson | } |
189 | 3384f95c | David Gibson | |
190 | 3384f95c | David Gibson | static int spapr_phb_init(SysBusDevice *s) |
191 | 3384f95c | David Gibson | { |
192 | 3384f95c | David Gibson | sPAPRPHBState *phb = FROM_SYSBUS(sPAPRPHBState, s); |
193 | 3384f95c | David Gibson | int i;
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194 | 3384f95c | David Gibson | |
195 | 3384f95c | David Gibson | /* Initialize the LSI table */
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196 | 3384f95c | David Gibson | for (i = 0; i < SPAPR_PCI_NUM_LSI; i++) { |
197 | 3384f95c | David Gibson | qemu_irq qirq; |
198 | 3384f95c | David Gibson | uint32_t num; |
199 | 3384f95c | David Gibson | |
200 | 3384f95c | David Gibson | qirq = spapr_allocate_irq(0, &num);
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201 | 3384f95c | David Gibson | if (!qirq) {
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202 | 3384f95c | David Gibson | return -1; |
203 | 3384f95c | David Gibson | } |
204 | 3384f95c | David Gibson | |
205 | 3384f95c | David Gibson | phb->lsi_table[i].dt_irq = num; |
206 | 3384f95c | David Gibson | phb->lsi_table[i].qirq = qirq; |
207 | 3384f95c | David Gibson | } |
208 | 3384f95c | David Gibson | |
209 | 3384f95c | David Gibson | return 0; |
210 | 3384f95c | David Gibson | } |
211 | 3384f95c | David Gibson | |
212 | 3384f95c | David Gibson | static int spapr_main_pci_host_init(PCIDevice *d) |
213 | 3384f95c | David Gibson | { |
214 | 3384f95c | David Gibson | return 0; |
215 | 3384f95c | David Gibson | } |
216 | 3384f95c | David Gibson | |
217 | 40021f08 | Anthony Liguori | static void spapr_main_pci_host_class_init(ObjectClass *klass, void *data) |
218 | 40021f08 | Anthony Liguori | { |
219 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
220 | 40021f08 | Anthony Liguori | |
221 | 40021f08 | Anthony Liguori | k->init = spapr_main_pci_host_init; |
222 | 40021f08 | Anthony Liguori | } |
223 | 40021f08 | Anthony Liguori | |
224 | 39bffca2 | Anthony Liguori | static TypeInfo spapr_main_pci_host_info = {
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225 | 39bffca2 | Anthony Liguori | .name = "spapr-pci-host-bridge-pci",
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226 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
227 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PCIDevice),
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228 | 39bffca2 | Anthony Liguori | .class_init = spapr_main_pci_host_class_init, |
229 | 3384f95c | David Gibson | }; |
230 | 3384f95c | David Gibson | |
231 | 999e12bb | Anthony Liguori | static void spapr_phb_class_init(ObjectClass *klass, void *data) |
232 | 999e12bb | Anthony Liguori | { |
233 | 999e12bb | Anthony Liguori | SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); |
234 | 999e12bb | Anthony Liguori | |
235 | 999e12bb | Anthony Liguori | sdc->init = spapr_phb_init; |
236 | 999e12bb | Anthony Liguori | } |
237 | 999e12bb | Anthony Liguori | |
238 | 39bffca2 | Anthony Liguori | static TypeInfo spapr_phb_info = {
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239 | 39bffca2 | Anthony Liguori | .name = "spapr-pci-host-bridge",
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240 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
241 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(sPAPRPHBState),
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242 | 39bffca2 | Anthony Liguori | .class_init = spapr_phb_class_init, |
243 | 999e12bb | Anthony Liguori | }; |
244 | 999e12bb | Anthony Liguori | |
245 | 3384f95c | David Gibson | static void spapr_register_devices(void) |
246 | 3384f95c | David Gibson | { |
247 | 39bffca2 | Anthony Liguori | type_register_static(&spapr_phb_info); |
248 | 39bffca2 | Anthony Liguori | type_register_static(&spapr_main_pci_host_info); |
249 | 3384f95c | David Gibson | } |
250 | 3384f95c | David Gibson | |
251 | 3384f95c | David Gibson | device_init(spapr_register_devices) |
252 | 3384f95c | David Gibson | |
253 | 3384f95c | David Gibson | static uint64_t spapr_io_read(void *opaque, target_phys_addr_t addr, |
254 | 3384f95c | David Gibson | unsigned size)
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255 | 3384f95c | David Gibson | { |
256 | 3384f95c | David Gibson | switch (size) {
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257 | 3384f95c | David Gibson | case 1: |
258 | 3384f95c | David Gibson | return cpu_inb(addr);
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259 | 3384f95c | David Gibson | case 2: |
260 | 3384f95c | David Gibson | return cpu_inw(addr);
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261 | 3384f95c | David Gibson | case 4: |
262 | 3384f95c | David Gibson | return cpu_inl(addr);
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263 | 3384f95c | David Gibson | } |
264 | 3384f95c | David Gibson | assert(0);
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265 | 3384f95c | David Gibson | } |
266 | 3384f95c | David Gibson | |
267 | 3384f95c | David Gibson | static void spapr_io_write(void *opaque, target_phys_addr_t addr, |
268 | 3384f95c | David Gibson | uint64_t data, unsigned size)
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269 | 3384f95c | David Gibson | { |
270 | 3384f95c | David Gibson | switch (size) {
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271 | 3384f95c | David Gibson | case 1: |
272 | 3384f95c | David Gibson | cpu_outb(addr, data); |
273 | 3384f95c | David Gibson | return;
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274 | 3384f95c | David Gibson | case 2: |
275 | 3384f95c | David Gibson | cpu_outw(addr, data); |
276 | 3384f95c | David Gibson | return;
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277 | 3384f95c | David Gibson | case 4: |
278 | 3384f95c | David Gibson | cpu_outl(addr, data); |
279 | 3384f95c | David Gibson | return;
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280 | 3384f95c | David Gibson | } |
281 | 3384f95c | David Gibson | assert(0);
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282 | 3384f95c | David Gibson | } |
283 | 3384f95c | David Gibson | |
284 | 3384f95c | David Gibson | static MemoryRegionOps spapr_io_ops = {
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285 | 3384f95c | David Gibson | .endianness = DEVICE_LITTLE_ENDIAN, |
286 | 3384f95c | David Gibson | .read = spapr_io_read, |
287 | 3384f95c | David Gibson | .write = spapr_io_write |
288 | 3384f95c | David Gibson | }; |
289 | 3384f95c | David Gibson | |
290 | 3384f95c | David Gibson | void spapr_create_phb(sPAPREnvironment *spapr,
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291 | 3384f95c | David Gibson | const char *busname, uint64_t buid, |
292 | 3384f95c | David Gibson | uint64_t mem_win_addr, uint64_t mem_win_size, |
293 | 3384f95c | David Gibson | uint64_t io_win_addr) |
294 | 3384f95c | David Gibson | { |
295 | 3384f95c | David Gibson | DeviceState *dev; |
296 | 3384f95c | David Gibson | SysBusDevice *s; |
297 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
298 | 3384f95c | David Gibson | PCIBus *bus; |
299 | 3384f95c | David Gibson | char namebuf[strlen(busname)+11]; |
300 | 3384f95c | David Gibson | |
301 | 3384f95c | David Gibson | dev = qdev_create(NULL, "spapr-pci-host-bridge"); |
302 | 3384f95c | David Gibson | qdev_init_nofail(dev); |
303 | 3384f95c | David Gibson | s = sysbus_from_qdev(dev); |
304 | 3384f95c | David Gibson | phb = FROM_SYSBUS(sPAPRPHBState, s); |
305 | 3384f95c | David Gibson | |
306 | 3384f95c | David Gibson | phb->mem_win_addr = mem_win_addr; |
307 | 3384f95c | David Gibson | |
308 | 3384f95c | David Gibson | sprintf(namebuf, "%s-mem", busname);
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309 | 3384f95c | David Gibson | memory_region_init(&phb->memspace, namebuf, INT64_MAX); |
310 | 3384f95c | David Gibson | |
311 | 3384f95c | David Gibson | sprintf(namebuf, "%s-memwindow", busname);
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312 | 3384f95c | David Gibson | memory_region_init_alias(&phb->memwindow, namebuf, &phb->memspace, |
313 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_BUS_OFFSET, mem_win_size); |
314 | 3384f95c | David Gibson | memory_region_add_subregion(get_system_memory(), mem_win_addr, |
315 | 3384f95c | David Gibson | &phb->memwindow); |
316 | 3384f95c | David Gibson | |
317 | 3384f95c | David Gibson | phb->io_win_addr = io_win_addr; |
318 | 3384f95c | David Gibson | |
319 | 3384f95c | David Gibson | /* On ppc, we only have MMIO no specific IO space from the CPU
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320 | 3384f95c | David Gibson | * perspective. In theory we ought to be able to embed the PCI IO
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321 | 3384f95c | David Gibson | * memory region direction in the system memory space. However,
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322 | 3384f95c | David Gibson | * if any of the IO BAR subregions use the old_portio mechanism,
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323 | 3384f95c | David Gibson | * that won't be processed properly unless accessed from the
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324 | 3384f95c | David Gibson | * system io address space. This hack to bounce things via
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325 | 3384f95c | David Gibson | * system_io works around the problem until all the users of
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326 | 3384f95c | David Gibson | * old_portion are updated */
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327 | 3384f95c | David Gibson | sprintf(namebuf, "%s-io", busname);
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328 | 3384f95c | David Gibson | memory_region_init(&phb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE); |
329 | 3384f95c | David Gibson | /* FIXME: fix to support multiple PHBs */
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330 | 3384f95c | David Gibson | memory_region_add_subregion(get_system_io(), 0, &phb->iospace);
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331 | 3384f95c | David Gibson | |
332 | 3384f95c | David Gibson | sprintf(namebuf, "%s-iowindow", busname);
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333 | 3384f95c | David Gibson | memory_region_init_io(&phb->iowindow, &spapr_io_ops, phb, |
334 | 3384f95c | David Gibson | namebuf, SPAPR_PCI_IO_WIN_SIZE); |
335 | 3384f95c | David Gibson | memory_region_add_subregion(get_system_memory(), io_win_addr, |
336 | 3384f95c | David Gibson | &phb->iowindow); |
337 | 3384f95c | David Gibson | |
338 | 3384f95c | David Gibson | phb->host_state.bus = bus = pci_register_bus(&phb->busdev.qdev, busname, |
339 | 3384f95c | David Gibson | pci_spapr_set_irq, |
340 | 3384f95c | David Gibson | pci_spapr_map_irq, |
341 | 3384f95c | David Gibson | phb, |
342 | 3384f95c | David Gibson | &phb->memspace, &phb->iospace, |
343 | 3384f95c | David Gibson | PCI_DEVFN(0, 0), |
344 | 3384f95c | David Gibson | SPAPR_PCI_NUM_LSI); |
345 | 3384f95c | David Gibson | |
346 | 3384f95c | David Gibson | spapr_rtas_register("read-pci-config", rtas_read_pci_config);
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347 | 3384f95c | David Gibson | spapr_rtas_register("write-pci-config", rtas_write_pci_config);
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348 | 3384f95c | David Gibson | spapr_rtas_register("ibm,read-pci-config", rtas_ibm_read_pci_config);
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349 | 3384f95c | David Gibson | spapr_rtas_register("ibm,write-pci-config", rtas_ibm_write_pci_config);
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350 | 3384f95c | David Gibson | |
351 | 3384f95c | David Gibson | QLIST_INSERT_HEAD(&spapr->phbs, phb, list); |
352 | 3384f95c | David Gibson | |
353 | 3384f95c | David Gibson | /* pci_bus_set_mem_base(bus, mem_va_start - SPAPR_PCI_MEM_BAR_START); */
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354 | 3384f95c | David Gibson | } |
355 | 3384f95c | David Gibson | |
356 | 3384f95c | David Gibson | /* Macros to operate with address in OF binding to PCI */
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357 | 3384f95c | David Gibson | #define b_x(x, p, l) (((x) & ((1<<(l))-1)) << (p)) |
358 | 3384f95c | David Gibson | #define b_n(x) b_x((x), 31, 1) /* 0 if relocatable */ |
359 | 3384f95c | David Gibson | #define b_p(x) b_x((x), 30, 1) /* 1 if prefetchable */ |
360 | 3384f95c | David Gibson | #define b_t(x) b_x((x), 29, 1) /* 1 if the address is aliased */ |
361 | 3384f95c | David Gibson | #define b_ss(x) b_x((x), 24, 2) /* the space code */ |
362 | 3384f95c | David Gibson | #define b_bbbbbbbb(x) b_x((x), 16, 8) /* bus number */ |
363 | 3384f95c | David Gibson | #define b_ddddd(x) b_x((x), 11, 5) /* device number */ |
364 | 3384f95c | David Gibson | #define b_fff(x) b_x((x), 8, 3) /* function number */ |
365 | 3384f95c | David Gibson | #define b_rrrrrrrr(x) b_x((x), 0, 8) /* register number */ |
366 | 3384f95c | David Gibson | |
367 | 3384f95c | David Gibson | int spapr_populate_pci_devices(sPAPRPHBState *phb,
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368 | 3384f95c | David Gibson | uint32_t xics_phandle, |
369 | 3384f95c | David Gibson | void *fdt)
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370 | 3384f95c | David Gibson | { |
371 | 3384f95c | David Gibson | PCIBus *bus = phb->host_state.bus; |
372 | 4d8d5467 | Benjamin Herrenschmidt | int bus_off, i;
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373 | 3384f95c | David Gibson | char nodename[256]; |
374 | 3384f95c | David Gibson | uint32_t bus_range[] = { cpu_to_be32(0), cpu_to_be32(0xff) }; |
375 | 3384f95c | David Gibson | struct {
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376 | 3384f95c | David Gibson | uint32_t hi; |
377 | 3384f95c | David Gibson | uint64_t child; |
378 | 3384f95c | David Gibson | uint64_t parent; |
379 | 3384f95c | David Gibson | uint64_t size; |
380 | 3384f95c | David Gibson | } __attribute__((packed)) ranges[] = { |
381 | 3384f95c | David Gibson | { |
382 | 3384f95c | David Gibson | cpu_to_be32(b_ss(1)), cpu_to_be64(0), |
383 | 3384f95c | David Gibson | cpu_to_be64(phb->io_win_addr), |
384 | 3384f95c | David Gibson | cpu_to_be64(memory_region_size(&phb->iospace)), |
385 | 3384f95c | David Gibson | }, |
386 | 3384f95c | David Gibson | { |
387 | 3384f95c | David Gibson | cpu_to_be32(b_ss(2)), cpu_to_be64(SPAPR_PCI_MEM_WIN_BUS_OFFSET),
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388 | 3384f95c | David Gibson | cpu_to_be64(phb->mem_win_addr), |
389 | 3384f95c | David Gibson | cpu_to_be64(memory_region_size(&phb->memwindow)), |
390 | 3384f95c | David Gibson | }, |
391 | 3384f95c | David Gibson | }; |
392 | 3384f95c | David Gibson | uint64_t bus_reg[] = { cpu_to_be64(phb->buid), 0 };
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393 | 3384f95c | David Gibson | uint32_t interrupt_map_mask[] = { |
394 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be32(b_ddddd(-1)|b_fff(0)), 0x0, 0x0, 0x0}; |
395 | 3384f95c | David Gibson | uint32_t interrupt_map[bus->nirq][7];
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396 | 3384f95c | David Gibson | |
397 | 3384f95c | David Gibson | /* Start populating the FDT */
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398 | 3384f95c | David Gibson | sprintf(nodename, "pci@%" PRIx64, phb->buid);
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399 | 3384f95c | David Gibson | bus_off = fdt_add_subnode(fdt, 0, nodename);
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400 | 3384f95c | David Gibson | if (bus_off < 0) { |
401 | 3384f95c | David Gibson | return bus_off;
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402 | 3384f95c | David Gibson | } |
403 | 3384f95c | David Gibson | |
404 | 3384f95c | David Gibson | #define _FDT(exp) \
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405 | 3384f95c | David Gibson | do { \
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406 | 3384f95c | David Gibson | int ret = (exp); \
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407 | 3384f95c | David Gibson | if (ret < 0) { \ |
408 | 3384f95c | David Gibson | return ret; \
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409 | 3384f95c | David Gibson | } \ |
410 | 3384f95c | David Gibson | } while (0) |
411 | 3384f95c | David Gibson | |
412 | 3384f95c | David Gibson | /* Write PHB properties */
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413 | 3384f95c | David Gibson | _FDT(fdt_setprop_string(fdt, bus_off, "device_type", "pci")); |
414 | 3384f95c | David Gibson | _FDT(fdt_setprop_string(fdt, bus_off, "compatible", "IBM,Logical_PHB")); |
415 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#address-cells", 0x3)); |
416 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#size-cells", 0x2)); |
417 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#interrupt-cells", 0x1)); |
418 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "used-by-rtas", NULL, 0)); |
419 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "bus-range", &bus_range, sizeof(bus_range))); |
420 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof(ranges))); |
421 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg))); |
422 | 3f7565c9 | Benjamin Herrenschmidt | _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1)); |
423 | 3384f95c | David Gibson | |
424 | 4d8d5467 | Benjamin Herrenschmidt | /* Build the interrupt-map, this must matches what is done
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425 | 4d8d5467 | Benjamin Herrenschmidt | * in pci_spapr_map_irq
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426 | 4d8d5467 | Benjamin Herrenschmidt | */
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427 | 4d8d5467 | Benjamin Herrenschmidt | _FDT(fdt_setprop(fdt, bus_off, "interrupt-map-mask",
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428 | 4d8d5467 | Benjamin Herrenschmidt | &interrupt_map_mask, sizeof(interrupt_map_mask)));
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429 | 4d8d5467 | Benjamin Herrenschmidt | for (i = 0; i < 7; i++) { |
430 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t *irqmap = interrupt_map[i]; |
431 | 4d8d5467 | Benjamin Herrenschmidt | irqmap[0] = cpu_to_be32(b_ddddd(i)|b_fff(0)); |
432 | 3384f95c | David Gibson | irqmap[1] = 0; |
433 | 3384f95c | David Gibson | irqmap[2] = 0; |
434 | 3384f95c | David Gibson | irqmap[3] = 0; |
435 | 3384f95c | David Gibson | irqmap[4] = cpu_to_be32(xics_phandle);
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436 | 4d8d5467 | Benjamin Herrenschmidt | irqmap[5] = cpu_to_be32(phb->lsi_table[i % SPAPR_PCI_NUM_LSI].dt_irq);
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437 | 3384f95c | David Gibson | irqmap[6] = cpu_to_be32(0x8); |
438 | 3384f95c | David Gibson | } |
439 | 3384f95c | David Gibson | /* Write interrupt map */
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440 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "interrupt-map", &interrupt_map,
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441 | 4d8d5467 | Benjamin Herrenschmidt | 7 * sizeof(interrupt_map[0]))); |
442 | 3384f95c | David Gibson | |
443 | 3384f95c | David Gibson | return 0; |
444 | 3384f95c | David Gibson | } |