root / pc-bios / mpc8544ds.dts @ 0e326109
History | View | Annotate | Download (2.7 kB)
1 |
/* |
---|---|
2 |
* MPC8544 DS Device Tree Source |
3 |
* |
4 |
* Copyright 2007, 2008 Freescale Semiconductor Inc. |
5 |
* |
6 |
* This program is free software; you can redistribute it and/or modify it |
7 |
* under the terms of the GNU General Public License as published by the |
8 |
* Free Software Foundation; either version 2 of the License, or (at your |
9 |
* option) any later version. |
10 |
*/ |
11 |
|
12 |
/dts-v1/; |
13 |
/ { |
14 |
model = "MPC8544DS"; |
15 |
compatible = "MPC8544DS", "MPC85xxDS"; |
16 |
#address-cells = <1>; |
17 |
#size-cells = <1>; |
18 |
|
19 |
aliases { |
20 |
serial0 = &serial0; |
21 |
serial1 = &serial1; |
22 |
pci0 = &pci0; |
23 |
}; |
24 |
|
25 |
cpus { |
26 |
#address-cells = <1>; |
27 |
#size-cells = <0>; |
28 |
|
29 |
PowerPC,8544@0 { |
30 |
device_type = "cpu"; |
31 |
reg = <0x0>; |
32 |
d-cache-line-size = <32>; // 32 bytes |
33 |
i-cache-line-size = <32>; // 32 bytes |
34 |
d-cache-size = <0x8000>; // L1, 32K |
35 |
i-cache-size = <0x8000>; // L1, 32K |
36 |
timebase-frequency = <0>; |
37 |
bus-frequency = <0>; |
38 |
clock-frequency = <0>; |
39 |
}; |
40 |
}; |
41 |
|
42 |
memory { |
43 |
device_type = "memory"; |
44 |
reg = <0x0 0x0>; // Filled by U-Boot |
45 |
}; |
46 |
|
47 |
soc8544@e0000000 { |
48 |
#address-cells = <1>; |
49 |
#size-cells = <1>; |
50 |
device_type = "soc"; |
51 |
compatible = "simple-bus"; |
52 |
|
53 |
ranges = <0x0 0xe0000000 0x100000>; |
54 |
reg = <0xe0000000 0x1000>; // CCSRBAR 1M |
55 |
bus-frequency = <0>; // Filled out by uboot. |
56 |
|
57 |
serial0: serial@4500 { |
58 |
cell-index = <0>; |
59 |
device_type = "serial"; |
60 |
compatible = "ns16550"; |
61 |
reg = <0x4500 0x100>; |
62 |
clock-frequency = <0>; |
63 |
interrupts = <42 2>; |
64 |
interrupt-parent = <&mpic>; |
65 |
}; |
66 |
|
67 |
serial1: serial@4600 { |
68 |
cell-index = <1>; |
69 |
device_type = "serial"; |
70 |
compatible = "ns16550"; |
71 |
reg = <0x4600 0x100>; |
72 |
clock-frequency = <0>; |
73 |
interrupts = <42 2>; |
74 |
interrupt-parent = <&mpic>; |
75 |
}; |
76 |
|
77 |
mpic: pic@40000 { |
78 |
interrupt-controller; |
79 |
#address-cells = <0>; |
80 |
#interrupt-cells = <2>; |
81 |
reg = <0x40000 0x40000>; |
82 |
compatible = "chrp,open-pic"; |
83 |
device_type = "open-pic"; |
84 |
}; |
85 |
}; |
86 |
|
87 |
pci0: pci@e0008000 { |
88 |
cell-index = <0>; |
89 |
compatible = "fsl,mpc8540-pci"; |
90 |
device_type = "pci"; |
91 |
interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
92 |
interrupt-map = < |
93 |
|
94 |
/* IDSEL 0x11 J17 Slot 1 */ |
95 |
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 |
96 |
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 |
97 |
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 |
98 |
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 |
99 |
|
100 |
/* IDSEL 0x12 J16 Slot 2 */ |
101 |
|
102 |
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 |
103 |
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 |
104 |
0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 |
105 |
0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>; |
106 |
|
107 |
interrupt-parent = <&mpic>; |
108 |
interrupts = <24 2>; |
109 |
bus-range = <0 255>; |
110 |
ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 |
111 |
0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>; |
112 |
clock-frequency = <66666666>; |
113 |
#interrupt-cells = <1>; |
114 |
#size-cells = <2>; |
115 |
#address-cells = <3>; |
116 |
reg = <0xe0008000 0x1000>; |
117 |
}; |
118 |
|
119 |
chosen { |
120 |
linux,stdout-path = "/soc8544@e0000000/serial@4500"; |
121 |
}; |
122 |
}; |