Revision 0ecf89aa hw/i8259.c

b/hw/i8259.c
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    } else {
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        s->isr |= (1 << irq);
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    }
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    s->irr &= ~(1 << irq);
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    /* We don't clear a level sensitive interrupt here */
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    if (!(s->elcr & (1 << irq)))
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        s->irr &= ~(1 << irq);
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}
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int cpu_get_pic_interrupt(CPUState *env)


  		












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