root / target-cris / machine.c @ 10c144e2
History | View | Annotate | Download (2.4 kB)
1 | 8dd3dca3 | aurel32 | #include "hw/hw.h" |
---|---|---|---|
2 | 8dd3dca3 | aurel32 | #include "hw/boards.h" |
3 | 8dd3dca3 | aurel32 | |
4 | 8dd3dca3 | aurel32 | void register_machines(void) |
5 | 8dd3dca3 | aurel32 | { |
6 | 8dd3dca3 | aurel32 | qemu_register_machine(&bareetraxfs_machine); |
7 | 10c144e2 | edgar_igl | qemu_register_machine(&axisdev88_machine); |
8 | 8dd3dca3 | aurel32 | } |
9 | 877d8ad7 | edgar_igl | |
10 | 877d8ad7 | edgar_igl | void cpu_save(QEMUFile *f, void *opaque) |
11 | 877d8ad7 | edgar_igl | { |
12 | 877d8ad7 | edgar_igl | CPUCRISState *env = opaque; |
13 | 877d8ad7 | edgar_igl | int i;
|
14 | 877d8ad7 | edgar_igl | int s;
|
15 | 877d8ad7 | edgar_igl | int mmu;
|
16 | 877d8ad7 | edgar_igl | |
17 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
18 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->regs[i]); |
19 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
20 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->pregs[i]); |
21 | 877d8ad7 | edgar_igl | |
22 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->pc); |
23 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->ksp); |
24 | 877d8ad7 | edgar_igl | |
25 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->dslot); |
26 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->btaken); |
27 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->btarget); |
28 | 877d8ad7 | edgar_igl | |
29 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_op); |
30 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_mask); |
31 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_dest); |
32 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_src); |
33 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_result); |
34 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_size); |
35 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_x); |
36 | 877d8ad7 | edgar_igl | |
37 | 877d8ad7 | edgar_igl | for (s = 0; s < 4; i++) { |
38 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
39 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->sregs[s][i]); |
40 | 877d8ad7 | edgar_igl | } |
41 | 877d8ad7 | edgar_igl | |
42 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->mmu_rand_lfsr); |
43 | 877d8ad7 | edgar_igl | for (mmu = 0; mmu < 2; mmu++) { |
44 | 877d8ad7 | edgar_igl | for (s = 0; s < 4; i++) { |
45 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) { |
46 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->tlbsets[mmu][s][i].lo); |
47 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->tlbsets[mmu][s][i].hi); |
48 | 877d8ad7 | edgar_igl | } |
49 | 877d8ad7 | edgar_igl | } |
50 | 877d8ad7 | edgar_igl | } |
51 | 877d8ad7 | edgar_igl | } |
52 | 877d8ad7 | edgar_igl | |
53 | 877d8ad7 | edgar_igl | int cpu_load(QEMUFile *f, void *opaque, int version_id) |
54 | 877d8ad7 | edgar_igl | { |
55 | 877d8ad7 | edgar_igl | CPUCRISState *env = opaque; |
56 | 877d8ad7 | edgar_igl | int i;
|
57 | 877d8ad7 | edgar_igl | int s;
|
58 | 877d8ad7 | edgar_igl | int mmu;
|
59 | 877d8ad7 | edgar_igl | |
60 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
61 | 877d8ad7 | edgar_igl | env->regs[i] = qemu_get_be32(f); |
62 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
63 | 877d8ad7 | edgar_igl | env->pregs[i] = qemu_get_be32(f); |
64 | 877d8ad7 | edgar_igl | |
65 | 877d8ad7 | edgar_igl | env->pc = qemu_get_be32(f); |
66 | 877d8ad7 | edgar_igl | env->ksp = qemu_get_be32(f); |
67 | 877d8ad7 | edgar_igl | |
68 | 877d8ad7 | edgar_igl | env->dslot = qemu_get_be32(f); |
69 | 877d8ad7 | edgar_igl | env->btaken = qemu_get_be32(f); |
70 | 877d8ad7 | edgar_igl | env->btarget = qemu_get_be32(f); |
71 | 877d8ad7 | edgar_igl | |
72 | 877d8ad7 | edgar_igl | env->cc_op = qemu_get_be32(f); |
73 | 877d8ad7 | edgar_igl | env->cc_mask = qemu_get_be32(f); |
74 | 877d8ad7 | edgar_igl | env->cc_dest = qemu_get_be32(f); |
75 | 877d8ad7 | edgar_igl | env->cc_src = qemu_get_be32(f); |
76 | 877d8ad7 | edgar_igl | env->cc_result = qemu_get_be32(f); |
77 | 877d8ad7 | edgar_igl | env->cc_size = qemu_get_be32(f); |
78 | 877d8ad7 | edgar_igl | env->cc_x = qemu_get_be32(f); |
79 | 877d8ad7 | edgar_igl | |
80 | 877d8ad7 | edgar_igl | for (s = 0; s < 4; i++) { |
81 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
82 | 877d8ad7 | edgar_igl | env->sregs[s][i] = qemu_get_be32(f); |
83 | 877d8ad7 | edgar_igl | } |
84 | 877d8ad7 | edgar_igl | |
85 | 877d8ad7 | edgar_igl | env->mmu_rand_lfsr = qemu_get_be32(f); |
86 | 877d8ad7 | edgar_igl | for (mmu = 0; mmu < 2; mmu++) { |
87 | 877d8ad7 | edgar_igl | for (s = 0; s < 4; i++) { |
88 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) { |
89 | 877d8ad7 | edgar_igl | env->tlbsets[mmu][s][i].lo = qemu_get_be32(f); |
90 | 877d8ad7 | edgar_igl | env->tlbsets[mmu][s][i].hi = qemu_get_be32(f); |
91 | 877d8ad7 | edgar_igl | } |
92 | 877d8ad7 | edgar_igl | } |
93 | 877d8ad7 | edgar_igl | } |
94 | 877d8ad7 | edgar_igl | |
95 | 877d8ad7 | edgar_igl | return 0; |
96 | 877d8ad7 | edgar_igl | } |