root / hw / ppc405_boards.c @ 11257187
History | View | Annotate | Download (19.8 kB)
1 | 1a6c0886 | j_mayer | /*
|
---|---|---|---|
2 | 1a6c0886 | j_mayer | * QEMU PowerPC 405 evaluation boards emulation
|
3 | 5fafdf24 | ths | *
|
4 | 1a6c0886 | j_mayer | * Copyright (c) 2007 Jocelyn Mayer
|
5 | 5fafdf24 | ths | *
|
6 | 1a6c0886 | j_mayer | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 1a6c0886 | j_mayer | * of this software and associated documentation files (the "Software"), to deal
|
8 | 1a6c0886 | j_mayer | * in the Software without restriction, including without limitation the rights
|
9 | 1a6c0886 | j_mayer | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 1a6c0886 | j_mayer | * copies of the Software, and to permit persons to whom the Software is
|
11 | 1a6c0886 | j_mayer | * furnished to do so, subject to the following conditions:
|
12 | 1a6c0886 | j_mayer | *
|
13 | 1a6c0886 | j_mayer | * The above copyright notice and this permission notice shall be included in
|
14 | 1a6c0886 | j_mayer | * all copies or substantial portions of the Software.
|
15 | 1a6c0886 | j_mayer | *
|
16 | 1a6c0886 | j_mayer | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 1a6c0886 | j_mayer | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 1a6c0886 | j_mayer | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 1a6c0886 | j_mayer | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 1a6c0886 | j_mayer | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 1a6c0886 | j_mayer | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 1a6c0886 | j_mayer | * THE SOFTWARE.
|
23 | 1a6c0886 | j_mayer | */
|
24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "ppc.h" |
26 | 1a6c0886 | j_mayer | #include "ppc405.h" |
27 | 87ecb68b | pbrook | #include "nvram.h" |
28 | 87ecb68b | pbrook | #include "flash.h" |
29 | 87ecb68b | pbrook | #include "sysemu.h" |
30 | 87ecb68b | pbrook | #include "block.h" |
31 | 87ecb68b | pbrook | #include "boards.h" |
32 | 3b3fb322 | blueswir1 | #include "qemu-log.h" |
33 | ca20cf32 | Blue Swirl | #include "loader.h" |
34 | 2446333c | Blue Swirl | #include "blockdev.h" |
35 | 1a6c0886 | j_mayer | |
36 | 1a6c0886 | j_mayer | #define BIOS_FILENAME "ppc405_rom.bin" |
37 | 1a6c0886 | j_mayer | #define BIOS_SIZE (2048 * 1024) |
38 | 1a6c0886 | j_mayer | |
39 | 1a6c0886 | j_mayer | #define KERNEL_LOAD_ADDR 0x00000000 |
40 | 1a6c0886 | j_mayer | #define INITRD_LOAD_ADDR 0x01800000 |
41 | 1a6c0886 | j_mayer | |
42 | 1a6c0886 | j_mayer | #define USE_FLASH_BIOS
|
43 | 1a6c0886 | j_mayer | |
44 | 1a6c0886 | j_mayer | #define DEBUG_BOARD_INIT
|
45 | 1a6c0886 | j_mayer | |
46 | 1a6c0886 | j_mayer | /*****************************************************************************/
|
47 | 1a6c0886 | j_mayer | /* PPC405EP reference board (IBM) */
|
48 | 1a6c0886 | j_mayer | /* Standalone board with:
|
49 | 1a6c0886 | j_mayer | * - PowerPC 405EP CPU
|
50 | 1a6c0886 | j_mayer | * - SDRAM (0x00000000)
|
51 | 1a6c0886 | j_mayer | * - Flash (0xFFF80000)
|
52 | 1a6c0886 | j_mayer | * - SRAM (0xFFF00000)
|
53 | 1a6c0886 | j_mayer | * - NVRAM (0xF0000000)
|
54 | 1a6c0886 | j_mayer | * - FPGA (0xF0300000)
|
55 | 1a6c0886 | j_mayer | */
|
56 | c227f099 | Anthony Liguori | typedef struct ref405ep_fpga_t ref405ep_fpga_t; |
57 | c227f099 | Anthony Liguori | struct ref405ep_fpga_t {
|
58 | 1a6c0886 | j_mayer | uint8_t reg0; |
59 | 1a6c0886 | j_mayer | uint8_t reg1; |
60 | 1a6c0886 | j_mayer | }; |
61 | 1a6c0886 | j_mayer | |
62 | c227f099 | Anthony Liguori | static uint32_t ref405ep_fpga_readb (void *opaque, target_phys_addr_t addr) |
63 | 1a6c0886 | j_mayer | { |
64 | c227f099 | Anthony Liguori | ref405ep_fpga_t *fpga; |
65 | 1a6c0886 | j_mayer | uint32_t ret; |
66 | 1a6c0886 | j_mayer | |
67 | 1a6c0886 | j_mayer | fpga = opaque; |
68 | 1a6c0886 | j_mayer | switch (addr) {
|
69 | 1a6c0886 | j_mayer | case 0x0: |
70 | 1a6c0886 | j_mayer | ret = fpga->reg0; |
71 | 1a6c0886 | j_mayer | break;
|
72 | 1a6c0886 | j_mayer | case 0x1: |
73 | 1a6c0886 | j_mayer | ret = fpga->reg1; |
74 | 1a6c0886 | j_mayer | break;
|
75 | 1a6c0886 | j_mayer | default:
|
76 | 1a6c0886 | j_mayer | ret = 0;
|
77 | 1a6c0886 | j_mayer | break;
|
78 | 1a6c0886 | j_mayer | } |
79 | 1a6c0886 | j_mayer | |
80 | 1a6c0886 | j_mayer | return ret;
|
81 | 1a6c0886 | j_mayer | } |
82 | 1a6c0886 | j_mayer | |
83 | 1a6c0886 | j_mayer | static void ref405ep_fpga_writeb (void *opaque, |
84 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
85 | 1a6c0886 | j_mayer | { |
86 | c227f099 | Anthony Liguori | ref405ep_fpga_t *fpga; |
87 | 1a6c0886 | j_mayer | |
88 | 1a6c0886 | j_mayer | fpga = opaque; |
89 | 1a6c0886 | j_mayer | switch (addr) {
|
90 | 1a6c0886 | j_mayer | case 0x0: |
91 | 1a6c0886 | j_mayer | /* Read only */
|
92 | 1a6c0886 | j_mayer | break;
|
93 | 1a6c0886 | j_mayer | case 0x1: |
94 | 1a6c0886 | j_mayer | fpga->reg1 = value; |
95 | 1a6c0886 | j_mayer | break;
|
96 | 1a6c0886 | j_mayer | default:
|
97 | 1a6c0886 | j_mayer | break;
|
98 | 1a6c0886 | j_mayer | } |
99 | 1a6c0886 | j_mayer | } |
100 | 1a6c0886 | j_mayer | |
101 | c227f099 | Anthony Liguori | static uint32_t ref405ep_fpga_readw (void *opaque, target_phys_addr_t addr) |
102 | 1a6c0886 | j_mayer | { |
103 | 1a6c0886 | j_mayer | uint32_t ret; |
104 | 1a6c0886 | j_mayer | |
105 | 1a6c0886 | j_mayer | ret = ref405ep_fpga_readb(opaque, addr) << 8;
|
106 | 1a6c0886 | j_mayer | ret |= ref405ep_fpga_readb(opaque, addr + 1);
|
107 | 1a6c0886 | j_mayer | |
108 | 1a6c0886 | j_mayer | return ret;
|
109 | 1a6c0886 | j_mayer | } |
110 | 1a6c0886 | j_mayer | |
111 | 1a6c0886 | j_mayer | static void ref405ep_fpga_writew (void *opaque, |
112 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
113 | 1a6c0886 | j_mayer | { |
114 | 1a6c0886 | j_mayer | ref405ep_fpga_writeb(opaque, addr, (value >> 8) & 0xFF); |
115 | 1a6c0886 | j_mayer | ref405ep_fpga_writeb(opaque, addr + 1, value & 0xFF); |
116 | 1a6c0886 | j_mayer | } |
117 | 1a6c0886 | j_mayer | |
118 | c227f099 | Anthony Liguori | static uint32_t ref405ep_fpga_readl (void *opaque, target_phys_addr_t addr) |
119 | 1a6c0886 | j_mayer | { |
120 | 1a6c0886 | j_mayer | uint32_t ret; |
121 | 1a6c0886 | j_mayer | |
122 | 1a6c0886 | j_mayer | ret = ref405ep_fpga_readb(opaque, addr) << 24;
|
123 | 1a6c0886 | j_mayer | ret |= ref405ep_fpga_readb(opaque, addr + 1) << 16; |
124 | 1a6c0886 | j_mayer | ret |= ref405ep_fpga_readb(opaque, addr + 2) << 8; |
125 | 1a6c0886 | j_mayer | ret |= ref405ep_fpga_readb(opaque, addr + 3);
|
126 | 1a6c0886 | j_mayer | |
127 | 1a6c0886 | j_mayer | return ret;
|
128 | 1a6c0886 | j_mayer | } |
129 | 1a6c0886 | j_mayer | |
130 | 1a6c0886 | j_mayer | static void ref405ep_fpga_writel (void *opaque, |
131 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
132 | 1a6c0886 | j_mayer | { |
133 | 8de24106 | aurel32 | ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF); |
134 | 8de24106 | aurel32 | ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF); |
135 | 8de24106 | aurel32 | ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF); |
136 | 1a6c0886 | j_mayer | ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF); |
137 | 1a6c0886 | j_mayer | } |
138 | 1a6c0886 | j_mayer | |
139 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const ref405ep_fpga_read[] = { |
140 | 1a6c0886 | j_mayer | &ref405ep_fpga_readb, |
141 | 1a6c0886 | j_mayer | &ref405ep_fpga_readw, |
142 | 1a6c0886 | j_mayer | &ref405ep_fpga_readl, |
143 | 1a6c0886 | j_mayer | }; |
144 | 1a6c0886 | j_mayer | |
145 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const ref405ep_fpga_write[] = { |
146 | 1a6c0886 | j_mayer | &ref405ep_fpga_writeb, |
147 | 1a6c0886 | j_mayer | &ref405ep_fpga_writew, |
148 | 1a6c0886 | j_mayer | &ref405ep_fpga_writel, |
149 | 1a6c0886 | j_mayer | }; |
150 | 1a6c0886 | j_mayer | |
151 | 1a6c0886 | j_mayer | static void ref405ep_fpga_reset (void *opaque) |
152 | 1a6c0886 | j_mayer | { |
153 | c227f099 | Anthony Liguori | ref405ep_fpga_t *fpga; |
154 | 1a6c0886 | j_mayer | |
155 | 1a6c0886 | j_mayer | fpga = opaque; |
156 | 1a6c0886 | j_mayer | fpga->reg0 = 0x00;
|
157 | 1a6c0886 | j_mayer | fpga->reg1 = 0x0F;
|
158 | 1a6c0886 | j_mayer | } |
159 | 1a6c0886 | j_mayer | |
160 | 1a6c0886 | j_mayer | static void ref405ep_fpga_init (uint32_t base) |
161 | 1a6c0886 | j_mayer | { |
162 | c227f099 | Anthony Liguori | ref405ep_fpga_t *fpga; |
163 | 1a6c0886 | j_mayer | int fpga_memory;
|
164 | 1a6c0886 | j_mayer | |
165 | c227f099 | Anthony Liguori | fpga = qemu_mallocz(sizeof(ref405ep_fpga_t));
|
166 | 1eed09cb | Avi Kivity | fpga_memory = cpu_register_io_memory(ref405ep_fpga_read, |
167 | 2507c12a | Alexander Graf | ref405ep_fpga_write, fpga, |
168 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
169 | 487414f1 | aliguori | cpu_register_physical_memory(base, 0x00000100, fpga_memory);
|
170 | a08d4367 | Jan Kiszka | qemu_register_reset(&ref405ep_fpga_reset, fpga); |
171 | 1a6c0886 | j_mayer | } |
172 | 1a6c0886 | j_mayer | |
173 | c227f099 | Anthony Liguori | static void ref405ep_init (ram_addr_t ram_size, |
174 | 3023f332 | aliguori | const char *boot_device, |
175 | 5fafdf24 | ths | const char *kernel_filename, |
176 | 1a6c0886 | j_mayer | const char *kernel_cmdline, |
177 | 1a6c0886 | j_mayer | const char *initrd_filename, |
178 | 1a6c0886 | j_mayer | const char *cpu_model) |
179 | 1a6c0886 | j_mayer | { |
180 | 5cea8590 | Paul Brook | char *filename;
|
181 | c227f099 | Anthony Liguori | ppc4xx_bd_info_t bd; |
182 | 1a6c0886 | j_mayer | CPUPPCState *env; |
183 | 1a6c0886 | j_mayer | qemu_irq *pic; |
184 | c227f099 | Anthony Liguori | ram_addr_t sram_offset, bios_offset, bdloc; |
185 | c227f099 | Anthony Liguori | target_phys_addr_t ram_bases[2], ram_sizes[2]; |
186 | 093209cd | Blue Swirl | target_ulong sram_size; |
187 | 093209cd | Blue Swirl | long bios_size;
|
188 | 1a6c0886 | j_mayer | //int phy_addr = 0;
|
189 | 1a6c0886 | j_mayer | //static int phy_addr = 1;
|
190 | 093209cd | Blue Swirl | target_ulong kernel_base, initrd_base; |
191 | 093209cd | Blue Swirl | long kernel_size, initrd_size;
|
192 | 1a6c0886 | j_mayer | int linux_boot;
|
193 | 1a6c0886 | j_mayer | int fl_idx, fl_sectors, len;
|
194 | 751c6a17 | Gerd Hoffmann | DriveInfo *dinfo; |
195 | 1a6c0886 | j_mayer | |
196 | 1a6c0886 | j_mayer | /* XXX: fix this */
|
197 | 1724f049 | Alex Williamson | ram_bases[0] = qemu_ram_alloc(NULL, "ef405ep.ram", 0x08000000); |
198 | 1a6c0886 | j_mayer | ram_sizes[0] = 0x08000000; |
199 | 1a6c0886 | j_mayer | ram_bases[1] = 0x00000000; |
200 | 1a6c0886 | j_mayer | ram_sizes[1] = 0x00000000; |
201 | 1a6c0886 | j_mayer | ram_size = 128 * 1024 * 1024; |
202 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
203 | 1a6c0886 | j_mayer | printf("%s: register cpu\n", __func__);
|
204 | 1a6c0886 | j_mayer | #endif
|
205 | 5c130f65 | pbrook | env = ppc405ep_init(ram_bases, ram_sizes, 33333333, &pic,
|
206 | 1a6c0886 | j_mayer | kernel_filename == NULL ? 0 : 1); |
207 | 1a6c0886 | j_mayer | /* allocate SRAM */
|
208 | 5c130f65 | pbrook | sram_size = 512 * 1024; |
209 | 1724f049 | Alex Williamson | sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size); |
210 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
211 | 1a6c0886 | j_mayer | printf("%s: register SRAM at offset %08lx\n", __func__, sram_offset);
|
212 | 1a6c0886 | j_mayer | #endif
|
213 | 1a6c0886 | j_mayer | cpu_register_physical_memory(0xFFF00000, sram_size,
|
214 | 1a6c0886 | j_mayer | sram_offset | IO_MEM_RAM); |
215 | 1a6c0886 | j_mayer | /* allocate and load BIOS */
|
216 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
217 | 1a6c0886 | j_mayer | printf("%s: register BIOS\n", __func__);
|
218 | 1a6c0886 | j_mayer | #endif
|
219 | 1a6c0886 | j_mayer | fl_idx = 0;
|
220 | 1a6c0886 | j_mayer | #ifdef USE_FLASH_BIOS
|
221 | 751c6a17 | Gerd Hoffmann | dinfo = drive_get(IF_PFLASH, 0, fl_idx);
|
222 | 751c6a17 | Gerd Hoffmann | if (dinfo) {
|
223 | 751c6a17 | Gerd Hoffmann | bios_size = bdrv_getlength(dinfo->bdrv); |
224 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", bios_size); |
225 | 1a6c0886 | j_mayer | fl_sectors = (bios_size + 65535) >> 16; |
226 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
227 | 093209cd | Blue Swirl | printf("Register parallel flash %d size %lx"
|
228 | 093209cd | Blue Swirl | " at offset %08lx addr %lx '%s' %d\n",
|
229 | 1a6c0886 | j_mayer | fl_idx, bios_size, bios_offset, -bios_size, |
230 | 751c6a17 | Gerd Hoffmann | bdrv_get_device_name(dinfo->bdrv), fl_sectors); |
231 | 1a6c0886 | j_mayer | #endif
|
232 | 88eeee0a | balrog | pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, |
233 | 751c6a17 | Gerd Hoffmann | dinfo->bdrv, 65536, fl_sectors, 1, |
234 | 5f9fc5ad | Blue Swirl | 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
235 | 5f9fc5ad | Blue Swirl | 1);
|
236 | 1a6c0886 | j_mayer | fl_idx++; |
237 | 1a6c0886 | j_mayer | } else
|
238 | 1a6c0886 | j_mayer | #endif
|
239 | 1a6c0886 | j_mayer | { |
240 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
241 | 1a6c0886 | j_mayer | printf("Load BIOS from file\n");
|
242 | 1a6c0886 | j_mayer | #endif
|
243 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", BIOS_SIZE); |
244 | 1192dad8 | j_mayer | if (bios_name == NULL) |
245 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
246 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
247 | 5cea8590 | Paul Brook | if (filename) {
|
248 | 5cea8590 | Paul Brook | bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
249 | 5cea8590 | Paul Brook | qemu_free(filename); |
250 | 5cea8590 | Paul Brook | } else {
|
251 | 5cea8590 | Paul Brook | bios_size = -1;
|
252 | 5cea8590 | Paul Brook | } |
253 | 1a6c0886 | j_mayer | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
254 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n",
|
255 | 5cea8590 | Paul Brook | bios_name); |
256 | 1a6c0886 | j_mayer | exit(1);
|
257 | 1a6c0886 | j_mayer | } |
258 | 1a6c0886 | j_mayer | bios_size = (bios_size + 0xfff) & ~0xfff; |
259 | 5fafdf24 | ths | cpu_register_physical_memory((uint32_t)(-bios_size), |
260 | 1a6c0886 | j_mayer | bios_size, bios_offset | IO_MEM_ROM); |
261 | 1a6c0886 | j_mayer | } |
262 | 1a6c0886 | j_mayer | /* Register FPGA */
|
263 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
264 | 1a6c0886 | j_mayer | printf("%s: register FPGA\n", __func__);
|
265 | 1a6c0886 | j_mayer | #endif
|
266 | 1a6c0886 | j_mayer | ref405ep_fpga_init(0xF0300000);
|
267 | 1a6c0886 | j_mayer | /* Register NVRAM */
|
268 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
269 | 1a6c0886 | j_mayer | printf("%s: register NVRAM\n", __func__);
|
270 | 1a6c0886 | j_mayer | #endif
|
271 | 1a6c0886 | j_mayer | m48t59_init(NULL, 0xF0000000, 0, 8192, 8); |
272 | 1a6c0886 | j_mayer | /* Load kernel */
|
273 | 1a6c0886 | j_mayer | linux_boot = (kernel_filename != NULL);
|
274 | 1a6c0886 | j_mayer | if (linux_boot) {
|
275 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
276 | 1a6c0886 | j_mayer | printf("%s: load kernel\n", __func__);
|
277 | 1a6c0886 | j_mayer | #endif
|
278 | 1a6c0886 | j_mayer | memset(&bd, 0, sizeof(bd)); |
279 | 1a6c0886 | j_mayer | bd.bi_memstart = 0x00000000;
|
280 | 1a6c0886 | j_mayer | bd.bi_memsize = ram_size; |
281 | 217fae2d | j_mayer | bd.bi_flashstart = -bios_size; |
282 | 1a6c0886 | j_mayer | bd.bi_flashsize = -bios_size; |
283 | 1a6c0886 | j_mayer | bd.bi_flashoffset = 0;
|
284 | 1a6c0886 | j_mayer | bd.bi_sramstart = 0xFFF00000;
|
285 | 1a6c0886 | j_mayer | bd.bi_sramsize = sram_size; |
286 | 1a6c0886 | j_mayer | bd.bi_bootflags = 0;
|
287 | 1a6c0886 | j_mayer | bd.bi_intfreq = 133333333;
|
288 | 1a6c0886 | j_mayer | bd.bi_busfreq = 33333333;
|
289 | 1a6c0886 | j_mayer | bd.bi_baudrate = 115200;
|
290 | 1a6c0886 | j_mayer | bd.bi_s_version[0] = 'Q'; |
291 | 1a6c0886 | j_mayer | bd.bi_s_version[1] = 'M'; |
292 | 1a6c0886 | j_mayer | bd.bi_s_version[2] = 'U'; |
293 | 1a6c0886 | j_mayer | bd.bi_s_version[3] = '\0'; |
294 | 1a6c0886 | j_mayer | bd.bi_r_version[0] = 'Q'; |
295 | 1a6c0886 | j_mayer | bd.bi_r_version[1] = 'E'; |
296 | 1a6c0886 | j_mayer | bd.bi_r_version[2] = 'M'; |
297 | 1a6c0886 | j_mayer | bd.bi_r_version[3] = 'U'; |
298 | 1a6c0886 | j_mayer | bd.bi_r_version[4] = '\0'; |
299 | 1a6c0886 | j_mayer | bd.bi_procfreq = 133333333;
|
300 | 1a6c0886 | j_mayer | bd.bi_plb_busfreq = 33333333;
|
301 | 1a6c0886 | j_mayer | bd.bi_pci_busfreq = 33333333;
|
302 | 1a6c0886 | j_mayer | bd.bi_opbfreq = 33333333;
|
303 | b8d3f5d1 | j_mayer | bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001);
|
304 | 1a6c0886 | j_mayer | env->gpr[3] = bdloc;
|
305 | 1a6c0886 | j_mayer | kernel_base = KERNEL_LOAD_ADDR; |
306 | 1a6c0886 | j_mayer | /* now we can load the kernel */
|
307 | 5c130f65 | pbrook | kernel_size = load_image_targphys(kernel_filename, kernel_base, |
308 | 5c130f65 | pbrook | ram_size - kernel_base); |
309 | 1a6c0886 | j_mayer | if (kernel_size < 0) { |
310 | 5fafdf24 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
311 | 1a6c0886 | j_mayer | kernel_filename); |
312 | 1a6c0886 | j_mayer | exit(1);
|
313 | 1a6c0886 | j_mayer | } |
314 | 093209cd | Blue Swirl | printf("Load kernel size %ld at " TARGET_FMT_lx,
|
315 | 5c130f65 | pbrook | kernel_size, kernel_base); |
316 | 1a6c0886 | j_mayer | /* load initrd */
|
317 | 1a6c0886 | j_mayer | if (initrd_filename) {
|
318 | 1a6c0886 | j_mayer | initrd_base = INITRD_LOAD_ADDR; |
319 | 5c130f65 | pbrook | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
320 | 5c130f65 | pbrook | ram_size - initrd_base); |
321 | 1a6c0886 | j_mayer | if (initrd_size < 0) { |
322 | 5fafdf24 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
323 | 1a6c0886 | j_mayer | initrd_filename); |
324 | 1a6c0886 | j_mayer | exit(1);
|
325 | 1a6c0886 | j_mayer | } |
326 | 1a6c0886 | j_mayer | } else {
|
327 | 1a6c0886 | j_mayer | initrd_base = 0;
|
328 | 1a6c0886 | j_mayer | initrd_size = 0;
|
329 | 1a6c0886 | j_mayer | } |
330 | 1a6c0886 | j_mayer | env->gpr[4] = initrd_base;
|
331 | 1a6c0886 | j_mayer | env->gpr[5] = initrd_size;
|
332 | 1a6c0886 | j_mayer | if (kernel_cmdline != NULL) { |
333 | 1a6c0886 | j_mayer | len = strlen(kernel_cmdline); |
334 | 1a6c0886 | j_mayer | bdloc -= ((len + 255) & ~255); |
335 | 5c130f65 | pbrook | cpu_physical_memory_write(bdloc, (void *)kernel_cmdline, len + 1); |
336 | 1a6c0886 | j_mayer | env->gpr[6] = bdloc;
|
337 | 1a6c0886 | j_mayer | env->gpr[7] = bdloc + len;
|
338 | 1a6c0886 | j_mayer | } else {
|
339 | 1a6c0886 | j_mayer | env->gpr[6] = 0; |
340 | 1a6c0886 | j_mayer | env->gpr[7] = 0; |
341 | 1a6c0886 | j_mayer | } |
342 | 1a6c0886 | j_mayer | env->nip = KERNEL_LOAD_ADDR; |
343 | 1a6c0886 | j_mayer | } else {
|
344 | 1a6c0886 | j_mayer | kernel_base = 0;
|
345 | 1a6c0886 | j_mayer | kernel_size = 0;
|
346 | 1a6c0886 | j_mayer | initrd_base = 0;
|
347 | 1a6c0886 | j_mayer | initrd_size = 0;
|
348 | 1a6c0886 | j_mayer | bdloc = 0;
|
349 | 1a6c0886 | j_mayer | } |
350 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
351 | 1a6c0886 | j_mayer | printf("%s: Done\n", __func__);
|
352 | 1a6c0886 | j_mayer | #endif
|
353 | 5c130f65 | pbrook | printf("bdloc %016lx\n", (unsigned long)bdloc); |
354 | 1a6c0886 | j_mayer | } |
355 | 1a6c0886 | j_mayer | |
356 | f80f9ec9 | Anthony Liguori | static QEMUMachine ref405ep_machine = {
|
357 | 4b32e168 | aliguori | .name = "ref405ep",
|
358 | 4b32e168 | aliguori | .desc = "ref405ep",
|
359 | 4b32e168 | aliguori | .init = ref405ep_init, |
360 | 1a6c0886 | j_mayer | }; |
361 | 1a6c0886 | j_mayer | |
362 | 1a6c0886 | j_mayer | /*****************************************************************************/
|
363 | 1a6c0886 | j_mayer | /* AMCC Taihu evaluation board */
|
364 | 1a6c0886 | j_mayer | /* - PowerPC 405EP processor
|
365 | 1a6c0886 | j_mayer | * - SDRAM 128 MB at 0x00000000
|
366 | 1a6c0886 | j_mayer | * - Boot flash 2 MB at 0xFFE00000
|
367 | 1a6c0886 | j_mayer | * - Application flash 32 MB at 0xFC000000
|
368 | 1a6c0886 | j_mayer | * - 2 serial ports
|
369 | 1a6c0886 | j_mayer | * - 2 ethernet PHY
|
370 | 1a6c0886 | j_mayer | * - 1 USB 1.1 device 0x50000000
|
371 | 1a6c0886 | j_mayer | * - 1 LCD display 0x50100000
|
372 | 1a6c0886 | j_mayer | * - 1 CPLD 0x50100000
|
373 | 1a6c0886 | j_mayer | * - 1 I2C EEPROM
|
374 | 1a6c0886 | j_mayer | * - 1 I2C thermal sensor
|
375 | 1a6c0886 | j_mayer | * - a set of LEDs
|
376 | 1a6c0886 | j_mayer | * - bit-bang SPI port using GPIOs
|
377 | 1a6c0886 | j_mayer | * - 1 EBC interface connector 0 0x50200000
|
378 | 1a6c0886 | j_mayer | * - 1 cardbus controller + expansion slot.
|
379 | 1a6c0886 | j_mayer | * - 1 PCI expansion slot.
|
380 | 1a6c0886 | j_mayer | */
|
381 | 1a6c0886 | j_mayer | typedef struct taihu_cpld_t taihu_cpld_t; |
382 | 1a6c0886 | j_mayer | struct taihu_cpld_t {
|
383 | 1a6c0886 | j_mayer | uint8_t reg0; |
384 | 1a6c0886 | j_mayer | uint8_t reg1; |
385 | 1a6c0886 | j_mayer | }; |
386 | 1a6c0886 | j_mayer | |
387 | c227f099 | Anthony Liguori | static uint32_t taihu_cpld_readb (void *opaque, target_phys_addr_t addr) |
388 | 1a6c0886 | j_mayer | { |
389 | 1a6c0886 | j_mayer | taihu_cpld_t *cpld; |
390 | 1a6c0886 | j_mayer | uint32_t ret; |
391 | 1a6c0886 | j_mayer | |
392 | 1a6c0886 | j_mayer | cpld = opaque; |
393 | 1a6c0886 | j_mayer | switch (addr) {
|
394 | 1a6c0886 | j_mayer | case 0x0: |
395 | 1a6c0886 | j_mayer | ret = cpld->reg0; |
396 | 1a6c0886 | j_mayer | break;
|
397 | 1a6c0886 | j_mayer | case 0x1: |
398 | 1a6c0886 | j_mayer | ret = cpld->reg1; |
399 | 1a6c0886 | j_mayer | break;
|
400 | 1a6c0886 | j_mayer | default:
|
401 | 1a6c0886 | j_mayer | ret = 0;
|
402 | 1a6c0886 | j_mayer | break;
|
403 | 1a6c0886 | j_mayer | } |
404 | 1a6c0886 | j_mayer | |
405 | 1a6c0886 | j_mayer | return ret;
|
406 | 1a6c0886 | j_mayer | } |
407 | 1a6c0886 | j_mayer | |
408 | 1a6c0886 | j_mayer | static void taihu_cpld_writeb (void *opaque, |
409 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
410 | 1a6c0886 | j_mayer | { |
411 | 1a6c0886 | j_mayer | taihu_cpld_t *cpld; |
412 | 1a6c0886 | j_mayer | |
413 | 1a6c0886 | j_mayer | cpld = opaque; |
414 | 1a6c0886 | j_mayer | switch (addr) {
|
415 | 1a6c0886 | j_mayer | case 0x0: |
416 | 1a6c0886 | j_mayer | /* Read only */
|
417 | 1a6c0886 | j_mayer | break;
|
418 | 1a6c0886 | j_mayer | case 0x1: |
419 | 1a6c0886 | j_mayer | cpld->reg1 = value; |
420 | 1a6c0886 | j_mayer | break;
|
421 | 1a6c0886 | j_mayer | default:
|
422 | 1a6c0886 | j_mayer | break;
|
423 | 1a6c0886 | j_mayer | } |
424 | 1a6c0886 | j_mayer | } |
425 | 1a6c0886 | j_mayer | |
426 | c227f099 | Anthony Liguori | static uint32_t taihu_cpld_readw (void *opaque, target_phys_addr_t addr) |
427 | 1a6c0886 | j_mayer | { |
428 | 1a6c0886 | j_mayer | uint32_t ret; |
429 | 1a6c0886 | j_mayer | |
430 | 1a6c0886 | j_mayer | ret = taihu_cpld_readb(opaque, addr) << 8;
|
431 | 1a6c0886 | j_mayer | ret |= taihu_cpld_readb(opaque, addr + 1);
|
432 | 1a6c0886 | j_mayer | |
433 | 1a6c0886 | j_mayer | return ret;
|
434 | 1a6c0886 | j_mayer | } |
435 | 1a6c0886 | j_mayer | |
436 | 1a6c0886 | j_mayer | static void taihu_cpld_writew (void *opaque, |
437 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
438 | 1a6c0886 | j_mayer | { |
439 | 1a6c0886 | j_mayer | taihu_cpld_writeb(opaque, addr, (value >> 8) & 0xFF); |
440 | 1a6c0886 | j_mayer | taihu_cpld_writeb(opaque, addr + 1, value & 0xFF); |
441 | 1a6c0886 | j_mayer | } |
442 | 1a6c0886 | j_mayer | |
443 | c227f099 | Anthony Liguori | static uint32_t taihu_cpld_readl (void *opaque, target_phys_addr_t addr) |
444 | 1a6c0886 | j_mayer | { |
445 | 1a6c0886 | j_mayer | uint32_t ret; |
446 | 1a6c0886 | j_mayer | |
447 | 1a6c0886 | j_mayer | ret = taihu_cpld_readb(opaque, addr) << 24;
|
448 | 1a6c0886 | j_mayer | ret |= taihu_cpld_readb(opaque, addr + 1) << 16; |
449 | 1a6c0886 | j_mayer | ret |= taihu_cpld_readb(opaque, addr + 2) << 8; |
450 | 1a6c0886 | j_mayer | ret |= taihu_cpld_readb(opaque, addr + 3);
|
451 | 1a6c0886 | j_mayer | |
452 | 1a6c0886 | j_mayer | return ret;
|
453 | 1a6c0886 | j_mayer | } |
454 | 1a6c0886 | j_mayer | |
455 | 1a6c0886 | j_mayer | static void taihu_cpld_writel (void *opaque, |
456 | c227f099 | Anthony Liguori | target_phys_addr_t addr, uint32_t value) |
457 | 1a6c0886 | j_mayer | { |
458 | 1a6c0886 | j_mayer | taihu_cpld_writel(opaque, addr, (value >> 24) & 0xFF); |
459 | 1a6c0886 | j_mayer | taihu_cpld_writel(opaque, addr + 1, (value >> 16) & 0xFF); |
460 | 1a6c0886 | j_mayer | taihu_cpld_writel(opaque, addr + 2, (value >> 8) & 0xFF); |
461 | 1a6c0886 | j_mayer | taihu_cpld_writeb(opaque, addr + 3, value & 0xFF); |
462 | 1a6c0886 | j_mayer | } |
463 | 1a6c0886 | j_mayer | |
464 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const taihu_cpld_read[] = { |
465 | 1a6c0886 | j_mayer | &taihu_cpld_readb, |
466 | 1a6c0886 | j_mayer | &taihu_cpld_readw, |
467 | 1a6c0886 | j_mayer | &taihu_cpld_readl, |
468 | 1a6c0886 | j_mayer | }; |
469 | 1a6c0886 | j_mayer | |
470 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const taihu_cpld_write[] = { |
471 | 1a6c0886 | j_mayer | &taihu_cpld_writeb, |
472 | 1a6c0886 | j_mayer | &taihu_cpld_writew, |
473 | 1a6c0886 | j_mayer | &taihu_cpld_writel, |
474 | 1a6c0886 | j_mayer | }; |
475 | 1a6c0886 | j_mayer | |
476 | 1a6c0886 | j_mayer | static void taihu_cpld_reset (void *opaque) |
477 | 1a6c0886 | j_mayer | { |
478 | 1a6c0886 | j_mayer | taihu_cpld_t *cpld; |
479 | 1a6c0886 | j_mayer | |
480 | 1a6c0886 | j_mayer | cpld = opaque; |
481 | 1a6c0886 | j_mayer | cpld->reg0 = 0x01;
|
482 | 1a6c0886 | j_mayer | cpld->reg1 = 0x80;
|
483 | 1a6c0886 | j_mayer | } |
484 | 1a6c0886 | j_mayer | |
485 | 1a6c0886 | j_mayer | static void taihu_cpld_init (uint32_t base) |
486 | 1a6c0886 | j_mayer | { |
487 | 1a6c0886 | j_mayer | taihu_cpld_t *cpld; |
488 | 1a6c0886 | j_mayer | int cpld_memory;
|
489 | 1a6c0886 | j_mayer | |
490 | 1a6c0886 | j_mayer | cpld = qemu_mallocz(sizeof(taihu_cpld_t));
|
491 | 1eed09cb | Avi Kivity | cpld_memory = cpu_register_io_memory(taihu_cpld_read, |
492 | 2507c12a | Alexander Graf | taihu_cpld_write, cpld, |
493 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
494 | 487414f1 | aliguori | cpu_register_physical_memory(base, 0x00000100, cpld_memory);
|
495 | a08d4367 | Jan Kiszka | qemu_register_reset(&taihu_cpld_reset, cpld); |
496 | 1a6c0886 | j_mayer | } |
497 | 1a6c0886 | j_mayer | |
498 | c227f099 | Anthony Liguori | static void taihu_405ep_init(ram_addr_t ram_size, |
499 | 3023f332 | aliguori | const char *boot_device, |
500 | 5fafdf24 | ths | const char *kernel_filename, |
501 | 1a6c0886 | j_mayer | const char *kernel_cmdline, |
502 | 1a6c0886 | j_mayer | const char *initrd_filename, |
503 | 1a6c0886 | j_mayer | const char *cpu_model) |
504 | 1a6c0886 | j_mayer | { |
505 | 5cea8590 | Paul Brook | char *filename;
|
506 | 1a6c0886 | j_mayer | qemu_irq *pic; |
507 | c227f099 | Anthony Liguori | ram_addr_t bios_offset; |
508 | c227f099 | Anthony Liguori | target_phys_addr_t ram_bases[2], ram_sizes[2]; |
509 | 093209cd | Blue Swirl | long bios_size;
|
510 | 093209cd | Blue Swirl | target_ulong kernel_base, initrd_base; |
511 | 093209cd | Blue Swirl | long kernel_size, initrd_size;
|
512 | 1a6c0886 | j_mayer | int linux_boot;
|
513 | 1a6c0886 | j_mayer | int fl_idx, fl_sectors;
|
514 | 751c6a17 | Gerd Hoffmann | DriveInfo *dinfo; |
515 | 3b46e624 | ths | |
516 | 1a6c0886 | j_mayer | /* RAM is soldered to the board so the size cannot be changed */
|
517 | 1724f049 | Alex Williamson | ram_bases[0] = qemu_ram_alloc(NULL, "taihu_405ep.ram-0", 0x04000000); |
518 | 1a6c0886 | j_mayer | ram_sizes[0] = 0x04000000; |
519 | 1724f049 | Alex Williamson | ram_bases[1] = qemu_ram_alloc(NULL, "taihu_405ep.ram-1", 0x04000000); |
520 | 1a6c0886 | j_mayer | ram_sizes[1] = 0x04000000; |
521 | a0b753df | pbrook | ram_size = 0x08000000;
|
522 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
523 | 1a6c0886 | j_mayer | printf("%s: register cpu\n", __func__);
|
524 | 1a6c0886 | j_mayer | #endif
|
525 | 49a2942d | Blue Swirl | ppc405ep_init(ram_bases, ram_sizes, 33333333, &pic,
|
526 | 49a2942d | Blue Swirl | kernel_filename == NULL ? 0 : 1); |
527 | 1a6c0886 | j_mayer | /* allocate and load BIOS */
|
528 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
529 | 1a6c0886 | j_mayer | printf("%s: register BIOS\n", __func__);
|
530 | 1a6c0886 | j_mayer | #endif
|
531 | 1a6c0886 | j_mayer | fl_idx = 0;
|
532 | 1a6c0886 | j_mayer | #if defined(USE_FLASH_BIOS)
|
533 | 751c6a17 | Gerd Hoffmann | dinfo = drive_get(IF_PFLASH, 0, fl_idx);
|
534 | 751c6a17 | Gerd Hoffmann | if (dinfo) {
|
535 | 751c6a17 | Gerd Hoffmann | bios_size = bdrv_getlength(dinfo->bdrv); |
536 | 1a6c0886 | j_mayer | /* XXX: should check that size is 2MB */
|
537 | 1a6c0886 | j_mayer | // bios_size = 2 * 1024 * 1024;
|
538 | 1a6c0886 | j_mayer | fl_sectors = (bios_size + 65535) >> 16; |
539 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size); |
540 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
541 | 093209cd | Blue Swirl | printf("Register parallel flash %d size %lx"
|
542 | 093209cd | Blue Swirl | " at offset %08lx addr %lx '%s' %d\n",
|
543 | 1a6c0886 | j_mayer | fl_idx, bios_size, bios_offset, -bios_size, |
544 | 751c6a17 | Gerd Hoffmann | bdrv_get_device_name(dinfo->bdrv), fl_sectors); |
545 | 1a6c0886 | j_mayer | #endif
|
546 | 88eeee0a | balrog | pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, |
547 | 751c6a17 | Gerd Hoffmann | dinfo->bdrv, 65536, fl_sectors, 1, |
548 | 5f9fc5ad | Blue Swirl | 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
549 | 5f9fc5ad | Blue Swirl | 1);
|
550 | 1a6c0886 | j_mayer | fl_idx++; |
551 | 1a6c0886 | j_mayer | } else
|
552 | 1a6c0886 | j_mayer | #endif
|
553 | 1a6c0886 | j_mayer | { |
554 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
555 | 1a6c0886 | j_mayer | printf("Load BIOS from file\n");
|
556 | 1a6c0886 | j_mayer | #endif
|
557 | 1192dad8 | j_mayer | if (bios_name == NULL) |
558 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
559 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", BIOS_SIZE); |
560 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
561 | 5cea8590 | Paul Brook | if (filename) {
|
562 | 5cea8590 | Paul Brook | bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
563 | e98ccb3f | Stefan Weil | qemu_free(filename); |
564 | 5cea8590 | Paul Brook | } else {
|
565 | 5cea8590 | Paul Brook | bios_size = -1;
|
566 | 5cea8590 | Paul Brook | } |
567 | 1a6c0886 | j_mayer | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
568 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n",
|
569 | 5cea8590 | Paul Brook | bios_name); |
570 | 1a6c0886 | j_mayer | exit(1);
|
571 | 1a6c0886 | j_mayer | } |
572 | 1a6c0886 | j_mayer | bios_size = (bios_size + 0xfff) & ~0xfff; |
573 | 5fafdf24 | ths | cpu_register_physical_memory((uint32_t)(-bios_size), |
574 | 1a6c0886 | j_mayer | bios_size, bios_offset | IO_MEM_ROM); |
575 | 1a6c0886 | j_mayer | } |
576 | 1a6c0886 | j_mayer | /* Register Linux flash */
|
577 | 751c6a17 | Gerd Hoffmann | dinfo = drive_get(IF_PFLASH, 0, fl_idx);
|
578 | 751c6a17 | Gerd Hoffmann | if (dinfo) {
|
579 | 751c6a17 | Gerd Hoffmann | bios_size = bdrv_getlength(dinfo->bdrv); |
580 | 1a6c0886 | j_mayer | /* XXX: should check that size is 32MB */
|
581 | 1a6c0886 | j_mayer | bios_size = 32 * 1024 * 1024; |
582 | 1a6c0886 | j_mayer | fl_sectors = (bios_size + 65535) >> 16; |
583 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
584 | 093209cd | Blue Swirl | printf("Register parallel flash %d size %lx"
|
585 | 90e189ec | Blue Swirl | " at offset %08lx addr " TARGET_FMT_lx " '%s'\n", |
586 | 1a6c0886 | j_mayer | fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
|
587 | 751c6a17 | Gerd Hoffmann | bdrv_get_device_name(dinfo->bdrv)); |
588 | 1a6c0886 | j_mayer | #endif
|
589 | 1724f049 | Alex Williamson | bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.flash", bios_size); |
590 | 88eeee0a | balrog | pflash_cfi02_register(0xfc000000, bios_offset,
|
591 | 751c6a17 | Gerd Hoffmann | dinfo->bdrv, 65536, fl_sectors, 1, |
592 | 5f9fc5ad | Blue Swirl | 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
593 | 5f9fc5ad | Blue Swirl | 1);
|
594 | 1a6c0886 | j_mayer | fl_idx++; |
595 | 1a6c0886 | j_mayer | } |
596 | 1a6c0886 | j_mayer | /* Register CLPD & LCD display */
|
597 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
598 | 1a6c0886 | j_mayer | printf("%s: register CPLD\n", __func__);
|
599 | 1a6c0886 | j_mayer | #endif
|
600 | 1a6c0886 | j_mayer | taihu_cpld_init(0x50100000);
|
601 | 1a6c0886 | j_mayer | /* Load kernel */
|
602 | 1a6c0886 | j_mayer | linux_boot = (kernel_filename != NULL);
|
603 | 1a6c0886 | j_mayer | if (linux_boot) {
|
604 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
605 | 1a6c0886 | j_mayer | printf("%s: load kernel\n", __func__);
|
606 | 1a6c0886 | j_mayer | #endif
|
607 | 1a6c0886 | j_mayer | kernel_base = KERNEL_LOAD_ADDR; |
608 | 1a6c0886 | j_mayer | /* now we can load the kernel */
|
609 | 5c130f65 | pbrook | kernel_size = load_image_targphys(kernel_filename, kernel_base, |
610 | 5c130f65 | pbrook | ram_size - kernel_base); |
611 | 1a6c0886 | j_mayer | if (kernel_size < 0) { |
612 | 5fafdf24 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
613 | 1a6c0886 | j_mayer | kernel_filename); |
614 | 1a6c0886 | j_mayer | exit(1);
|
615 | 1a6c0886 | j_mayer | } |
616 | 1a6c0886 | j_mayer | /* load initrd */
|
617 | 1a6c0886 | j_mayer | if (initrd_filename) {
|
618 | 1a6c0886 | j_mayer | initrd_base = INITRD_LOAD_ADDR; |
619 | 5c130f65 | pbrook | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
620 | 5c130f65 | pbrook | ram_size - initrd_base); |
621 | 1a6c0886 | j_mayer | if (initrd_size < 0) { |
622 | 1a6c0886 | j_mayer | fprintf(stderr, |
623 | 5fafdf24 | ths | "qemu: could not load initial ram disk '%s'\n",
|
624 | 1a6c0886 | j_mayer | initrd_filename); |
625 | 1a6c0886 | j_mayer | exit(1);
|
626 | 1a6c0886 | j_mayer | } |
627 | 1a6c0886 | j_mayer | } else {
|
628 | 1a6c0886 | j_mayer | initrd_base = 0;
|
629 | 1a6c0886 | j_mayer | initrd_size = 0;
|
630 | 1a6c0886 | j_mayer | } |
631 | 1a6c0886 | j_mayer | } else {
|
632 | 1a6c0886 | j_mayer | kernel_base = 0;
|
633 | 1a6c0886 | j_mayer | kernel_size = 0;
|
634 | 1a6c0886 | j_mayer | initrd_base = 0;
|
635 | 1a6c0886 | j_mayer | initrd_size = 0;
|
636 | 1a6c0886 | j_mayer | } |
637 | 1a6c0886 | j_mayer | #ifdef DEBUG_BOARD_INIT
|
638 | 1a6c0886 | j_mayer | printf("%s: Done\n", __func__);
|
639 | 1a6c0886 | j_mayer | #endif
|
640 | 1a6c0886 | j_mayer | } |
641 | 1a6c0886 | j_mayer | |
642 | f80f9ec9 | Anthony Liguori | static QEMUMachine taihu_machine = {
|
643 | b2ee0ce2 | pbrook | .name = "taihu",
|
644 | b2ee0ce2 | pbrook | .desc = "taihu",
|
645 | b2ee0ce2 | pbrook | .init = taihu_405ep_init, |
646 | 1a6c0886 | j_mayer | }; |
647 | f80f9ec9 | Anthony Liguori | |
648 | f80f9ec9 | Anthony Liguori | static void ppc405_machine_init(void) |
649 | f80f9ec9 | Anthony Liguori | { |
650 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&ref405ep_machine); |
651 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&taihu_machine); |
652 | f80f9ec9 | Anthony Liguori | } |
653 | f80f9ec9 | Anthony Liguori | |
654 | f80f9ec9 | Anthony Liguori | machine_init(ppc405_machine_init); |