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/*
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* PowerPC emulation micro-operations for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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static inline uint16_t glue(ld16r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint16_t tmp = glue(lduw, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); |
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} |
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static inline int32_t glue(ld16rs, MEMSUFFIX) (target_ulong EA) |
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{ |
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int16_t tmp = glue(lduw, MEMSUFFIX)(EA); |
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return (int16_t)((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); |
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} |
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static inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | |
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((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); |
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} |
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#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB)
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static inline uint64_t glue(ld64r, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint64_t tmp = glue(ldq, MEMSUFFIX)(EA); |
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return ((tmp & 0xFF00000000000000ULL) >> 56) | |
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((tmp & 0x00FF000000000000ULL) >> 40) | |
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((tmp & 0x0000FF0000000000ULL) >> 24) | |
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((tmp & 0x000000FF00000000ULL) >> 8) | |
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((tmp & 0x00000000FF000000ULL) << 8) | |
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((tmp & 0x0000000000FF0000ULL) << 24) | |
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((tmp & 0x000000000000FF00ULL) << 40) | |
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((tmp & 0x00000000000000FFULL) << 54); |
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} |
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#endif
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#if defined(TARGET_PPC64)
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static inline int64_t glue(ldsl, MEMSUFFIX) (target_ulong EA) |
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{ |
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return (int32_t)glue(ldl, MEMSUFFIX)(EA);
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} |
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static inline int64_t glue(ld32rs, MEMSUFFIX) (target_ulong EA) |
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{ |
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uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); |
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return (int32_t)((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | |
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((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); |
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} |
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#endif
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static inline void glue(st16r, MEMSUFFIX) (target_ulong EA, uint16_t data) |
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{ |
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uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); |
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glue(stw, MEMSUFFIX)(EA, tmp); |
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} |
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static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, uint32_t data) |
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{ |
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uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | |
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((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); |
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glue(stl, MEMSUFFIX)(EA, tmp); |
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} |
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#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB)
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static inline void glue(st64r, MEMSUFFIX) (target_ulong EA, uint64_t data) |
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{ |
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uint64_t tmp = ((data & 0xFF00000000000000ULL) >> 56) | |
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((data & 0x00FF000000000000ULL) >> 40) | |
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((data & 0x0000FF0000000000ULL) >> 24) | |
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((data & 0x000000FF00000000ULL) >> 8) | |
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((data & 0x00000000FF000000ULL) << 8) | |
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((data & 0x0000000000FF0000ULL) << 24) | |
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((data & 0x000000000000FF00ULL) << 40) | |
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((data & 0x00000000000000FFULL) << 56); |
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glue(stq, MEMSUFFIX)(EA, tmp); |
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} |
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#endif
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/*** Integer load ***/
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#define PPC_LD_OP(name, op) \
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void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \ |
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{ \ |
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T1 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
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RETURN(); \ |
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} |
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#if defined(TARGET_PPC64)
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#define PPC_LD_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \ |
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{ \ |
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T1 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
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RETURN(); \ |
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} |
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#endif
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#define PPC_ST_OP(name, op) \
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void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \ |
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{ \ |
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glue(op, MEMSUFFIX)((uint32_t)T0, T1); \ |
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RETURN(); \ |
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} |
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#if defined(TARGET_PPC64)
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#define PPC_ST_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \ |
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{ \ |
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glue(op, MEMSUFFIX)((uint64_t)T0, T1); \ |
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RETURN(); \ |
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} |
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#endif
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PPC_LD_OP(bz, ldub); |
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PPC_LD_OP(ha, ldsw); |
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PPC_LD_OP(hz, lduw); |
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PPC_LD_OP(wz, ldl); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP(d, ldq); |
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PPC_LD_OP(wa, ldsl); |
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PPC_LD_OP_64(d, ldq); |
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PPC_LD_OP_64(wa, ldsl); |
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PPC_LD_OP_64(bz, ldub); |
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PPC_LD_OP_64(ha, ldsw); |
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PPC_LD_OP_64(hz, lduw); |
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PPC_LD_OP_64(wz, ldl); |
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#endif
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PPC_LD_OP(ha_le, ld16rs); |
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PPC_LD_OP(hz_le, ld16r); |
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PPC_LD_OP(wz_le, ld32r); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP(d_le, ld64r); |
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PPC_LD_OP(wa_le, ld32rs); |
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PPC_LD_OP_64(d_le, ld64r); |
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PPC_LD_OP_64(wa_le, ld32rs); |
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PPC_LD_OP_64(ha_le, ld16rs); |
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PPC_LD_OP_64(hz_le, ld16r); |
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PPC_LD_OP_64(wz_le, ld32r); |
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#endif
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/*** Integer store ***/
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PPC_ST_OP(b, stb); |
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PPC_ST_OP(h, stw); |
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PPC_ST_OP(w, stl); |
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#if defined(TARGET_PPC64)
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PPC_ST_OP(d, stq); |
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PPC_ST_OP_64(d, stq); |
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PPC_ST_OP_64(b, stb); |
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PPC_ST_OP_64(h, stw); |
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PPC_ST_OP_64(w, stl); |
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#endif
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PPC_ST_OP(h_le, st16r); |
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PPC_ST_OP(w_le, st32r); |
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#if defined(TARGET_PPC64)
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PPC_ST_OP(d_le, st64r); |
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PPC_ST_OP_64(d_le, st64r); |
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PPC_ST_OP_64(h_le, st16r); |
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PPC_ST_OP_64(w_le, st32r); |
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#endif
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/*** Integer load and store with byte reverse ***/
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PPC_LD_OP(hbr, ld16r); |
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PPC_LD_OP(wbr, ld32r); |
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PPC_ST_OP(hbr, st16r); |
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PPC_ST_OP(wbr, st32r); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP_64(hbr, ld16r); |
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PPC_LD_OP_64(wbr, ld32r); |
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PPC_ST_OP_64(hbr, st16r); |
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PPC_ST_OP_64(wbr, st32r); |
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#endif
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PPC_LD_OP(hbr_le, lduw); |
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PPC_LD_OP(wbr_le, ldl); |
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PPC_ST_OP(hbr_le, stw); |
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PPC_ST_OP(wbr_le, stl); |
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#if defined(TARGET_PPC64)
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PPC_LD_OP_64(hbr_le, lduw); |
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PPC_LD_OP_64(wbr_le, ldl); |
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PPC_ST_OP_64(hbr_le, stw); |
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PPC_ST_OP_64(wbr_le, stl); |
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#endif
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/*** Integer load and store multiple ***/
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void OPPROTO glue(op_lmw, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lmw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lmw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lmw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lmw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stmw, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stmw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stmw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stmw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stmw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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/*** Integer load and store strings ***/
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void OPPROTO glue(op_lswi, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lswi_le, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswi_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_lsw_le_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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/* PPC32 specification says we must generate an exception if
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* rA is in the range of registers to be loaded.
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* In an other hand, IBM says this is valid, but rA won't be loaded.
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* For now, I'll follow the spec...
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*/
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void OPPROTO glue(op_lswx, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_64, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_lswx_le, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_le, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_lswx_le_64, MEMSUFFIX) (void) |
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{ |
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/* Note: T1 comes from xer_bc then no cast is needed */
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if (likely(T1 != 0)) { |
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if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
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(PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) { |
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do_raise_exception_err(POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | |
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POWERPC_EXCP_INVAL_LSWX); |
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} else {
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glue(do_lsw_le_64, MEMSUFFIX)(PARAM1); |
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} |
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} |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stsw, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_64, MEMSUFFIX)(PARAM1); |
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RETURN(); |
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} |
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#endif
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void OPPROTO glue(op_stsw_le, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_le, MEMSUFFIX)(PARAM1); |
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RETURN(); |
379 |
} |
380 |
|
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#if defined(TARGET_PPC64)
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void OPPROTO glue(op_stsw_le_64, MEMSUFFIX) (void) |
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{ |
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glue(do_stsw_le_64, MEMSUFFIX)(PARAM1); |
385 |
RETURN(); |
386 |
} |
387 |
#endif
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/*** Floating-point store ***/
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#define PPC_STF_OP(name, op) \
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void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \ |
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{ \ |
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glue(op, MEMSUFFIX)((uint32_t)T0, FT0); \ |
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RETURN(); \ |
395 |
} |
396 |
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#if defined(TARGET_PPC64)
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#define PPC_STF_OP_64(name, op) \
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void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \ |
400 |
{ \ |
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glue(op, MEMSUFFIX)((uint64_t)T0, FT0); \ |
402 |
RETURN(); \ |
403 |
} |
404 |
#endif
|
405 |
|
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static inline void glue(stfs, MEMSUFFIX) (target_ulong EA, double d) |
407 |
{ |
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glue(stfl, MEMSUFFIX)(EA, float64_to_float32(d, &env->fp_status)); |
409 |
} |
410 |
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static inline void glue(stfiwx, MEMSUFFIX) (target_ulong EA, double d) |
412 |
{ |
413 |
union {
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double d;
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415 |
uint64_t u; |
416 |
} u; |
417 |
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418 |
/* Store the low order 32 bits without any conversion */
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u.d = d; |
420 |
glue(stl, MEMSUFFIX)(EA, u.u); |
421 |
} |
422 |
|
423 |
PPC_STF_OP(fd, stfq); |
424 |
PPC_STF_OP(fs, stfs); |
425 |
PPC_STF_OP(fiwx, stfiwx); |
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#if defined(TARGET_PPC64)
|
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PPC_STF_OP_64(fd, stfq); |
428 |
PPC_STF_OP_64(fs, stfs); |
429 |
PPC_STF_OP_64(fiwx, stfiwx); |
430 |
#endif
|
431 |
|
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static inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) |
433 |
{ |
434 |
union {
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double d;
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uint64_t u; |
437 |
} u; |
438 |
|
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u.d = d; |
440 |
u.u = ((u.u & 0xFF00000000000000ULL) >> 56) | |
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((u.u & 0x00FF000000000000ULL) >> 40) | |
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((u.u & 0x0000FF0000000000ULL) >> 24) | |
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((u.u & 0x000000FF00000000ULL) >> 8) | |
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((u.u & 0x00000000FF000000ULL) << 8) | |
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((u.u & 0x0000000000FF0000ULL) << 24) | |
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((u.u & 0x000000000000FF00ULL) << 40) | |
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((u.u & 0x00000000000000FFULL) << 56); |
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glue(stfq, MEMSUFFIX)(EA, u.d); |
449 |
} |
450 |
|
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static inline void glue(stfsr, MEMSUFFIX) (target_ulong EA, double d) |
452 |
{ |
453 |
union {
|
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float f;
|
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uint32_t u; |
456 |
} u; |
457 |
|
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u.f = float64_to_float32(d, &env->fp_status); |
459 |
u.u = ((u.u & 0xFF000000UL) >> 24) | |
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((u.u & 0x00FF0000ULL) >> 8) | |
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((u.u & 0x0000FF00UL) << 8) | |
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((u.u & 0x000000FFULL) << 24); |
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glue(stfl, MEMSUFFIX)(EA, u.f); |
464 |
} |
465 |
|
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static inline void glue(stfiwxr, MEMSUFFIX) (target_ulong EA, double d) |
467 |
{ |
468 |
union {
|
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double d;
|
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uint64_t u; |
471 |
} u; |
472 |
|
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/* Store the low order 32 bits without any conversion */
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u.d = d; |
475 |
u.u = ((u.u & 0xFF000000UL) >> 24) | |
476 |
((u.u & 0x00FF0000ULL) >> 8) | |
477 |
((u.u & 0x0000FF00UL) << 8) | |
478 |
((u.u & 0x000000FFULL) << 24); |
479 |
glue(stl, MEMSUFFIX)(EA, u.u); |
480 |
} |
481 |
|
482 |
|
483 |
PPC_STF_OP(fd_le, stfqr); |
484 |
PPC_STF_OP(fs_le, stfsr); |
485 |
PPC_STF_OP(fiwx_le, stfiwxr); |
486 |
#if defined(TARGET_PPC64)
|
487 |
PPC_STF_OP_64(fd_le, stfqr); |
488 |
PPC_STF_OP_64(fs_le, stfsr); |
489 |
PPC_STF_OP_64(fiwx_le, stfiwxr); |
490 |
#endif
|
491 |
|
492 |
/*** Floating-point load ***/
|
493 |
#define PPC_LDF_OP(name, op) \
|
494 |
void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \ |
495 |
{ \ |
496 |
FT0 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
497 |
RETURN(); \ |
498 |
} |
499 |
|
500 |
#if defined(TARGET_PPC64)
|
501 |
#define PPC_LDF_OP_64(name, op) \
|
502 |
void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \ |
503 |
{ \ |
504 |
FT0 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
505 |
RETURN(); \ |
506 |
} |
507 |
#endif
|
508 |
|
509 |
static inline double glue(ldfs, MEMSUFFIX) (target_ulong EA) |
510 |
{ |
511 |
return float32_to_float64(glue(ldfl, MEMSUFFIX)(EA), &env->fp_status);
|
512 |
} |
513 |
|
514 |
PPC_LDF_OP(fd, ldfq); |
515 |
PPC_LDF_OP(fs, ldfs); |
516 |
#if defined(TARGET_PPC64)
|
517 |
PPC_LDF_OP_64(fd, ldfq); |
518 |
PPC_LDF_OP_64(fs, ldfs); |
519 |
#endif
|
520 |
|
521 |
static inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA) |
522 |
{ |
523 |
union {
|
524 |
double d;
|
525 |
uint64_t u; |
526 |
} u; |
527 |
|
528 |
u.d = glue(ldfq, MEMSUFFIX)(EA); |
529 |
u.u = ((u.u & 0xFF00000000000000ULL) >> 56) | |
530 |
((u.u & 0x00FF000000000000ULL) >> 40) | |
531 |
((u.u & 0x0000FF0000000000ULL) >> 24) | |
532 |
((u.u & 0x000000FF00000000ULL) >> 8) | |
533 |
((u.u & 0x00000000FF000000ULL) << 8) | |
534 |
((u.u & 0x0000000000FF0000ULL) << 24) | |
535 |
((u.u & 0x000000000000FF00ULL) << 40) | |
536 |
((u.u & 0x00000000000000FFULL) << 56); |
537 |
|
538 |
return u.d;
|
539 |
} |
540 |
|
541 |
static inline double glue(ldfsr, MEMSUFFIX) (target_ulong EA) |
542 |
{ |
543 |
union {
|
544 |
float f;
|
545 |
uint32_t u; |
546 |
} u; |
547 |
|
548 |
u.f = glue(ldfl, MEMSUFFIX)(EA); |
549 |
u.u = ((u.u & 0xFF000000UL) >> 24) | |
550 |
((u.u & 0x00FF0000ULL) >> 8) | |
551 |
((u.u & 0x0000FF00UL) << 8) | |
552 |
((u.u & 0x000000FFULL) << 24); |
553 |
|
554 |
return float32_to_float64(u.f, &env->fp_status);
|
555 |
} |
556 |
|
557 |
PPC_LDF_OP(fd_le, ldfqr); |
558 |
PPC_LDF_OP(fs_le, ldfsr); |
559 |
#if defined(TARGET_PPC64)
|
560 |
PPC_LDF_OP_64(fd_le, ldfqr); |
561 |
PPC_LDF_OP_64(fs_le, ldfsr); |
562 |
#endif
|
563 |
|
564 |
/* Load and set reservation */
|
565 |
void OPPROTO glue(op_lwarx, MEMSUFFIX) (void) |
566 |
{ |
567 |
if (unlikely(T0 & 0x03)) { |
568 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
569 |
} else {
|
570 |
T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0); |
571 |
env->reserve = (uint32_t)T0; |
572 |
} |
573 |
RETURN(); |
574 |
} |
575 |
|
576 |
#if defined(TARGET_PPC64)
|
577 |
void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void) |
578 |
{ |
579 |
if (unlikely(T0 & 0x03)) { |
580 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
581 |
} else {
|
582 |
T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0); |
583 |
env->reserve = (uint64_t)T0; |
584 |
} |
585 |
RETURN(); |
586 |
} |
587 |
|
588 |
void OPPROTO glue(op_ldarx, MEMSUFFIX) (void) |
589 |
{ |
590 |
if (unlikely(T0 & 0x03)) { |
591 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
592 |
} else {
|
593 |
T1 = glue(ldq, MEMSUFFIX)((uint32_t)T0); |
594 |
env->reserve = (uint32_t)T0; |
595 |
} |
596 |
RETURN(); |
597 |
} |
598 |
|
599 |
void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void) |
600 |
{ |
601 |
if (unlikely(T0 & 0x03)) { |
602 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
603 |
} else {
|
604 |
T1 = glue(ldq, MEMSUFFIX)((uint64_t)T0); |
605 |
env->reserve = (uint64_t)T0; |
606 |
} |
607 |
RETURN(); |
608 |
} |
609 |
#endif
|
610 |
|
611 |
void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void) |
612 |
{ |
613 |
if (unlikely(T0 & 0x03)) { |
614 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
615 |
} else {
|
616 |
T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0); |
617 |
env->reserve = (uint32_t)T0; |
618 |
} |
619 |
RETURN(); |
620 |
} |
621 |
|
622 |
#if defined(TARGET_PPC64)
|
623 |
void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void) |
624 |
{ |
625 |
if (unlikely(T0 & 0x03)) { |
626 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
627 |
} else {
|
628 |
T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0); |
629 |
env->reserve = (uint64_t)T0; |
630 |
} |
631 |
RETURN(); |
632 |
} |
633 |
|
634 |
void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void) |
635 |
{ |
636 |
if (unlikely(T0 & 0x03)) { |
637 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
638 |
} else {
|
639 |
T1 = glue(ld64r, MEMSUFFIX)((uint32_t)T0); |
640 |
env->reserve = (uint32_t)T0; |
641 |
} |
642 |
RETURN(); |
643 |
} |
644 |
|
645 |
void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void) |
646 |
{ |
647 |
if (unlikely(T0 & 0x03)) { |
648 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
649 |
} else {
|
650 |
T1 = glue(ld64r, MEMSUFFIX)((uint64_t)T0); |
651 |
env->reserve = (uint64_t)T0; |
652 |
} |
653 |
RETURN(); |
654 |
} |
655 |
#endif
|
656 |
|
657 |
/* Store with reservation */
|
658 |
void OPPROTO glue(op_stwcx, MEMSUFFIX) (void) |
659 |
{ |
660 |
if (unlikely(T0 & 0x03)) { |
661 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
662 |
} else {
|
663 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
664 |
env->crf[0] = xer_so;
|
665 |
} else {
|
666 |
glue(stl, MEMSUFFIX)((uint32_t)T0, T1); |
667 |
env->crf[0] = xer_so | 0x02; |
668 |
} |
669 |
} |
670 |
env->reserve = -1;
|
671 |
RETURN(); |
672 |
} |
673 |
|
674 |
#if defined(TARGET_PPC64)
|
675 |
void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void) |
676 |
{ |
677 |
if (unlikely(T0 & 0x03)) { |
678 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
679 |
} else {
|
680 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
681 |
env->crf[0] = xer_so;
|
682 |
} else {
|
683 |
glue(stl, MEMSUFFIX)((uint64_t)T0, T1); |
684 |
env->crf[0] = xer_so | 0x02; |
685 |
} |
686 |
} |
687 |
env->reserve = -1;
|
688 |
RETURN(); |
689 |
} |
690 |
|
691 |
void OPPROTO glue(op_stdcx, MEMSUFFIX) (void) |
692 |
{ |
693 |
if (unlikely(T0 & 0x03)) { |
694 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
695 |
} else {
|
696 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
697 |
env->crf[0] = xer_so;
|
698 |
} else {
|
699 |
glue(stq, MEMSUFFIX)((uint32_t)T0, T1); |
700 |
env->crf[0] = xer_so | 0x02; |
701 |
} |
702 |
} |
703 |
env->reserve = -1;
|
704 |
RETURN(); |
705 |
} |
706 |
|
707 |
void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void) |
708 |
{ |
709 |
if (unlikely(T0 & 0x03)) { |
710 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
711 |
} else {
|
712 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
713 |
env->crf[0] = xer_so;
|
714 |
} else {
|
715 |
glue(stq, MEMSUFFIX)((uint64_t)T0, T1); |
716 |
env->crf[0] = xer_so | 0x02; |
717 |
} |
718 |
} |
719 |
env->reserve = -1;
|
720 |
RETURN(); |
721 |
} |
722 |
#endif
|
723 |
|
724 |
void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void) |
725 |
{ |
726 |
if (unlikely(T0 & 0x03)) { |
727 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
728 |
} else {
|
729 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
730 |
env->crf[0] = xer_so;
|
731 |
} else {
|
732 |
glue(st32r, MEMSUFFIX)((uint32_t)T0, T1); |
733 |
env->crf[0] = xer_so | 0x02; |
734 |
} |
735 |
} |
736 |
env->reserve = -1;
|
737 |
RETURN(); |
738 |
} |
739 |
|
740 |
#if defined(TARGET_PPC64)
|
741 |
void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void) |
742 |
{ |
743 |
if (unlikely(T0 & 0x03)) { |
744 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
745 |
} else {
|
746 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
747 |
env->crf[0] = xer_so;
|
748 |
} else {
|
749 |
glue(st32r, MEMSUFFIX)((uint64_t)T0, T1); |
750 |
env->crf[0] = xer_so | 0x02; |
751 |
} |
752 |
} |
753 |
env->reserve = -1;
|
754 |
RETURN(); |
755 |
} |
756 |
|
757 |
void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void) |
758 |
{ |
759 |
if (unlikely(T0 & 0x03)) { |
760 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
761 |
} else {
|
762 |
if (unlikely(env->reserve != (uint32_t)T0)) {
|
763 |
env->crf[0] = xer_so;
|
764 |
} else {
|
765 |
glue(st64r, MEMSUFFIX)((uint32_t)T0, T1); |
766 |
env->crf[0] = xer_so | 0x02; |
767 |
} |
768 |
} |
769 |
env->reserve = -1;
|
770 |
RETURN(); |
771 |
} |
772 |
|
773 |
void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void) |
774 |
{ |
775 |
if (unlikely(T0 & 0x03)) { |
776 |
do_raise_exception(POWERPC_EXCP_ALIGN); |
777 |
} else {
|
778 |
if (unlikely(env->reserve != (uint64_t)T0)) {
|
779 |
env->crf[0] = xer_so;
|
780 |
} else {
|
781 |
glue(st64r, MEMSUFFIX)((uint64_t)T0, T1); |
782 |
env->crf[0] = xer_so | 0x02; |
783 |
} |
784 |
} |
785 |
env->reserve = -1;
|
786 |
RETURN(); |
787 |
} |
788 |
#endif
|
789 |
|
790 |
void OPPROTO glue(op_dcbz_l32, MEMSUFFIX) (void) |
791 |
{ |
792 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0); |
793 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0); |
794 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0); |
795 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0); |
796 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0); |
797 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0); |
798 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0); |
799 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0); |
800 |
RETURN(); |
801 |
} |
802 |
|
803 |
void OPPROTO glue(op_dcbz_l64, MEMSUFFIX) (void) |
804 |
{ |
805 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0); |
806 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0); |
807 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0); |
808 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0); |
809 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0); |
810 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0); |
811 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0); |
812 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0); |
813 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0); |
814 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0); |
815 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0); |
816 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0); |
817 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0); |
818 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0); |
819 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0); |
820 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0); |
821 |
RETURN(); |
822 |
} |
823 |
|
824 |
void OPPROTO glue(op_dcbz_l128, MEMSUFFIX) (void) |
825 |
{ |
826 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0); |
827 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0); |
828 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0); |
829 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0); |
830 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0); |
831 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0); |
832 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0); |
833 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0); |
834 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0); |
835 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0); |
836 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0); |
837 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0); |
838 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0); |
839 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0); |
840 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0); |
841 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0); |
842 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x40UL), 0); |
843 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x44UL), 0); |
844 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x48UL), 0); |
845 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x4CUL), 0); |
846 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x50UL), 0); |
847 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x54UL), 0); |
848 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x58UL), 0); |
849 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x5CUL), 0); |
850 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x60UL), 0); |
851 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x64UL), 0); |
852 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x68UL), 0); |
853 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x6CUL), 0); |
854 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x70UL), 0); |
855 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x74UL), 0); |
856 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x78UL), 0); |
857 |
glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x7CUL), 0); |
858 |
RETURN(); |
859 |
} |
860 |
|
861 |
void OPPROTO glue(op_dcbz, MEMSUFFIX) (void) |
862 |
{ |
863 |
glue(do_dcbz, MEMSUFFIX)(); |
864 |
RETURN(); |
865 |
} |
866 |
|
867 |
#if defined(TARGET_PPC64)
|
868 |
void OPPROTO glue(op_dcbz_l32_64, MEMSUFFIX) (void) |
869 |
{ |
870 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0); |
871 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0); |
872 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0); |
873 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0); |
874 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0); |
875 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0); |
876 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0); |
877 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0); |
878 |
RETURN(); |
879 |
} |
880 |
|
881 |
void OPPROTO glue(op_dcbz_l64_64, MEMSUFFIX) (void) |
882 |
{ |
883 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0); |
884 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0); |
885 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0); |
886 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0); |
887 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0); |
888 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0); |
889 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0); |
890 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0); |
891 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0); |
892 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0); |
893 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0); |
894 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0); |
895 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0); |
896 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0); |
897 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0); |
898 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0); |
899 |
RETURN(); |
900 |
} |
901 |
|
902 |
void OPPROTO glue(op_dcbz_l128_64, MEMSUFFIX) (void) |
903 |
{ |
904 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0); |
905 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0); |
906 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0); |
907 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0); |
908 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0); |
909 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0); |
910 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0); |
911 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0); |
912 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0); |
913 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0); |
914 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0); |
915 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0); |
916 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0); |
917 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0); |
918 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0); |
919 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0); |
920 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x40UL), 0); |
921 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x44UL), 0); |
922 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x48UL), 0); |
923 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x4CUL), 0); |
924 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x50UL), 0); |
925 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x54UL), 0); |
926 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x58UL), 0); |
927 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x5CUL), 0); |
928 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x60UL), 0); |
929 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x64UL), 0); |
930 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x68UL), 0); |
931 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x6CUL), 0); |
932 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x70UL), 0); |
933 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x74UL), 0); |
934 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x78UL), 0); |
935 |
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x7CUL), 0); |
936 |
RETURN(); |
937 |
} |
938 |
|
939 |
void OPPROTO glue(op_dcbz_64, MEMSUFFIX) (void) |
940 |
{ |
941 |
glue(do_dcbz_64, MEMSUFFIX)(); |
942 |
RETURN(); |
943 |
} |
944 |
#endif
|
945 |
|
946 |
/* Instruction cache block invalidate */
|
947 |
void OPPROTO glue(op_icbi, MEMSUFFIX) (void) |
948 |
{ |
949 |
glue(do_icbi, MEMSUFFIX)(); |
950 |
RETURN(); |
951 |
} |
952 |
|
953 |
#if defined(TARGET_PPC64)
|
954 |
void OPPROTO glue(op_icbi_64, MEMSUFFIX) (void) |
955 |
{ |
956 |
glue(do_icbi_64, MEMSUFFIX)(); |
957 |
RETURN(); |
958 |
} |
959 |
#endif
|
960 |
|
961 |
/* External access */
|
962 |
void OPPROTO glue(op_eciwx, MEMSUFFIX) (void) |
963 |
{ |
964 |
T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0); |
965 |
RETURN(); |
966 |
} |
967 |
|
968 |
#if defined(TARGET_PPC64)
|
969 |
void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void) |
970 |
{ |
971 |
T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0); |
972 |
RETURN(); |
973 |
} |
974 |
#endif
|
975 |
|
976 |
void OPPROTO glue(op_ecowx, MEMSUFFIX) (void) |
977 |
{ |
978 |
glue(stl, MEMSUFFIX)((uint32_t)T0, T1); |
979 |
RETURN(); |
980 |
} |
981 |
|
982 |
#if defined(TARGET_PPC64)
|
983 |
void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void) |
984 |
{ |
985 |
glue(stl, MEMSUFFIX)((uint64_t)T0, T1); |
986 |
RETURN(); |
987 |
} |
988 |
#endif
|
989 |
|
990 |
void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void) |
991 |
{ |
992 |
T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0); |
993 |
RETURN(); |
994 |
} |
995 |
|
996 |
#if defined(TARGET_PPC64)
|
997 |
void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void) |
998 |
{ |
999 |
T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0); |
1000 |
RETURN(); |
1001 |
} |
1002 |
#endif
|
1003 |
|
1004 |
void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void) |
1005 |
{ |
1006 |
glue(st32r, MEMSUFFIX)((uint32_t)T0, T1); |
1007 |
RETURN(); |
1008 |
} |
1009 |
|
1010 |
#if defined(TARGET_PPC64)
|
1011 |
void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void) |
1012 |
{ |
1013 |
glue(st32r, MEMSUFFIX)((uint64_t)T0, T1); |
1014 |
RETURN(); |
1015 |
} |
1016 |
#endif
|
1017 |
|
1018 |
/* XXX: those micro-ops need tests ! */
|
1019 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
1020 |
void OPPROTO glue(op_POWER_lscbx, MEMSUFFIX) (void) |
1021 |
{ |
1022 |
/* When byte count is 0, do nothing */
|
1023 |
if (likely(T1 != 0)) { |
1024 |
glue(do_POWER_lscbx, MEMSUFFIX)(PARAM1, PARAM2, PARAM3); |
1025 |
} |
1026 |
RETURN(); |
1027 |
} |
1028 |
|
1029 |
/* POWER2 quad load and store */
|
1030 |
/* XXX: TAGs are not managed */
|
1031 |
void OPPROTO glue(op_POWER2_lfq, MEMSUFFIX) (void) |
1032 |
{ |
1033 |
glue(do_POWER2_lfq, MEMSUFFIX)(); |
1034 |
RETURN(); |
1035 |
} |
1036 |
|
1037 |
void glue(op_POWER2_lfq_le, MEMSUFFIX) (void) |
1038 |
{ |
1039 |
glue(do_POWER2_lfq_le, MEMSUFFIX)(); |
1040 |
RETURN(); |
1041 |
} |
1042 |
|
1043 |
void OPPROTO glue(op_POWER2_stfq, MEMSUFFIX) (void) |
1044 |
{ |
1045 |
glue(do_POWER2_stfq, MEMSUFFIX)(); |
1046 |
RETURN(); |
1047 |
} |
1048 |
|
1049 |
void OPPROTO glue(op_POWER2_stfq_le, MEMSUFFIX) (void) |
1050 |
{ |
1051 |
glue(do_POWER2_stfq_le, MEMSUFFIX)(); |
1052 |
RETURN(); |
1053 |
} |
1054 |
|
1055 |
#if defined(TARGET_PPCEMB)
|
1056 |
/* SPE extension */
|
1057 |
#define _PPC_SPE_LD_OP(name, op) \
|
1058 |
void OPPROTO glue(glue(op_spe_l, name), MEMSUFFIX) (void) \ |
1059 |
{ \ |
1060 |
T1_64 = glue(op, MEMSUFFIX)((uint32_t)T0); \ |
1061 |
RETURN(); \ |
1062 |
} |
1063 |
|
1064 |
#if defined(TARGET_PPC64)
|
1065 |
#define _PPC_SPE_LD_OP_64(name, op) \
|
1066 |
void OPPROTO glue(glue(glue(op_spe_l, name), _64), MEMSUFFIX) (void) \ |
1067 |
{ \ |
1068 |
T1_64 = glue(op, MEMSUFFIX)((uint64_t)T0); \ |
1069 |
RETURN(); \ |
1070 |
} |
1071 |
#define PPC_SPE_LD_OP(name, op) \
|
1072 |
_PPC_SPE_LD_OP(name, op); \ |
1073 |
_PPC_SPE_LD_OP_64(name, op) |
1074 |
#else
|
1075 |
#define PPC_SPE_LD_OP(name, op) \
|
1076 |
_PPC_SPE_LD_OP(name, op) |
1077 |
#endif
|
1078 |
|
1079 |
|
1080 |
#define _PPC_SPE_ST_OP(name, op) \
|
1081 |
void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \ |
1082 |
{ \ |
1083 |
glue(op, MEMSUFFIX)((uint32_t)T0, T1_64); \ |
1084 |
RETURN(); \ |
1085 |
} |
1086 |
|
1087 |
#if defined(TARGET_PPC64)
|
1088 |
#define _PPC_SPE_ST_OP_64(name, op) \
|
1089 |
void OPPROTO glue(glue(glue(op_spe_st, name), _64), MEMSUFFIX) (void) \ |
1090 |
{ \ |
1091 |
glue(op, MEMSUFFIX)((uint64_t)T0, T1_64); \ |
1092 |
RETURN(); \ |
1093 |
} |
1094 |
#define PPC_SPE_ST_OP(name, op) \
|
1095 |
_PPC_SPE_ST_OP(name, op); \ |
1096 |
_PPC_SPE_ST_OP_64(name, op) |
1097 |
#else
|
1098 |
#define PPC_SPE_ST_OP(name, op) \
|
1099 |
_PPC_SPE_ST_OP(name, op) |
1100 |
#endif
|
1101 |
|
1102 |
#if !defined(TARGET_PPC64)
|
1103 |
PPC_SPE_LD_OP(dd, ldq); |
1104 |
PPC_SPE_ST_OP(dd, stq); |
1105 |
PPC_SPE_LD_OP(dd_le, ld64r); |
1106 |
PPC_SPE_ST_OP(dd_le, st64r); |
1107 |
#endif
|
1108 |
static inline uint64_t glue(spe_ldw, MEMSUFFIX) (target_ulong EA) |
1109 |
{ |
1110 |
uint64_t ret; |
1111 |
ret = (uint64_t)glue(ldl, MEMSUFFIX)(EA) << 32;
|
1112 |
ret |= (uint64_t)glue(ldl, MEMSUFFIX)(EA + 4);
|
1113 |
return ret;
|
1114 |
} |
1115 |
PPC_SPE_LD_OP(dw, spe_ldw); |
1116 |
static inline void glue(spe_stdw, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1117 |
{ |
1118 |
glue(stl, MEMSUFFIX)(EA, data >> 32);
|
1119 |
glue(stl, MEMSUFFIX)(EA + 4, data);
|
1120 |
} |
1121 |
PPC_SPE_ST_OP(dw, spe_stdw); |
1122 |
static inline uint64_t glue(spe_ldw_le, MEMSUFFIX) (target_ulong EA) |
1123 |
{ |
1124 |
uint64_t ret; |
1125 |
ret = (uint64_t)glue(ld32r, MEMSUFFIX)(EA) << 32;
|
1126 |
ret |= (uint64_t)glue(ld32r, MEMSUFFIX)(EA + 4);
|
1127 |
return ret;
|
1128 |
} |
1129 |
PPC_SPE_LD_OP(dw_le, spe_ldw_le); |
1130 |
static inline void glue(spe_stdw_le, MEMSUFFIX) (target_ulong EA, |
1131 |
uint64_t data) |
1132 |
{ |
1133 |
glue(st32r, MEMSUFFIX)(EA, data >> 32);
|
1134 |
glue(st32r, MEMSUFFIX)(EA + 4, data);
|
1135 |
} |
1136 |
PPC_SPE_ST_OP(dw_le, spe_stdw_le); |
1137 |
static inline uint64_t glue(spe_ldh, MEMSUFFIX) (target_ulong EA) |
1138 |
{ |
1139 |
uint64_t ret; |
1140 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 48;
|
1141 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2) << 32; |
1142 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 4) << 16; |
1143 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 6);
|
1144 |
return ret;
|
1145 |
} |
1146 |
PPC_SPE_LD_OP(dh, spe_ldh); |
1147 |
static inline void glue(spe_stdh, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1148 |
{ |
1149 |
glue(stw, MEMSUFFIX)(EA, data >> 48);
|
1150 |
glue(stw, MEMSUFFIX)(EA + 2, data >> 32); |
1151 |
glue(stw, MEMSUFFIX)(EA + 4, data >> 16); |
1152 |
glue(stw, MEMSUFFIX)(EA + 6, data);
|
1153 |
} |
1154 |
PPC_SPE_ST_OP(dh, spe_stdh); |
1155 |
static inline uint64_t glue(spe_ldh_le, MEMSUFFIX) (target_ulong EA) |
1156 |
{ |
1157 |
uint64_t ret; |
1158 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 48;
|
1159 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2) << 32; |
1160 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 4) << 16; |
1161 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 6);
|
1162 |
return ret;
|
1163 |
} |
1164 |
PPC_SPE_LD_OP(dh_le, spe_ldh_le); |
1165 |
static inline void glue(spe_stdh_le, MEMSUFFIX) (target_ulong EA, |
1166 |
uint64_t data) |
1167 |
{ |
1168 |
glue(st16r, MEMSUFFIX)(EA, data >> 48);
|
1169 |
glue(st16r, MEMSUFFIX)(EA + 2, data >> 32); |
1170 |
glue(st16r, MEMSUFFIX)(EA + 4, data >> 16); |
1171 |
glue(st16r, MEMSUFFIX)(EA + 6, data);
|
1172 |
} |
1173 |
PPC_SPE_ST_OP(dh_le, spe_stdh_le); |
1174 |
static inline uint64_t glue(spe_lwhe, MEMSUFFIX) (target_ulong EA) |
1175 |
{ |
1176 |
uint64_t ret; |
1177 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 48;
|
1178 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2) << 16; |
1179 |
return ret;
|
1180 |
} |
1181 |
PPC_SPE_LD_OP(whe, spe_lwhe); |
1182 |
static inline void glue(spe_stwhe, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1183 |
{ |
1184 |
glue(stw, MEMSUFFIX)(EA, data >> 48);
|
1185 |
glue(stw, MEMSUFFIX)(EA + 2, data >> 16); |
1186 |
} |
1187 |
PPC_SPE_ST_OP(whe, spe_stwhe); |
1188 |
static inline uint64_t glue(spe_lwhe_le, MEMSUFFIX) (target_ulong EA) |
1189 |
{ |
1190 |
uint64_t ret; |
1191 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 48;
|
1192 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2) << 16; |
1193 |
return ret;
|
1194 |
} |
1195 |
PPC_SPE_LD_OP(whe_le, spe_lwhe_le); |
1196 |
static inline void glue(spe_stwhe_le, MEMSUFFIX) (target_ulong EA, |
1197 |
uint64_t data) |
1198 |
{ |
1199 |
glue(st16r, MEMSUFFIX)(EA, data >> 48);
|
1200 |
glue(st16r, MEMSUFFIX)(EA + 2, data >> 16); |
1201 |
} |
1202 |
PPC_SPE_ST_OP(whe_le, spe_stwhe_le); |
1203 |
static inline uint64_t glue(spe_lwhou, MEMSUFFIX) (target_ulong EA) |
1204 |
{ |
1205 |
uint64_t ret; |
1206 |
ret = (uint64_t)glue(lduw, MEMSUFFIX)(EA) << 32;
|
1207 |
ret |= (uint64_t)glue(lduw, MEMSUFFIX)(EA + 2);
|
1208 |
return ret;
|
1209 |
} |
1210 |
PPC_SPE_LD_OP(whou, spe_lwhou); |
1211 |
static inline uint64_t glue(spe_lwhos, MEMSUFFIX) (target_ulong EA) |
1212 |
{ |
1213 |
uint64_t ret; |
1214 |
ret = ((uint64_t)((int32_t)glue(ldsw, MEMSUFFIX)(EA))) << 32;
|
1215 |
ret |= (uint64_t)((int32_t)glue(ldsw, MEMSUFFIX)(EA + 2));
|
1216 |
return ret;
|
1217 |
} |
1218 |
PPC_SPE_LD_OP(whos, spe_lwhos); |
1219 |
static inline void glue(spe_stwho, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1220 |
{ |
1221 |
glue(stw, MEMSUFFIX)(EA, data >> 32);
|
1222 |
glue(stw, MEMSUFFIX)(EA + 2, data);
|
1223 |
} |
1224 |
PPC_SPE_ST_OP(who, spe_stwho); |
1225 |
static inline uint64_t glue(spe_lwhou_le, MEMSUFFIX) (target_ulong EA) |
1226 |
{ |
1227 |
uint64_t ret; |
1228 |
ret = (uint64_t)glue(ld16r, MEMSUFFIX)(EA) << 32;
|
1229 |
ret |= (uint64_t)glue(ld16r, MEMSUFFIX)(EA + 2);
|
1230 |
return ret;
|
1231 |
} |
1232 |
PPC_SPE_LD_OP(whou_le, spe_lwhou_le); |
1233 |
static inline uint64_t glue(spe_lwhos_le, MEMSUFFIX) (target_ulong EA) |
1234 |
{ |
1235 |
uint64_t ret; |
1236 |
ret = ((uint64_t)((int32_t)glue(ld16rs, MEMSUFFIX)(EA))) << 32;
|
1237 |
ret |= (uint64_t)((int32_t)glue(ld16rs, MEMSUFFIX)(EA + 2));
|
1238 |
return ret;
|
1239 |
} |
1240 |
PPC_SPE_LD_OP(whos_le, spe_lwhos_le); |
1241 |
static inline void glue(spe_stwho_le, MEMSUFFIX) (target_ulong EA, |
1242 |
uint64_t data) |
1243 |
{ |
1244 |
glue(st16r, MEMSUFFIX)(EA, data >> 32);
|
1245 |
glue(st16r, MEMSUFFIX)(EA + 2, data);
|
1246 |
} |
1247 |
PPC_SPE_ST_OP(who_le, spe_stwho_le); |
1248 |
#if !defined(TARGET_PPC64)
|
1249 |
static inline void glue(spe_stwwo, MEMSUFFIX) (target_ulong EA, uint64_t data) |
1250 |
{ |
1251 |
glue(stl, MEMSUFFIX)(EA, data); |
1252 |
} |
1253 |
PPC_SPE_ST_OP(wwo, spe_stwwo); |
1254 |
static inline void glue(spe_stwwo_le, MEMSUFFIX) (target_ulong EA, |
1255 |
uint64_t data) |
1256 |
{ |
1257 |
glue(st32r, MEMSUFFIX)(EA, data); |
1258 |
} |
1259 |
PPC_SPE_ST_OP(wwo_le, spe_stwwo_le); |
1260 |
#endif
|
1261 |
static inline uint64_t glue(spe_lh, MEMSUFFIX) (target_ulong EA) |
1262 |
{ |
1263 |
uint16_t tmp; |
1264 |
tmp = glue(lduw, MEMSUFFIX)(EA); |
1265 |
return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16); |
1266 |
} |
1267 |
PPC_SPE_LD_OP(h, spe_lh); |
1268 |
static inline uint64_t glue(spe_lh_le, MEMSUFFIX) (target_ulong EA) |
1269 |
{ |
1270 |
uint16_t tmp; |
1271 |
tmp = glue(ld16r, MEMSUFFIX)(EA); |
1272 |
return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16); |
1273 |
} |
1274 |
PPC_SPE_LD_OP(h_le, spe_lh_le); |
1275 |
static inline uint64_t glue(spe_lwwsplat, MEMSUFFIX) (target_ulong EA) |
1276 |
{ |
1277 |
uint32_t tmp; |
1278 |
tmp = glue(ldl, MEMSUFFIX)(EA); |
1279 |
return ((uint64_t)tmp << 32) | (uint64_t)tmp; |
1280 |
} |
1281 |
PPC_SPE_LD_OP(wwsplat, spe_lwwsplat); |
1282 |
static inline uint64_t glue(spe_lwwsplat_le, MEMSUFFIX) (target_ulong EA) |
1283 |
{ |
1284 |
uint32_t tmp; |
1285 |
tmp = glue(ld32r, MEMSUFFIX)(EA); |
1286 |
return ((uint64_t)tmp << 32) | (uint64_t)tmp; |
1287 |
} |
1288 |
PPC_SPE_LD_OP(wwsplat_le, spe_lwwsplat_le); |
1289 |
static inline uint64_t glue(spe_lwhsplat, MEMSUFFIX) (target_ulong EA) |
1290 |
{ |
1291 |
uint64_t ret; |
1292 |
uint16_t tmp; |
1293 |
tmp = glue(lduw, MEMSUFFIX)(EA); |
1294 |
ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32); |
1295 |
tmp = glue(lduw, MEMSUFFIX)(EA + 2);
|
1296 |
ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
|
1297 |
return ret;
|
1298 |
} |
1299 |
PPC_SPE_LD_OP(whsplat, spe_lwhsplat); |
1300 |
static inline uint64_t glue(spe_lwhsplat_le, MEMSUFFIX) (target_ulong EA) |
1301 |
{ |
1302 |
uint64_t ret; |
1303 |
uint16_t tmp; |
1304 |
tmp = glue(ld16r, MEMSUFFIX)(EA); |
1305 |
ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32); |
1306 |
tmp = glue(ld16r, MEMSUFFIX)(EA + 2);
|
1307 |
ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
|
1308 |
return ret;
|
1309 |
} |
1310 |
PPC_SPE_LD_OP(whsplat_le, spe_lwhsplat_le); |
1311 |
#endif /* defined(TARGET_PPCEMB) */ |
1312 |
|
1313 |
#undef MEMSUFFIX
|