root / target-microblaze / mmu.h @ 130c57c0
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1 | afeeceb0 | Edgar E. Iglesias | /*
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2 | afeeceb0 | Edgar E. Iglesias | * Microblaze MMU emulation for qemu.
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3 | afeeceb0 | Edgar E. Iglesias | *
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4 | afeeceb0 | Edgar E. Iglesias | * Copyright (c) 2009 Edgar E. Iglesias
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5 | afeeceb0 | Edgar E. Iglesias | *
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6 | afeeceb0 | Edgar E. Iglesias | * This library is free software; you can redistribute it and/or
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7 | afeeceb0 | Edgar E. Iglesias | * modify it under the terms of the GNU Lesser General Public
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8 | afeeceb0 | Edgar E. Iglesias | * License as published by the Free Software Foundation; either
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9 | afeeceb0 | Edgar E. Iglesias | * version 2 of the License, or (at your option) any later version.
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10 | afeeceb0 | Edgar E. Iglesias | *
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11 | afeeceb0 | Edgar E. Iglesias | * This library is distributed in the hope that it will be useful,
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12 | afeeceb0 | Edgar E. Iglesias | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | afeeceb0 | Edgar E. Iglesias | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | afeeceb0 | Edgar E. Iglesias | * Lesser General Public License for more details.
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15 | afeeceb0 | Edgar E. Iglesias | *
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16 | afeeceb0 | Edgar E. Iglesias | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | afeeceb0 | Edgar E. Iglesias | */
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19 | afeeceb0 | Edgar E. Iglesias | |
20 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_PID 0 |
21 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_ZPR 1 |
22 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_TLBX 2 |
23 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_TLBLO 3 |
24 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_TLBHI 4 |
25 | afeeceb0 | Edgar E. Iglesias | #define MMU_R_TLBSX 5 |
26 | afeeceb0 | Edgar E. Iglesias | |
27 | afeeceb0 | Edgar E. Iglesias | #define RAM_DATA 1 |
28 | afeeceb0 | Edgar E. Iglesias | #define RAM_TAG 0 |
29 | afeeceb0 | Edgar E. Iglesias | |
30 | afeeceb0 | Edgar E. Iglesias | /* Tag portion */
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31 | afeeceb0 | Edgar E. Iglesias | #define TLB_EPN_MASK 0xFFFFFC00 /* Effective Page Number */ |
32 | afeeceb0 | Edgar E. Iglesias | #define TLB_PAGESZ_MASK 0x00000380 |
33 | afeeceb0 | Edgar E. Iglesias | #define TLB_PAGESZ(x) (((x) & 0x7) << 7) |
34 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_1K 0 |
35 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_4K 1 |
36 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_16K 2 |
37 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_64K 3 |
38 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_256K 4 |
39 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_1M 5 |
40 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_4M 6 |
41 | afeeceb0 | Edgar E. Iglesias | #define PAGESZ_16M 7 |
42 | afeeceb0 | Edgar E. Iglesias | #define TLB_VALID 0x00000040 /* Entry is valid */ |
43 | afeeceb0 | Edgar E. Iglesias | |
44 | afeeceb0 | Edgar E. Iglesias | /* Data portion */
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45 | afeeceb0 | Edgar E. Iglesias | #define TLB_RPN_MASK 0xFFFFFC00 /* Real Page Number */ |
46 | afeeceb0 | Edgar E. Iglesias | #define TLB_PERM_MASK 0x00000300 |
47 | afeeceb0 | Edgar E. Iglesias | #define TLB_EX 0x00000200 /* Instruction execution allowed */ |
48 | afeeceb0 | Edgar E. Iglesias | #define TLB_WR 0x00000100 /* Writes permitted */ |
49 | afeeceb0 | Edgar E. Iglesias | #define TLB_ZSEL_MASK 0x000000F0 |
50 | afeeceb0 | Edgar E. Iglesias | #define TLB_ZSEL(x) (((x) & 0xF) << 4) |
51 | afeeceb0 | Edgar E. Iglesias | #define TLB_ATTR_MASK 0x0000000F |
52 | afeeceb0 | Edgar E. Iglesias | #define TLB_W 0x00000008 /* Caching is write-through */ |
53 | afeeceb0 | Edgar E. Iglesias | #define TLB_I 0x00000004 /* Caching is inhibited */ |
54 | afeeceb0 | Edgar E. Iglesias | #define TLB_M 0x00000002 /* Memory is coherent */ |
55 | afeeceb0 | Edgar E. Iglesias | #define TLB_G 0x00000001 /* Memory is guarded from prefetch */ |
56 | afeeceb0 | Edgar E. Iglesias | |
57 | afeeceb0 | Edgar E. Iglesias | #define TLB_ENTRIES 64 |
58 | afeeceb0 | Edgar E. Iglesias | |
59 | afeeceb0 | Edgar E. Iglesias | struct microblaze_mmu
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60 | afeeceb0 | Edgar E. Iglesias | { |
61 | afeeceb0 | Edgar E. Iglesias | /* Data and tag brams. */
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62 | afeeceb0 | Edgar E. Iglesias | uint32_t rams[2][TLB_ENTRIES];
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63 | afeeceb0 | Edgar E. Iglesias | /* We keep a separate ram for the tids to avoid the 48 bit tag width. */
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64 | afeeceb0 | Edgar E. Iglesias | uint8_t tids[TLB_ENTRIES]; |
65 | afeeceb0 | Edgar E. Iglesias | /* Control flops. */
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66 | 3c50a71f | Edgar E. Iglesias | uint32_t regs[8];
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67 | 3c50a71f | Edgar E. Iglesias | |
68 | 3c50a71f | Edgar E. Iglesias | int c_mmu;
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69 | 3c50a71f | Edgar E. Iglesias | int c_mmu_tlb_access;
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70 | 3c50a71f | Edgar E. Iglesias | int c_mmu_zones;
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71 | afeeceb0 | Edgar E. Iglesias | }; |
72 | afeeceb0 | Edgar E. Iglesias | |
73 | afeeceb0 | Edgar E. Iglesias | struct microblaze_mmu_lookup
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74 | afeeceb0 | Edgar E. Iglesias | { |
75 | afeeceb0 | Edgar E. Iglesias | uint32_t paddr; |
76 | afeeceb0 | Edgar E. Iglesias | uint32_t vaddr; |
77 | afeeceb0 | Edgar E. Iglesias | unsigned int size; |
78 | afeeceb0 | Edgar E. Iglesias | unsigned int idx; |
79 | afeeceb0 | Edgar E. Iglesias | int prot;
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80 | afeeceb0 | Edgar E. Iglesias | enum {
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81 | afeeceb0 | Edgar E. Iglesias | ERR_PROT, ERR_MISS, ERR_HIT |
82 | afeeceb0 | Edgar E. Iglesias | } err; |
83 | afeeceb0 | Edgar E. Iglesias | }; |
84 | afeeceb0 | Edgar E. Iglesias | |
85 | 68cee38a | Andreas Färber | void mmu_flip_um(CPUMBState *env, unsigned int um); |
86 | afeeceb0 | Edgar E. Iglesias | unsigned int mmu_translate(struct microblaze_mmu *mmu, |
87 | afeeceb0 | Edgar E. Iglesias | struct microblaze_mmu_lookup *lu,
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88 | afeeceb0 | Edgar E. Iglesias | target_ulong vaddr, int rw, int mmu_idx); |
89 | 68cee38a | Andreas Färber | uint32_t mmu_read(CPUMBState *env, uint32_t rn); |
90 | 68cee38a | Andreas Färber | void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v);
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91 | afeeceb0 | Edgar E. Iglesias | void mmu_init(struct microblaze_mmu *mmu); |