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/*
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 * ARM kernel loader.
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 *
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 * Copyright (c) 2006-2007 CodeSourcery.
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 * Written by Paul Brook
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 *
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 * This code is licensed under the GPL.
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 */
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#include "config.h"
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#include "hw.h"
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#include "arm-misc.h"
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#include "sysemu.h"
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#include "boards.h"
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#include "loader.h"
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#include "elf.h"
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#include "device_tree.h"
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#define KERNEL_ARGS_ADDR 0x100
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#define KERNEL_LOAD_ADDR 0x00010000
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#define INITRD_LOAD_ADDR 0x00d00000
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/* The worlds second smallest bootloader.  Set r0-r2, then jump to kernel.  */
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static uint32_t bootloader[] = {
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  0xe3a00000, /* mov     r0, #0 */
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  0xe59f1004, /* ldr     r1, [pc, #4] */
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  0xe59f2004, /* ldr     r2, [pc, #4] */
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  0xe59ff004, /* ldr     pc, [pc, #4] */
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  0, /* Board ID */
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  0, /* Address of kernel args.  Set by integratorcp_init.  */
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  0  /* Kernel entry point.  Set by integratorcp_init.  */
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};
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/* Handling for secondary CPU boot in a multicore system.
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 * Unlike the uniprocessor/primary CPU boot, this is platform
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 * dependent. The default code here is based on the secondary
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 * CPU boot protocol used on realview/vexpress boards, with
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 * some parameterisation to increase its flexibility.
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 * QEMU platform models for which this code is not appropriate
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 * should override write_secondary_boot and secondary_cpu_reset_hook
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 * instead.
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 *
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 * This code enables the interrupt controllers for the secondary
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 * CPUs and then puts all the secondary CPUs into a loop waiting
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 * for an interprocessor interrupt and polling a configurable
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 * location for the kernel secondary CPU entry point.
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 */
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static uint32_t smpboot[] = {
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  0xe59f201c, /* ldr r2, gic_cpu_if */
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  0xe59f001c, /* ldr r0, startaddr */
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  0xe3a01001, /* mov r1, #1 */
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  0xe5821000, /* str r1, [r2] */
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  0xe320f003, /* wfi */
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  0xe5901000, /* ldr     r1, [r0] */
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  0xe1110001, /* tst     r1, r1 */
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  0x0afffffb, /* beq     <wfi> */
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  0xe12fff11, /* bx      r1 */
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  0,          /* gic_cpu_if: base address of GIC CPU interface */
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  0           /* bootreg: Boot register address is held here */
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};
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static void default_write_secondary(CPUARMState *env,
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                                    const struct arm_boot_info *info)
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{
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    int n;
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    smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
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    smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
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    for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
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        smpboot[n] = tswap32(smpboot[n]);
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    }
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    rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
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                       info->smp_loader_start);
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}
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static void default_reset_secondary(CPUARMState *env,
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                                    const struct arm_boot_info *info)
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{
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    stl_phys_notdirty(info->smp_bootreg_addr, 0);
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    env->regs[15] = info->smp_loader_start;
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}
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#define WRITE_WORD(p, value) do { \
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    stl_phys_notdirty(p, value);  \
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    p += 4;                       \
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} while (0)
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static void set_kernel_args(const struct arm_boot_info *info)
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{
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    int initrd_size = info->initrd_size;
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    target_phys_addr_t base = info->loader_start;
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    target_phys_addr_t p;
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    p = base + KERNEL_ARGS_ADDR;
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    /* ATAG_CORE */
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    WRITE_WORD(p, 5);
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    WRITE_WORD(p, 0x54410001);
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    WRITE_WORD(p, 1);
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    WRITE_WORD(p, 0x1000);
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    WRITE_WORD(p, 0);
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    /* ATAG_MEM */
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    /* TODO: handle multiple chips on one ATAG list */
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    WRITE_WORD(p, 4);
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    WRITE_WORD(p, 0x54410002);
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    WRITE_WORD(p, info->ram_size);
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    WRITE_WORD(p, info->loader_start);
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    if (initrd_size) {
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        /* ATAG_INITRD2 */
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        WRITE_WORD(p, 4);
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        WRITE_WORD(p, 0x54420005);
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        WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
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        WRITE_WORD(p, initrd_size);
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    }
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    if (info->kernel_cmdline && *info->kernel_cmdline) {
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        /* ATAG_CMDLINE */
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        int cmdline_size;
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        cmdline_size = strlen(info->kernel_cmdline);
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        cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
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                                  cmdline_size + 1);
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        cmdline_size = (cmdline_size >> 2) + 1;
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        WRITE_WORD(p, cmdline_size + 2);
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        WRITE_WORD(p, 0x54410009);
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        p += cmdline_size * 4;
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    }
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    if (info->atag_board) {
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        /* ATAG_BOARD */
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        int atag_board_len;
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        uint8_t atag_board_buf[0x1000];
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        atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
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        WRITE_WORD(p, (atag_board_len + 8) >> 2);
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        WRITE_WORD(p, 0x414f4d50);
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        cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
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        p += atag_board_len;
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    }
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    /* ATAG_END */
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    WRITE_WORD(p, 0);
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    WRITE_WORD(p, 0);
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}
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static void set_kernel_args_old(const struct arm_boot_info *info)
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{
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    target_phys_addr_t p;
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    const char *s;
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    int initrd_size = info->initrd_size;
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    target_phys_addr_t base = info->loader_start;
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    /* see linux/include/asm-arm/setup.h */
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    p = base + KERNEL_ARGS_ADDR;
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    /* page_size */
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    WRITE_WORD(p, 4096);
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    /* nr_pages */
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    WRITE_WORD(p, info->ram_size / 4096);
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    /* ramdisk_size */
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    WRITE_WORD(p, 0);
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#define FLAG_READONLY        1
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#define FLAG_RDLOAD        4
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#define FLAG_RDPROMPT        8
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    /* flags */
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    WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
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    /* rootdev */
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    WRITE_WORD(p, (31 << 8) | 0);        /* /dev/mtdblock0 */
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    /* video_num_cols */
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    WRITE_WORD(p, 0);
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    /* video_num_rows */
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    WRITE_WORD(p, 0);
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    /* video_x */
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    WRITE_WORD(p, 0);
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    /* video_y */
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    WRITE_WORD(p, 0);
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    /* memc_control_reg */
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    WRITE_WORD(p, 0);
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    /* unsigned char sounddefault */
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    /* unsigned char adfsdrives */
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    /* unsigned char bytes_per_char_h */
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    /* unsigned char bytes_per_char_v */
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    WRITE_WORD(p, 0);
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    /* pages_in_bank[4] */
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    WRITE_WORD(p, 0);
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    WRITE_WORD(p, 0);
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    WRITE_WORD(p, 0);
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    WRITE_WORD(p, 0);
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    /* pages_in_vram */
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    WRITE_WORD(p, 0);
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    /* initrd_start */
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    if (initrd_size)
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        WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
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    else
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        WRITE_WORD(p, 0);
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    /* initrd_size */
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    WRITE_WORD(p, initrd_size);
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    /* rd_start */
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    WRITE_WORD(p, 0);
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    /* system_rev */
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    WRITE_WORD(p, 0);
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    /* system_serial_low */
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    WRITE_WORD(p, 0);
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    /* system_serial_high */
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    WRITE_WORD(p, 0);
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    /* mem_fclk_21285 */
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    WRITE_WORD(p, 0);
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    /* zero unused fields */
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    while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
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        WRITE_WORD(p, 0);
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    }
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    s = info->kernel_cmdline;
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    if (s) {
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        cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
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    } else {
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        WRITE_WORD(p, 0);
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    }
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}
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static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
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{
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#ifdef CONFIG_FDT
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    uint32_t mem_reg_property[] = { cpu_to_be32(binfo->loader_start),
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                                    cpu_to_be32(binfo->ram_size) };
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    void *fdt = NULL;
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    char *filename;
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    int size, rc;
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    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
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    if (!filename) {
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        fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
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        return -1;
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    }
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    fdt = load_device_tree(filename, &size);
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    if (!fdt) {
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        fprintf(stderr, "Couldn't open dtb file %s\n", filename);
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        g_free(filename);
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        return -1;
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    }
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    g_free(filename);
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    rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
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                               sizeof(mem_reg_property));
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    if (rc < 0) {
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        fprintf(stderr, "couldn't set /memory/reg\n");
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    }
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    rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
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                                      binfo->kernel_cmdline);
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    if (rc < 0) {
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        fprintf(stderr, "couldn't set /chosen/bootargs\n");
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    }
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    if (binfo->initrd_size) {
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        rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
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                binfo->loader_start + INITRD_LOAD_ADDR);
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        if (rc < 0) {
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            fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
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        }
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        rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
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                    binfo->loader_start + INITRD_LOAD_ADDR +
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                    binfo->initrd_size);
259
        if (rc < 0) {
260
            fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
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        }
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    }
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    cpu_physical_memory_write(addr, fdt, size);
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266
    return 0;
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#else
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    fprintf(stderr, "Device tree requested, "
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                "but qemu was compiled without fdt support\n");
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    return -1;
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#endif
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}
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static void do_cpu_reset(void *opaque)
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{
277
    CPUARMState *env = opaque;
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    const struct arm_boot_info *info = env->boot_info;
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280
    cpu_state_reset(env);
281
    if (info) {
282
        if (!info->is_linux) {
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            /* Jump to the entry point.  */
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            env->regs[15] = info->entry & 0xfffffffe;
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            env->thumb = info->entry & 1;
286
        } else {
287
            if (env == first_cpu) {
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                env->regs[15] = info->loader_start;
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                if (!info->dtb_filename) {
290
                    if (old_param) {
291
                        set_kernel_args_old(info);
292
                    } else {
293
                        set_kernel_args(info);
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                    }
295
                }
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            } else {
297
                info->secondary_cpu_reset_hook(env, info);
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            }
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        }
300
    }
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}
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303
void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
304
{
305
    int kernel_size;
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    int initrd_size;
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    int n;
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    int is_linux = 0;
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    uint64_t elf_entry;
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    target_phys_addr_t entry;
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    int big_endian;
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    QemuOpts *machine_opts;
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314
    /* Load the kernel.  */
315
    if (!info->kernel_filename) {
316
        fprintf(stderr, "Kernel image must be specified\n");
317
        exit(1);
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    }
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320
    machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
321
    if (machine_opts) {
322
        info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
323
    } else {
324
        info->dtb_filename = NULL;
325
    }
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327
    if (!info->secondary_cpu_reset_hook) {
328
        info->secondary_cpu_reset_hook = default_reset_secondary;
329
    }
330
    if (!info->write_secondary_boot) {
331
        info->write_secondary_boot = default_write_secondary;
332
    }
333

    
334
    if (info->nb_cpus == 0)
335
        info->nb_cpus = 1;
336

    
337
#ifdef TARGET_WORDS_BIGENDIAN
338
    big_endian = 1;
339
#else
340
    big_endian = 0;
341
#endif
342

    
343
    /* Assume that raw images are linux kernels, and ELF images are not.  */
344
    kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
345
                           NULL, NULL, big_endian, ELF_MACHINE, 1);
346
    entry = elf_entry;
347
    if (kernel_size < 0) {
348
        kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
349
                                  &is_linux);
350
    }
351
    if (kernel_size < 0) {
352
        entry = info->loader_start + KERNEL_LOAD_ADDR;
353
        kernel_size = load_image_targphys(info->kernel_filename, entry,
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                                          ram_size - KERNEL_LOAD_ADDR);
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        is_linux = 1;
356
    }
357
    if (kernel_size < 0) {
358
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
359
                info->kernel_filename);
360
        exit(1);
361
    }
362
    info->entry = entry;
363
    if (is_linux) {
364
        if (info->initrd_filename) {
365
            initrd_size = load_image_targphys(info->initrd_filename,
366
                                              info->loader_start
367
                                              + INITRD_LOAD_ADDR,
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                                              ram_size - INITRD_LOAD_ADDR);
369
            if (initrd_size < 0) {
370
                fprintf(stderr, "qemu: could not load initrd '%s'\n",
371
                        info->initrd_filename);
372
                exit(1);
373
            }
374
        } else {
375
            initrd_size = 0;
376
        }
377
        info->initrd_size = initrd_size;
378

    
379
        bootloader[4] = info->board_id;
380

    
381
        /* for device tree boot, we pass the DTB directly in r2. Otherwise
382
         * we point to the kernel args.
383
         */
384
        if (info->dtb_filename) {
385
            /* Place the DTB after the initrd in memory */
386
            target_phys_addr_t dtb_start = TARGET_PAGE_ALIGN(info->loader_start
387
                                                             + INITRD_LOAD_ADDR
388
                                                             + initrd_size);
389
            if (load_dtb(dtb_start, info)) {
390
                exit(1);
391
            }
392
            bootloader[5] = dtb_start;
393
        } else {
394
            bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
395
        }
396
        bootloader[6] = entry;
397
        for (n = 0; n < sizeof(bootloader) / 4; n++) {
398
            bootloader[n] = tswap32(bootloader[n]);
399
        }
400
        rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
401
                           info->loader_start);
402
        if (info->nb_cpus > 1) {
403
            info->write_secondary_boot(env, info);
404
        }
405
    }
406
    info->is_linux = is_linux;
407

    
408
    for (; env; env = env->next_cpu) {
409
        env->boot_info = info;
410
        qemu_register_reset(do_cpu_reset, env);
411
    }
412
}