root / target-arm / machine.c @ 14a10fc3
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#include "hw/hw.h" |
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#include "hw/boards.h" |
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#include "sysemu/kvm.h" |
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#include "kvm_arm.h" |
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|
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static bool vfp_needed(void *opaque) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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|
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return arm_feature(env, ARM_FEATURE_VFP);
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} |
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static int get_fpscr(QEMUFile *f, void *opaque, size_t size) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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uint32_t val = qemu_get_be32(f); |
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|
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vfp_set_fpscr(env, val); |
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return 0; |
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} |
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|
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static void put_fpscr(QEMUFile *f, void *opaque, size_t size) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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|
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qemu_put_be32(f, vfp_get_fpscr(env)); |
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} |
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static const VMStateInfo vmstate_fpscr = { |
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.name = "fpscr",
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.get = get_fpscr, |
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.put = put_fpscr, |
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}; |
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static const VMStateDescription vmstate_vfp = { |
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.name = "cpu/vfp",
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.version_id = 2,
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.minimum_version_id = 2,
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.minimum_version_id_old = 2,
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.fields = (VMStateField[]) {
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VMSTATE_FLOAT64_ARRAY(env.vfp.regs, ARMCPU, 32),
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/* The xregs array is a little awkward because element 1 (FPSCR)
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* requires a specific accessor, so we have to split it up in
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* the vmstate:
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*/
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VMSTATE_UINT32(env.vfp.xregs[0], ARMCPU),
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VMSTATE_UINT32_SUB_ARRAY(env.vfp.xregs, ARMCPU, 2, 14), |
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{
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.name = "fpscr",
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.version_id = 0,
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.size = sizeof(uint32_t),
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.info = &vmstate_fpscr, |
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.flags = VMS_SINGLE, |
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.offset = 0,
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}, |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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static bool iwmmxt_needed(void *opaque) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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return arm_feature(env, ARM_FEATURE_IWMMXT);
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} |
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|
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static const VMStateDescription vmstate_iwmmxt = { |
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.name = "cpu/iwmmxt",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT64_ARRAY(env.iwmmxt.regs, ARMCPU, 16),
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VMSTATE_UINT32_ARRAY(env.iwmmxt.cregs, ARMCPU, 16),
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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static bool m_needed(void *opaque) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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return arm_feature(env, ARM_FEATURE_M);
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} |
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const VMStateDescription vmstate_m = {
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.name = "cpu/m",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(env.v7m.other_sp, ARMCPU), |
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VMSTATE_UINT32(env.v7m.vecbase, ARMCPU), |
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VMSTATE_UINT32(env.v7m.basepri, ARMCPU), |
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VMSTATE_UINT32(env.v7m.control, ARMCPU), |
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VMSTATE_INT32(env.v7m.current_sp, ARMCPU), |
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VMSTATE_INT32(env.v7m.exception, ARMCPU), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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static bool thumb2ee_needed(void *opaque) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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return arm_feature(env, ARM_FEATURE_THUMB2EE);
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} |
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static const VMStateDescription vmstate_thumb2ee = { |
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.name = "cpu/thumb2ee",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(env.teecr, ARMCPU), |
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VMSTATE_UINT32(env.teehbr, ARMCPU), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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static int get_cpsr(QEMUFile *f, void *opaque, size_t size) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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uint32_t val = qemu_get_be32(f); |
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/* Avoid mode switch when restoring CPSR */
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env->uncached_cpsr = val & CPSR_M; |
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cpsr_write(env, val, 0xffffffff);
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return 0; |
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} |
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static void put_cpsr(QEMUFile *f, void *opaque, size_t size) |
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{
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ARMCPU *cpu = opaque; |
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CPUARMState *env = &cpu->env; |
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qemu_put_be32(f, cpsr_read(env)); |
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} |
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static const VMStateInfo vmstate_cpsr = { |
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.name = "cpsr",
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.get = get_cpsr, |
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.put = put_cpsr, |
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}; |
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static void cpu_pre_save(void *opaque) |
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{
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ARMCPU *cpu = opaque; |
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if (kvm_enabled()) {
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if (!write_kvmstate_to_list(cpu)) {
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/* This should never fail */
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abort(); |
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} |
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} else {
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if (!write_cpustate_to_list(cpu)) {
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/* This should never fail. */
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abort(); |
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} |
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} |
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cpu->cpreg_vmstate_array_len = cpu->cpreg_array_len; |
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memcpy(cpu->cpreg_vmstate_indexes, cpu->cpreg_indexes, |
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cpu->cpreg_array_len * sizeof(uint64_t));
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memcpy(cpu->cpreg_vmstate_values, cpu->cpreg_values, |
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cpu->cpreg_array_len * sizeof(uint64_t));
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} |
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static int cpu_post_load(void *opaque, int version_id) |
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{
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ARMCPU *cpu = opaque; |
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int i, v;
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/* Update the values list from the incoming migration data.
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* Anything in the incoming data which we don't know about is
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* a migration failure; anything we know about but the incoming
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* data doesn't specify retains its current (reset) value.
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* The indexes list remains untouched -- we only inspect the
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* incoming migration index list so we can match the values array
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* entries with the right slots in our own values array.
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*/
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for (i = 0, v = 0; i < cpu->cpreg_array_len |
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&& v < cpu->cpreg_vmstate_array_len; i++) {
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if (cpu->cpreg_vmstate_indexes[v] > cpu->cpreg_indexes[i]) {
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/* register in our list but not incoming : skip it */
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continue;
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} |
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if (cpu->cpreg_vmstate_indexes[v] < cpu->cpreg_indexes[i]) {
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/* register in their list but not ours: fail migration */
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return -1; |
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} |
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/* matching register, copy the value over */
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cpu->cpreg_values[i] = cpu->cpreg_vmstate_values[v]; |
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v++; |
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} |
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if (kvm_enabled()) {
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if (!write_list_to_kvmstate(cpu)) {
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return -1; |
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} |
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/* Note that it's OK for the TCG side not to know about
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* every register in the list; KVM is authoritative if
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* we're using it.
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*/
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write_list_to_cpustate(cpu); |
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} else {
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if (!write_list_to_cpustate(cpu)) {
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return -1; |
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} |
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} |
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return 0; |
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} |
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const VMStateDescription vmstate_arm_cpu = {
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.name = "cpu",
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.version_id = 12,
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.minimum_version_id = 12,
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.minimum_version_id_old = 12,
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.pre_save = cpu_pre_save, |
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.post_load = cpu_post_load, |
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16),
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{
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.name = "cpsr",
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.version_id = 0,
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.size = sizeof(uint32_t),
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.info = &vmstate_cpsr, |
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.flags = VMS_SINGLE, |
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.offset = 0,
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}, |
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VMSTATE_UINT32(env.spsr, ARMCPU), |
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VMSTATE_UINT32_ARRAY(env.banked_spsr, ARMCPU, 6),
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VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
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VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
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VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
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VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5),
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/* The length-check must come before the arrays to avoid
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* incoming data possibly overflowing the array.
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*/
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VMSTATE_INT32_LE(cpreg_vmstate_array_len, ARMCPU), |
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VMSTATE_VARRAY_INT32(cpreg_vmstate_indexes, ARMCPU, |
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cpreg_vmstate_array_len, |
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0, vmstate_info_uint64, uint64_t),
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VMSTATE_VARRAY_INT32(cpreg_vmstate_values, ARMCPU, |
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cpreg_vmstate_array_len, |
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0, vmstate_info_uint64, uint64_t),
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VMSTATE_UINT32(env.exclusive_addr, ARMCPU), |
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VMSTATE_UINT32(env.exclusive_val, ARMCPU), |
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VMSTATE_UINT32(env.exclusive_high, ARMCPU), |
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VMSTATE_UINT64(env.features, ARMCPU), |
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VMSTATE_END_OF_LIST() |
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}, |
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.subsections = (VMStateSubsection[]) {
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{
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.vmsd = &vmstate_vfp, |
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.needed = vfp_needed, |
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} , {
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.vmsd = &vmstate_iwmmxt, |
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.needed = iwmmxt_needed, |
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} , {
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.vmsd = &vmstate_m, |
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.needed = m_needed, |
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} , {
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.vmsd = &vmstate_thumb2ee, |
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.needed = thumb2ee_needed, |
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} , {
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/* empty */
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} |
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} |
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}; |