root / target-sparc / exec.h @ 15342721
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#ifndef EXEC_SPARC_H
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#define EXEC_SPARC_H 1 |
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#include "config.h" |
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#include "dyngen-exec.h" |
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register struct CPUSPARCState *env asm(AREG0); |
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#ifdef TARGET_SPARC64
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#define T0 (env->t0)
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#define T2 (env->t2)
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#define REGWPTR env->regwptr
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#else
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register uint32_t T0 asm(AREG1); |
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#undef REG_REGWPTR // Broken |
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#ifdef REG_REGWPTR
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#if defined(__sparc__)
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register uint32_t *REGWPTR asm(AREG4); |
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#else
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register uint32_t *REGWPTR asm(AREG3); |
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#endif
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#define reg_REGWPTR
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#ifdef AREG4
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register uint32_t T2 asm(AREG4); |
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#define reg_T2
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#else
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#define T2 (env->t2)
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#endif
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#else
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#define REGWPTR env->regwptr
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register uint32_t T2 asm(AREG3); |
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#endif
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#define reg_T2
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#endif
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#define FT0 (env->ft0)
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#define FT1 (env->ft1)
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#define DT0 (env->dt0)
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#define DT1 (env->dt1)
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#if defined(CONFIG_USER_ONLY)
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#define QT0 (env->qt0)
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#define QT1 (env->qt1)
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#endif
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#include "cpu.h" |
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#include "exec-all.h" |
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void cpu_lock(void); |
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void cpu_unlock(void); |
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void cpu_loop_exit(void); |
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void set_cwp(int new_cwp); |
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void do_interrupt(int intno); |
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void memcpy32(target_ulong *dst, const target_ulong *src); |
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target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
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void dump_mmu(CPUState *env);
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/* XXX: move that to a generic header */
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h" |
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#endif /* !defined(CONFIG_USER_ONLY) */ |
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static inline void env_to_regs(void) |
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{ |
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#if defined(reg_REGWPTR)
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REGWPTR = env->regbase + (env->cwp * 16);
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env->regwptr = REGWPTR; |
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#endif
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} |
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static inline void regs_to_env(void) |
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{ |
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} |
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int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, |
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int mmu_idx, int is_softmmu); |
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static inline int cpu_halted(CPUState *env) { |
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if (!env->halted)
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return 0; |
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if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) { |
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env->halted = 0;
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return 0; |
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} |
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return EXCP_HALTED;
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} |
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#endif
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