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/*
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SPARC micro operations
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Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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/*XXX*/
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#define REGNAME g0
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#define REG (env->gregs[0]) |
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#include "op_template.h" |
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#define REGNAME g1
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#define REG (env->gregs[1]) |
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#include "op_template.h" |
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#define REGNAME g2
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#define REG (env->gregs[2]) |
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#include "op_template.h" |
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#define REGNAME g3
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#define REG (env->gregs[3]) |
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#include "op_template.h" |
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#define REGNAME g4
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#define REG (env->gregs[4]) |
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#include "op_template.h" |
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#define REGNAME g5
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#define REG (env->gregs[5]) |
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#include "op_template.h" |
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#define REGNAME g6
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#define REG (env->gregs[6]) |
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#include "op_template.h" |
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#define REGNAME g7
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#define REG (env->gregs[7]) |
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#include "op_template.h" |
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#define REGNAME i0
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#define REG (env->regwptr[16]) |
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#include "op_template.h" |
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#define REGNAME i1
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#define REG (env->regwptr[17]) |
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#include "op_template.h" |
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#define REGNAME i2
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#define REG (env->regwptr[18]) |
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#include "op_template.h" |
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#define REGNAME i3
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#define REG (env->regwptr[19]) |
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#include "op_template.h" |
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#define REGNAME i4
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#define REG (env->regwptr[20]) |
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#include "op_template.h" |
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#define REGNAME i5
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#define REG (env->regwptr[21]) |
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#include "op_template.h" |
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#define REGNAME i6
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#define REG (env->regwptr[22]) |
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#include "op_template.h" |
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#define REGNAME i7
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#define REG (env->regwptr[23]) |
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#include "op_template.h" |
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#define REGNAME l0
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#define REG (env->regwptr[8]) |
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#include "op_template.h" |
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#define REGNAME l1
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#define REG (env->regwptr[9]) |
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#include "op_template.h" |
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#define REGNAME l2
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#define REG (env->regwptr[10]) |
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#include "op_template.h" |
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#define REGNAME l3
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#define REG (env->regwptr[11]) |
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#include "op_template.h" |
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#define REGNAME l4
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#define REG (env->regwptr[12]) |
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#include "op_template.h" |
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#define REGNAME l5
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#define REG (env->regwptr[13]) |
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#include "op_template.h" |
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#define REGNAME l6
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#define REG (env->regwptr[14]) |
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#include "op_template.h" |
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#define REGNAME l7
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#define REG (env->regwptr[15]) |
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#include "op_template.h" |
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#define REGNAME o0
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#define REG (env->regwptr[0]) |
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#include "op_template.h" |
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#define REGNAME o1
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#define REG (env->regwptr[1]) |
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#include "op_template.h" |
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#define REGNAME o2
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#define REG (env->regwptr[2]) |
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#include "op_template.h" |
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#define REGNAME o3
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#define REG (env->regwptr[3]) |
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#include "op_template.h" |
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#define REGNAME o4
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#define REG (env->regwptr[4]) |
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#include "op_template.h" |
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#define REGNAME o5
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#define REG (env->regwptr[5]) |
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#include "op_template.h" |
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#define REGNAME o6
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#define REG (env->regwptr[6]) |
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#include "op_template.h" |
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#define REGNAME o7
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#define REG (env->regwptr[7]) |
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#include "op_template.h" |
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#define REGNAME f0
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#define REG (env->fpr[0]) |
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#include "fop_template.h" |
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#define REGNAME f1
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#define REG (env->fpr[1]) |
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#include "fop_template.h" |
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#define REGNAME f2
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#define REG (env->fpr[2]) |
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#include "fop_template.h" |
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#define REGNAME f3
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#define REG (env->fpr[3]) |
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#include "fop_template.h" |
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#define REGNAME f4
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#define REG (env->fpr[4]) |
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#include "fop_template.h" |
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#define REGNAME f5
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#define REG (env->fpr[5]) |
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#include "fop_template.h" |
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#define REGNAME f6
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#define REG (env->fpr[6]) |
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#include "fop_template.h" |
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#define REGNAME f7
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#define REG (env->fpr[7]) |
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#include "fop_template.h" |
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#define REGNAME f8
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#define REG (env->fpr[8]) |
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#include "fop_template.h" |
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#define REGNAME f9
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#define REG (env->fpr[9]) |
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#include "fop_template.h" |
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#define REGNAME f10
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#define REG (env->fpr[10]) |
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#include "fop_template.h" |
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#define REGNAME f11
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#define REG (env->fpr[11]) |
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#include "fop_template.h" |
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#define REGNAME f12
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#define REG (env->fpr[12]) |
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#include "fop_template.h" |
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#define REGNAME f13
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#define REG (env->fpr[13]) |
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#include "fop_template.h" |
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#define REGNAME f14
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#define REG (env->fpr[14]) |
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#include "fop_template.h" |
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#define REGNAME f15
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#define REG (env->fpr[15]) |
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#include "fop_template.h" |
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#define REGNAME f16
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#define REG (env->fpr[16]) |
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#include "fop_template.h" |
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#define REGNAME f17
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#define REG (env->fpr[17]) |
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#include "fop_template.h" |
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#define REGNAME f18
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#define REG (env->fpr[18]) |
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#include "fop_template.h" |
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#define REGNAME f19
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#define REG (env->fpr[19]) |
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#include "fop_template.h" |
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#define REGNAME f20
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#define REG (env->fpr[20]) |
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#include "fop_template.h" |
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#define REGNAME f21
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#define REG (env->fpr[21]) |
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#include "fop_template.h" |
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#define REGNAME f22
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#define REG (env->fpr[22]) |
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#include "fop_template.h" |
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#define REGNAME f23
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#define REG (env->fpr[23]) |
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#include "fop_template.h" |
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#define REGNAME f24
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#define REG (env->fpr[24]) |
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#include "fop_template.h" |
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#define REGNAME f25
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#define REG (env->fpr[25]) |
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#include "fop_template.h" |
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#define REGNAME f26
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#define REG (env->fpr[26]) |
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#include "fop_template.h" |
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#define REGNAME f27
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#define REG (env->fpr[27]) |
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#include "fop_template.h" |
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#define REGNAME f28
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#define REG (env->fpr[28]) |
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#include "fop_template.h" |
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#define REGNAME f29
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#define REG (env->fpr[29]) |
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#include "fop_template.h" |
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#define REGNAME f30
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#define REG (env->fpr[30]) |
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#include "fop_template.h" |
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#define REGNAME f31
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#define REG (env->fpr[31]) |
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#include "fop_template.h" |
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#define EIP (env->pc)
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#define FLAG_SET(x) ((env->psr&x)?1:0) |
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#define FFLAG_SET(x) ((env->fsr&x)?1:0) |
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void OPPROTO op_movl_T0_0(void) |
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{
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T0 = 0;
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} |
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void OPPROTO op_movl_T0_im(void) |
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{
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T0 = PARAM1; |
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} |
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void OPPROTO op_movl_T1_im(void) |
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{
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T1 = PARAM1; |
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} |
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void OPPROTO op_movl_T2_im(void) |
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{
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T2 = PARAM1; |
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} |
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void OPPROTO op_add_T1_T0(void) |
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{
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T0 += T1; |
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} |
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void OPPROTO op_add_T1_T0_cc(void) |
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{
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target_ulong src1; |
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src1 = T0; |
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T0 += T1; |
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO; |
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if ((int32_t) T0 < 0) |
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env->psr |= PSR_NEG; |
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if (T0 < src1)
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env->psr |= PSR_CARRY; |
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if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31)) |
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env->psr |= PSR_OVF; |
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/* V9 xcc */
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FORCE_RET(); |
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} |
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void OPPROTO op_addx_T1_T0(void) |
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{
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T0 += T1 + FLAG_SET(PSR_CARRY); |
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} |
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void OPPROTO op_addx_T1_T0_cc(void) |
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{
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target_ulong src1; |
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src1 = T0; |
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T0 += T1 + FLAG_SET(PSR_CARRY); |
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO; |
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if ((int32_t) T0 < 0) |
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env->psr |= PSR_NEG; |
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if (T0 < src1)
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env->psr |= PSR_CARRY; |
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if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31)) |
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env->psr |= PSR_OVF; |
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/* V9 xcc */
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FORCE_RET(); |
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} |
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void OPPROTO op_sub_T1_T0(void) |
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{
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T0 -= T1; |
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} |
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void OPPROTO op_sub_T1_T0_cc(void) |
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{
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target_ulong src1; |
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src1 = T0; |
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T0 -= T1; |
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO; |
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if ((int32_t) T0 < 0) |
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env->psr |= PSR_NEG; |
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if (src1 < T1)
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env->psr |= PSR_CARRY; |
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if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31)) |
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env->psr |= PSR_OVF; |
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/* V9 xcc */
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FORCE_RET(); |
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} |
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void OPPROTO op_subx_T1_T0(void) |
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{
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T0 -= T1 + FLAG_SET(PSR_CARRY); |
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} |
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void OPPROTO op_subx_T1_T0_cc(void) |
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{
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target_ulong src1; |
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src1 = T0; |
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T0 -= T1 + FLAG_SET(PSR_CARRY); |
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env->psr = 0;
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if (!T0)
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env->psr |= PSR_ZERO; |
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if ((int32_t) T0 < 0) |
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env->psr |= PSR_NEG; |
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if (src1 < T1)
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env->psr |= PSR_CARRY; |
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if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31)) |
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env->psr |= PSR_OVF; |
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/* V9 xcc */
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FORCE_RET(); |
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} |
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void OPPROTO op_and_T1_T0(void) |
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{
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T0 &= T1; |
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} |
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void OPPROTO op_or_T1_T0(void) |
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{
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T0 |= T1; |
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} |
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|
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void OPPROTO op_xor_T1_T0(void) |
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{
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T0 ^= T1; |
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} |
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void OPPROTO op_andn_T1_T0(void) |
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{
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T0 &= ~T1; |
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} |
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void OPPROTO op_orn_T1_T0(void) |
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{
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T0 |= ~T1; |
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} |
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void OPPROTO op_xnor_T1_T0(void) |
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{
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T0 ^= ~T1; |
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} |
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void OPPROTO op_umul_T1_T0(void) |
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{
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uint64_t res; |
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res = (uint64_t) T0 * (uint64_t) T1; |
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T0 = res & 0xffffffff;
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env->y = res >> 32;
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} |
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void OPPROTO op_smul_T1_T0(void) |
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{
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uint64_t res; |
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res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1); |
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T0 = res & 0xffffffff;
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env->y = res >> 32;
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} |
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|
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void OPPROTO op_mulscc_T1_T0(void) |
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{
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unsigned int b1, N, V, b2; |
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target_ulong src1; |
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|
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N = FLAG_SET(PSR_NEG); |
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V = FLAG_SET(PSR_OVF); |
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b1 = N ^ V; |
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b2 = T0 & 1;
|
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T0 = (b1 << 31) | (T0 >> 1); |
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if (!(env->y & 1)) |
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T1 = 0;
|
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/* do addition and update flags */
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src1 = T0; |
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T0 += T1; |
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env->psr = 0;
|
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if (!T0)
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env->psr |= PSR_ZERO; |
| 403 |
if ((int32_t) T0 < 0) |
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env->psr |= PSR_NEG; |
| 405 |
if (T0 < src1)
|
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env->psr |= PSR_CARRY; |
| 407 |
if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31)) |
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env->psr |= PSR_OVF; |
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env->y = (b2 << 31) | (env->y >> 1); |
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FORCE_RET(); |
| 411 |
} |
| 412 |
|
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void OPPROTO op_udiv_T1_T0(void) |
| 414 |
{
|
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uint64_t x0; |
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uint32_t x1; |
| 417 |
|
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x0 = T0 | ((uint64_t) (env->y) << 32);
|
| 419 |
x1 = T1; |
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x0 = x0 / x1; |
| 421 |
if (x0 > 0xffffffff) { |
| 422 |
T0 = 0xffffffff;
|
| 423 |
T1 = 1;
|
| 424 |
} else {
|
| 425 |
T0 = x0; |
| 426 |
T1 = 0;
|
| 427 |
} |
| 428 |
FORCE_RET(); |
| 429 |
} |
| 430 |
|
| 431 |
void OPPROTO op_sdiv_T1_T0(void) |
| 432 |
{
|
| 433 |
int64_t x0; |
| 434 |
int32_t x1; |
| 435 |
|
| 436 |
x0 = T0 | ((int64_t) (env->y) << 32);
|
| 437 |
x1 = T1; |
| 438 |
x0 = x0 / x1; |
| 439 |
if ((int32_t) x0 != x0) {
|
| 440 |
T0 = x0 < 0? 0x80000000: 0x7fffffff; |
| 441 |
T1 = 1;
|
| 442 |
} else {
|
| 443 |
T0 = x0; |
| 444 |
T1 = 0;
|
| 445 |
} |
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FORCE_RET(); |
| 447 |
} |
| 448 |
|
| 449 |
void OPPROTO op_div_cc(void) |
| 450 |
{
|
| 451 |
env->psr = 0;
|
| 452 |
if (!T0)
|
| 453 |
env->psr |= PSR_ZERO; |
| 454 |
if ((int32_t) T0 < 0) |
| 455 |
env->psr |= PSR_NEG; |
| 456 |
if (T1)
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env->psr |= PSR_OVF; |
| 458 |
/* V9 xcc */
|
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FORCE_RET(); |
| 460 |
} |
| 461 |
|
| 462 |
void OPPROTO op_logic_T0_cc(void) |
| 463 |
{
|
| 464 |
env->psr = 0;
|
| 465 |
if (!T0)
|
| 466 |
env->psr |= PSR_ZERO; |
| 467 |
if ((int32_t) T0 < 0) |
| 468 |
env->psr |= PSR_NEG; |
| 469 |
/* V9 xcc */
|
| 470 |
FORCE_RET(); |
| 471 |
} |
| 472 |
|
| 473 |
void OPPROTO op_sll(void) |
| 474 |
{
|
| 475 |
T0 <<= T1; |
| 476 |
} |
| 477 |
|
| 478 |
void OPPROTO op_srl(void) |
| 479 |
{
|
| 480 |
T0 >>= T1; |
| 481 |
} |
| 482 |
|
| 483 |
void OPPROTO op_sra(void) |
| 484 |
{
|
| 485 |
T0 = ((int32_t) T0) >> T1; |
| 486 |
} |
| 487 |
|
| 488 |
/* Load and store */
|
| 489 |
#define MEMSUFFIX _raw
|
| 490 |
#include "op_mem.h" |
| 491 |
#if !defined(CONFIG_USER_ONLY)
|
| 492 |
#define MEMSUFFIX _user
|
| 493 |
#include "op_mem.h" |
| 494 |
|
| 495 |
#define MEMSUFFIX _kernel
|
| 496 |
#include "op_mem.h" |
| 497 |
#endif
|
| 498 |
|
| 499 |
void OPPROTO op_ldfsr(void) |
| 500 |
{
|
| 501 |
env->fsr = *((uint32_t *) &FT0); |
| 502 |
helper_ldfsr(); |
| 503 |
} |
| 504 |
|
| 505 |
void OPPROTO op_stfsr(void) |
| 506 |
{
|
| 507 |
*((uint32_t *) &FT0) = env->fsr; |
| 508 |
} |
| 509 |
|
| 510 |
void OPPROTO op_wry(void) |
| 511 |
{
|
| 512 |
env->y = T0; |
| 513 |
} |
| 514 |
|
| 515 |
void OPPROTO op_rdy(void) |
| 516 |
{
|
| 517 |
T0 = env->y; |
| 518 |
} |
| 519 |
|
| 520 |
void OPPROTO op_rdwim(void) |
| 521 |
{
|
| 522 |
T0 = env->wim; |
| 523 |
} |
| 524 |
|
| 525 |
void OPPROTO op_wrwim(void) |
| 526 |
{
|
| 527 |
env->wim = T0; |
| 528 |
FORCE_RET(); |
| 529 |
} |
| 530 |
|
| 531 |
void OPPROTO op_rdpsr(void) |
| 532 |
{
|
| 533 |
do_rdpsr(); |
| 534 |
} |
| 535 |
|
| 536 |
void OPPROTO op_wrpsr(void) |
| 537 |
{
|
| 538 |
do_wrpsr(); |
| 539 |
FORCE_RET(); |
| 540 |
} |
| 541 |
|
| 542 |
void OPPROTO op_rdtbr(void) |
| 543 |
{
|
| 544 |
T0 = env->tbr; |
| 545 |
} |
| 546 |
|
| 547 |
void OPPROTO op_wrtbr(void) |
| 548 |
{
|
| 549 |
env->tbr = T0; |
| 550 |
FORCE_RET(); |
| 551 |
} |
| 552 |
|
| 553 |
void OPPROTO op_rett(void) |
| 554 |
{
|
| 555 |
helper_rett(); |
| 556 |
FORCE_RET(); |
| 557 |
} |
| 558 |
|
| 559 |
/* XXX: use another pointer for %iN registers to avoid slow wrapping
|
| 560 |
handling ? */
|
| 561 |
void OPPROTO op_save(void) |
| 562 |
{
|
| 563 |
uint32_t cwp; |
| 564 |
cwp = (env->cwp - 1) & (NWINDOWS - 1); |
| 565 |
if (env->wim & (1 << cwp)) { |
| 566 |
raise_exception(TT_WIN_OVF); |
| 567 |
} |
| 568 |
set_cwp(cwp); |
| 569 |
FORCE_RET(); |
| 570 |
} |
| 571 |
|
| 572 |
void OPPROTO op_restore(void) |
| 573 |
{
|
| 574 |
uint32_t cwp; |
| 575 |
cwp = (env->cwp + 1) & (NWINDOWS - 1); |
| 576 |
if (env->wim & (1 << cwp)) { |
| 577 |
raise_exception(TT_WIN_UNF); |
| 578 |
} |
| 579 |
set_cwp(cwp); |
| 580 |
FORCE_RET(); |
| 581 |
} |
| 582 |
|
| 583 |
void OPPROTO op_exception(void) |
| 584 |
{
|
| 585 |
env->exception_index = PARAM1; |
| 586 |
cpu_loop_exit(); |
| 587 |
} |
| 588 |
|
| 589 |
void OPPROTO op_trap_T0(void) |
| 590 |
{
|
| 591 |
env->exception_index = TT_TRAP + (T0 & 0x7f);
|
| 592 |
cpu_loop_exit(); |
| 593 |
} |
| 594 |
|
| 595 |
void OPPROTO op_trapcc_T0(void) |
| 596 |
{
|
| 597 |
if (T2) {
|
| 598 |
env->exception_index = TT_TRAP + (T0 & 0x7f);
|
| 599 |
cpu_loop_exit(); |
| 600 |
} |
| 601 |
FORCE_RET(); |
| 602 |
} |
| 603 |
|
| 604 |
void OPPROTO op_trap_ifnofpu(void) |
| 605 |
{
|
| 606 |
if (!env->psref) {
|
| 607 |
env->exception_index = TT_NFPU_INSN; |
| 608 |
cpu_loop_exit(); |
| 609 |
} |
| 610 |
FORCE_RET(); |
| 611 |
} |
| 612 |
|
| 613 |
void OPPROTO op_fpexception_im(void) |
| 614 |
{
|
| 615 |
env->exception_index = TT_FP_EXCP; |
| 616 |
env->fsr &= ~FSR_FTT_MASK; |
| 617 |
env->fsr |= PARAM1; |
| 618 |
cpu_loop_exit(); |
| 619 |
FORCE_RET(); |
| 620 |
} |
| 621 |
|
| 622 |
void OPPROTO op_debug(void) |
| 623 |
{
|
| 624 |
helper_debug(); |
| 625 |
} |
| 626 |
|
| 627 |
void OPPROTO op_exit_tb(void) |
| 628 |
{
|
| 629 |
EXIT_TB(); |
| 630 |
} |
| 631 |
|
| 632 |
void OPPROTO op_eval_be(void) |
| 633 |
{
|
| 634 |
T2 = FLAG_SET(PSR_ZERO); |
| 635 |
} |
| 636 |
|
| 637 |
void OPPROTO op_eval_ble(void) |
| 638 |
{
|
| 639 |
target_ulong Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF); |
| 640 |
|
| 641 |
T2 = Z | (N ^ V); |
| 642 |
} |
| 643 |
|
| 644 |
void OPPROTO op_eval_bl(void) |
| 645 |
{
|
| 646 |
target_ulong N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF); |
| 647 |
|
| 648 |
T2 = N ^ V; |
| 649 |
} |
| 650 |
|
| 651 |
void OPPROTO op_eval_bleu(void) |
| 652 |
{
|
| 653 |
target_ulong Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY); |
| 654 |
|
| 655 |
T2 = C | Z; |
| 656 |
} |
| 657 |
|
| 658 |
void OPPROTO op_eval_bcs(void) |
| 659 |
{
|
| 660 |
T2 = FLAG_SET(PSR_CARRY); |
| 661 |
} |
| 662 |
|
| 663 |
void OPPROTO op_eval_bvs(void) |
| 664 |
{
|
| 665 |
T2 = FLAG_SET(PSR_OVF); |
| 666 |
} |
| 667 |
|
| 668 |
void OPPROTO op_eval_bneg(void) |
| 669 |
{
|
| 670 |
T2 = FLAG_SET(PSR_NEG); |
| 671 |
} |
| 672 |
|
| 673 |
void OPPROTO op_eval_bne(void) |
| 674 |
{
|
| 675 |
T2 = !FLAG_SET(PSR_ZERO); |
| 676 |
} |
| 677 |
|
| 678 |
void OPPROTO op_eval_bg(void) |
| 679 |
{
|
| 680 |
target_ulong Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF); |
| 681 |
|
| 682 |
T2 = !(Z | (N ^ V)); |
| 683 |
} |
| 684 |
|
| 685 |
void OPPROTO op_eval_bge(void) |
| 686 |
{
|
| 687 |
target_ulong N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF); |
| 688 |
|
| 689 |
T2 = !(N ^ V); |
| 690 |
} |
| 691 |
|
| 692 |
void OPPROTO op_eval_bgu(void) |
| 693 |
{
|
| 694 |
target_ulong Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY); |
| 695 |
|
| 696 |
T2 = !(C | Z); |
| 697 |
} |
| 698 |
|
| 699 |
void OPPROTO op_eval_bcc(void) |
| 700 |
{
|
| 701 |
T2 = !FLAG_SET(PSR_CARRY); |
| 702 |
} |
| 703 |
|
| 704 |
void OPPROTO op_eval_bpos(void) |
| 705 |
{
|
| 706 |
T2 = !FLAG_SET(PSR_NEG); |
| 707 |
} |
| 708 |
|
| 709 |
void OPPROTO op_eval_bvc(void) |
| 710 |
{
|
| 711 |
T2 = !FLAG_SET(PSR_OVF); |
| 712 |
} |
| 713 |
|
| 714 |
/* FCC1:FCC0: 0 =, 1 <, 2 >, 3 u */
|
| 715 |
|
| 716 |
void OPPROTO op_eval_fbne(void) |
| 717 |
{
|
| 718 |
// !0
|
| 719 |
T2 = (env->fsr & (FSR_FCC1 | FSR_FCC0)); /* L or G or U */
|
| 720 |
} |
| 721 |
|
| 722 |
void OPPROTO op_eval_fblg(void) |
| 723 |
{
|
| 724 |
// 1 or 2
|
| 725 |
T2 = FFLAG_SET(FSR_FCC0) ^ FFLAG_SET(FSR_FCC1); |
| 726 |
} |
| 727 |
|
| 728 |
void OPPROTO op_eval_fbul(void) |
| 729 |
{
|
| 730 |
// 1 or 3
|
| 731 |
T2 = FFLAG_SET(FSR_FCC0); |
| 732 |
} |
| 733 |
|
| 734 |
void OPPROTO op_eval_fbl(void) |
| 735 |
{
|
| 736 |
// 1
|
| 737 |
T2 = FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1); |
| 738 |
} |
| 739 |
|
| 740 |
void OPPROTO op_eval_fbug(void) |
| 741 |
{
|
| 742 |
// 2 or 3
|
| 743 |
T2 = FFLAG_SET(FSR_FCC1); |
| 744 |
} |
| 745 |
|
| 746 |
void OPPROTO op_eval_fbg(void) |
| 747 |
{
|
| 748 |
// 2
|
| 749 |
T2 = !FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1); |
| 750 |
} |
| 751 |
|
| 752 |
void OPPROTO op_eval_fbu(void) |
| 753 |
{
|
| 754 |
// 3
|
| 755 |
T2 = FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1); |
| 756 |
} |
| 757 |
|
| 758 |
void OPPROTO op_eval_fbe(void) |
| 759 |
{
|
| 760 |
// 0
|
| 761 |
T2 = !FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1); |
| 762 |
} |
| 763 |
|
| 764 |
void OPPROTO op_eval_fbue(void) |
| 765 |
{
|
| 766 |
// 0 or 3
|
| 767 |
T2 = !(FFLAG_SET(FSR_FCC1) ^ FFLAG_SET(FSR_FCC0)); |
| 768 |
} |
| 769 |
|
| 770 |
void OPPROTO op_eval_fbge(void) |
| 771 |
{
|
| 772 |
// 0 or 2
|
| 773 |
T2 = !FFLAG_SET(FSR_FCC0); |
| 774 |
} |
| 775 |
|
| 776 |
void OPPROTO op_eval_fbuge(void) |
| 777 |
{
|
| 778 |
// !1
|
| 779 |
T2 = !(FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1)); |
| 780 |
} |
| 781 |
|
| 782 |
void OPPROTO op_eval_fble(void) |
| 783 |
{
|
| 784 |
// 0 or 1
|
| 785 |
T2 = !FFLAG_SET(FSR_FCC1); |
| 786 |
} |
| 787 |
|
| 788 |
void OPPROTO op_eval_fbule(void) |
| 789 |
{
|
| 790 |
// !2
|
| 791 |
T2 = !(!FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1)); |
| 792 |
} |
| 793 |
|
| 794 |
void OPPROTO op_eval_fbo(void) |
| 795 |
{
|
| 796 |
// !3
|
| 797 |
T2 = !(FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1)); |
| 798 |
} |
| 799 |
|
| 800 |
void OPPROTO op_jmp_im(void) |
| 801 |
{
|
| 802 |
env->pc = PARAM1; |
| 803 |
} |
| 804 |
|
| 805 |
void OPPROTO op_movl_npc_im(void) |
| 806 |
{
|
| 807 |
env->npc = PARAM1; |
| 808 |
} |
| 809 |
|
| 810 |
void OPPROTO op_movl_npc_T0(void) |
| 811 |
{
|
| 812 |
env->npc = T0; |
| 813 |
} |
| 814 |
|
| 815 |
void OPPROTO op_mov_pc_npc(void) |
| 816 |
{
|
| 817 |
env->pc = env->npc; |
| 818 |
} |
| 819 |
|
| 820 |
void OPPROTO op_next_insn(void) |
| 821 |
{
|
| 822 |
env->pc = env->npc; |
| 823 |
env->npc = env->npc + 4;
|
| 824 |
} |
| 825 |
|
| 826 |
void OPPROTO op_branch(void) |
| 827 |
{
|
| 828 |
env->npc = PARAM3; /* XXX: optimize */
|
| 829 |
JUMP_TB(op_branch, PARAM1, 0, PARAM2);
|
| 830 |
} |
| 831 |
|
| 832 |
void OPPROTO op_branch2(void) |
| 833 |
{
|
| 834 |
if (T2) {
|
| 835 |
env->npc = PARAM2 + 4;
|
| 836 |
JUMP_TB(op_branch2, PARAM1, 0, PARAM2);
|
| 837 |
} else {
|
| 838 |
env->npc = PARAM3 + 4;
|
| 839 |
JUMP_TB(op_branch2, PARAM1, 1, PARAM3);
|
| 840 |
} |
| 841 |
FORCE_RET(); |
| 842 |
} |
| 843 |
|
| 844 |
void OPPROTO op_branch_a(void) |
| 845 |
{
|
| 846 |
if (T2) {
|
| 847 |
env->npc = PARAM2; /* XXX: optimize */
|
| 848 |
JUMP_TB(op_branch_a, PARAM1, 0, PARAM3);
|
| 849 |
} else {
|
| 850 |
env->npc = PARAM3 + 8; /* XXX: optimize */ |
| 851 |
JUMP_TB(op_branch_a, PARAM1, 1, PARAM3 + 4); |
| 852 |
} |
| 853 |
FORCE_RET(); |
| 854 |
} |
| 855 |
|
| 856 |
void OPPROTO op_generic_branch(void) |
| 857 |
{
|
| 858 |
if (T2) {
|
| 859 |
env->npc = PARAM1; |
| 860 |
} else {
|
| 861 |
env->npc = PARAM2; |
| 862 |
} |
| 863 |
FORCE_RET(); |
| 864 |
} |
| 865 |
|
| 866 |
void OPPROTO op_flush_T0(void) |
| 867 |
{
|
| 868 |
helper_flush(T0); |
| 869 |
} |
| 870 |
|
| 871 |
void OPPROTO op_fnegs(void) |
| 872 |
{
|
| 873 |
FT0 = -FT1; |
| 874 |
} |
| 875 |
|
| 876 |
void OPPROTO op_fabss(void) |
| 877 |
{
|
| 878 |
do_fabss(); |
| 879 |
} |
| 880 |
|
| 881 |
void OPPROTO op_fsqrts(void) |
| 882 |
{
|
| 883 |
do_fsqrts(); |
| 884 |
} |
| 885 |
|
| 886 |
void OPPROTO op_fsqrtd(void) |
| 887 |
{
|
| 888 |
do_fsqrtd(); |
| 889 |
} |
| 890 |
|
| 891 |
void OPPROTO op_fmuls(void) |
| 892 |
{
|
| 893 |
FT0 *= FT1; |
| 894 |
} |
| 895 |
|
| 896 |
void OPPROTO op_fmuld(void) |
| 897 |
{
|
| 898 |
DT0 *= DT1; |
| 899 |
} |
| 900 |
|
| 901 |
void OPPROTO op_fsmuld(void) |
| 902 |
{
|
| 903 |
DT0 = FT0 * FT1; |
| 904 |
} |
| 905 |
|
| 906 |
void OPPROTO op_fadds(void) |
| 907 |
{
|
| 908 |
FT0 += FT1; |
| 909 |
} |
| 910 |
|
| 911 |
void OPPROTO op_faddd(void) |
| 912 |
{
|
| 913 |
DT0 += DT1; |
| 914 |
} |
| 915 |
|
| 916 |
void OPPROTO op_fsubs(void) |
| 917 |
{
|
| 918 |
FT0 -= FT1; |
| 919 |
} |
| 920 |
|
| 921 |
void OPPROTO op_fsubd(void) |
| 922 |
{
|
| 923 |
DT0 -= DT1; |
| 924 |
} |
| 925 |
|
| 926 |
void OPPROTO op_fdivs(void) |
| 927 |
{
|
| 928 |
FT0 /= FT1; |
| 929 |
} |
| 930 |
|
| 931 |
void OPPROTO op_fdivd(void) |
| 932 |
{
|
| 933 |
DT0 /= DT1; |
| 934 |
} |
| 935 |
|
| 936 |
void OPPROTO op_fcmps(void) |
| 937 |
{
|
| 938 |
do_fcmps(); |
| 939 |
} |
| 940 |
|
| 941 |
void OPPROTO op_fcmpd(void) |
| 942 |
{
|
| 943 |
do_fcmpd(); |
| 944 |
} |
| 945 |
|
| 946 |
#ifdef USE_INT_TO_FLOAT_HELPERS
|
| 947 |
void OPPROTO op_fitos(void) |
| 948 |
{
|
| 949 |
do_fitos(); |
| 950 |
} |
| 951 |
|
| 952 |
void OPPROTO op_fitod(void) |
| 953 |
{
|
| 954 |
do_fitod(); |
| 955 |
} |
| 956 |
#else
|
| 957 |
void OPPROTO op_fitos(void) |
| 958 |
{
|
| 959 |
FT0 = (float) *((int32_t *)&FT1);
|
| 960 |
} |
| 961 |
|
| 962 |
void OPPROTO op_fitod(void) |
| 963 |
{
|
| 964 |
DT0 = (double) *((int32_t *)&FT1);
|
| 965 |
} |
| 966 |
#endif
|
| 967 |
|
| 968 |
void OPPROTO op_fdtos(void) |
| 969 |
{
|
| 970 |
FT0 = (float) DT1;
|
| 971 |
} |
| 972 |
|
| 973 |
void OPPROTO op_fstod(void) |
| 974 |
{
|
| 975 |
DT0 = (double) FT1;
|
| 976 |
} |
| 977 |
|
| 978 |
void OPPROTO op_fstoi(void) |
| 979 |
{
|
| 980 |
*((int32_t *)&FT0) = (int32_t) FT1; |
| 981 |
} |
| 982 |
|
| 983 |
void OPPROTO op_fdtoi(void) |
| 984 |
{
|
| 985 |
*((int32_t *)&FT0) = (int32_t) DT1; |
| 986 |
} |
| 987 |
|
| 988 |
void OPPROTO op_ld_asi()
|
| 989 |
{
|
| 990 |
helper_ld_asi(PARAM1, PARAM2, PARAM3); |
| 991 |
} |
| 992 |
|
| 993 |
void OPPROTO op_st_asi()
|
| 994 |
{
|
| 995 |
helper_st_asi(PARAM1, PARAM2, PARAM3); |
| 996 |
} |
| 997 |
|