Revision 182735ef hw/i386/kvmvapic.c
| b/hw/i386/kvmvapic.c | ||
|---|---|---|
| 490 | 490 |
VAPICEnableTPRReporting info = {
|
| 491 | 491 |
.enable = enable, |
| 492 | 492 |
}; |
| 493 |
CPUState *cs; |
|
| 493 | 494 |
X86CPU *cpu; |
| 494 | 495 |
CPUX86State *env; |
| 495 | 496 |
|
| 496 |
for (env = first_cpu; env != NULL; env = env->next_cpu) {
|
|
| 497 |
cpu = x86_env_get_cpu(env); |
|
| 497 |
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
|
| 498 |
cpu = X86_CPU(cs); |
|
| 499 |
env = &cpu->env; |
|
| 498 | 500 |
info.apic = env->apic_state; |
| 499 |
run_on_cpu(CPU(cpu), vapic_do_enable_tpr_reporting, &info);
|
|
| 501 |
run_on_cpu(cs, vapic_do_enable_tpr_reporting, &info);
|
|
| 500 | 502 |
} |
| 501 | 503 |
} |
| 502 | 504 |
|
| ... | ... | |
| 719 | 721 |
static void do_vapic_enable(void *data) |
| 720 | 722 |
{
|
| 721 | 723 |
VAPICROMState *s = data; |
| 724 |
X86CPU *cpu = X86_CPU(first_cpu); |
|
| 722 | 725 |
|
| 723 |
vapic_enable(s, first_cpu);
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|
| 726 |
vapic_enable(s, &cpu->env);
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|
| 724 | 727 |
} |
| 725 | 728 |
|
| 726 | 729 |
static int vapic_post_load(void *opaque, int version_id) |
| ... | ... | |
| 743 | 746 |
} |
| 744 | 747 |
if (s->state == VAPIC_ACTIVE) {
|
| 745 | 748 |
if (smp_cpus == 1) {
|
| 746 |
run_on_cpu(ENV_GET_CPU(first_cpu), do_vapic_enable, s);
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|
| 749 |
run_on_cpu(first_cpu, do_vapic_enable, s);
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|
| 747 | 750 |
} else {
|
| 748 | 751 |
zero = g_malloc0(s->rom_state.vapic_size); |
| 749 | 752 |
cpu_physical_memory_rw(s->vapic_paddr, zero, |
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