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1 | 16b29ae1 | aliguori | /*
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2 | 16b29ae1 | aliguori | * High Precisition Event Timer emulation
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3 | 16b29ae1 | aliguori | *
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4 | 16b29ae1 | aliguori | * Copyright (c) 2007 Alexander Graf
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5 | 16b29ae1 | aliguori | * Copyright (c) 2008 IBM Corporation
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6 | 16b29ae1 | aliguori | *
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7 | 16b29ae1 | aliguori | * Authors: Beth Kon <bkon@us.ibm.com>
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8 | 16b29ae1 | aliguori | *
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9 | 16b29ae1 | aliguori | * This library is free software; you can redistribute it and/or
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10 | 16b29ae1 | aliguori | * modify it under the terms of the GNU Lesser General Public
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11 | 16b29ae1 | aliguori | * License as published by the Free Software Foundation; either
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12 | 16b29ae1 | aliguori | * version 2 of the License, or (at your option) any later version.
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13 | 16b29ae1 | aliguori | *
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14 | 16b29ae1 | aliguori | * This library is distributed in the hope that it will be useful,
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15 | 16b29ae1 | aliguori | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 | 16b29ae1 | aliguori | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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17 | 16b29ae1 | aliguori | * Lesser General Public License for more details.
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18 | 16b29ae1 | aliguori | *
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19 | 16b29ae1 | aliguori | * You should have received a copy of the GNU Lesser General Public
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20 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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21 | 16b29ae1 | aliguori | *
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22 | 16b29ae1 | aliguori | * *****************************************************************
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23 | 16b29ae1 | aliguori | *
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24 | 16b29ae1 | aliguori | * This driver attempts to emulate an HPET device in software.
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25 | 16b29ae1 | aliguori | */
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26 | 16b29ae1 | aliguori | |
27 | 16b29ae1 | aliguori | #include "hw.h" |
28 | bf4f74c0 | aurel32 | #include "pc.h" |
29 | 16b29ae1 | aliguori | #include "console.h" |
30 | 16b29ae1 | aliguori | #include "qemu-timer.h" |
31 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
32 | 822557eb | Jan Kiszka | #include "sysbus.h" |
33 | 7d932dfd | Jan Kiszka | #include "mc146818rtc.h" |
34 | 16b29ae1 | aliguori | |
35 | 16b29ae1 | aliguori | //#define HPET_DEBUG
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36 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
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37 | d0f2c4c6 | malc | #define DPRINTF printf
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38 | 16b29ae1 | aliguori | #else
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39 | d0f2c4c6 | malc | #define DPRINTF(...)
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40 | 16b29ae1 | aliguori | #endif
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41 | 16b29ae1 | aliguori | |
42 | 8caa0065 | Jan Kiszka | #define HPET_MSI_SUPPORT 0 |
43 | 8caa0065 | Jan Kiszka | |
44 | 27bb0b2d | Jan Kiszka | struct HPETState;
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45 | 27bb0b2d | Jan Kiszka | typedef struct HPETTimer { /* timers */ |
46 | 27bb0b2d | Jan Kiszka | uint8_t tn; /*timer number*/
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47 | 27bb0b2d | Jan Kiszka | QEMUTimer *qemu_timer; |
48 | 27bb0b2d | Jan Kiszka | struct HPETState *state;
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49 | 27bb0b2d | Jan Kiszka | /* Memory-mapped, software visible timer registers */
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50 | 27bb0b2d | Jan Kiszka | uint64_t config; /* configuration/cap */
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51 | 27bb0b2d | Jan Kiszka | uint64_t cmp; /* comparator */
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52 | 8caa0065 | Jan Kiszka | uint64_t fsb; /* FSB route */
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53 | 27bb0b2d | Jan Kiszka | /* Hidden register state */
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54 | 27bb0b2d | Jan Kiszka | uint64_t period; /* Last value written to comparator */
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55 | 27bb0b2d | Jan Kiszka | uint8_t wrap_flag; /* timer pop will indicate wrap for one-shot 32-bit
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56 | 27bb0b2d | Jan Kiszka | * mode. Next pop will be actual timer expiration.
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57 | 27bb0b2d | Jan Kiszka | */
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58 | 27bb0b2d | Jan Kiszka | } HPETTimer; |
59 | 27bb0b2d | Jan Kiszka | |
60 | 27bb0b2d | Jan Kiszka | typedef struct HPETState { |
61 | 822557eb | Jan Kiszka | SysBusDevice busdev; |
62 | 27bb0b2d | Jan Kiszka | uint64_t hpet_offset; |
63 | 822557eb | Jan Kiszka | qemu_irq irqs[HPET_NUM_IRQ_ROUTES]; |
64 | 8caa0065 | Jan Kiszka | uint32_t flags; |
65 | 7d932dfd | Jan Kiszka | uint8_t rtc_irq_level; |
66 | be4b44c5 | Jan Kiszka | uint8_t num_timers; |
67 | be4b44c5 | Jan Kiszka | HPETTimer timer[HPET_MAX_TIMERS]; |
68 | 27bb0b2d | Jan Kiszka | |
69 | 27bb0b2d | Jan Kiszka | /* Memory-mapped, software visible registers */
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70 | 27bb0b2d | Jan Kiszka | uint64_t capability; /* capabilities */
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71 | 27bb0b2d | Jan Kiszka | uint64_t config; /* configuration */
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72 | 27bb0b2d | Jan Kiszka | uint64_t isr; /* interrupt status reg */
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73 | 27bb0b2d | Jan Kiszka | uint64_t hpet_counter; /* main counter */
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74 | 40ac17cd | Gleb Natapov | uint8_t hpet_id; /* instance id */
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75 | 27bb0b2d | Jan Kiszka | } HPETState; |
76 | 27bb0b2d | Jan Kiszka | |
77 | 7d932dfd | Jan Kiszka | static uint32_t hpet_in_legacy_mode(HPETState *s)
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78 | 16b29ae1 | aliguori | { |
79 | 7d932dfd | Jan Kiszka | return s->config & HPET_CFG_LEGACY;
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80 | 16b29ae1 | aliguori | } |
81 | 16b29ae1 | aliguori | |
82 | c50c2d68 | aurel32 | static uint32_t timer_int_route(struct HPETTimer *timer) |
83 | 16b29ae1 | aliguori | { |
84 | 27bb0b2d | Jan Kiszka | return (timer->config & HPET_TN_INT_ROUTE_MASK) >> HPET_TN_INT_ROUTE_SHIFT;
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85 | 16b29ae1 | aliguori | } |
86 | 16b29ae1 | aliguori | |
87 | 8caa0065 | Jan Kiszka | static uint32_t timer_fsb_route(HPETTimer *t)
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88 | 8caa0065 | Jan Kiszka | { |
89 | 8caa0065 | Jan Kiszka | return t->config & HPET_TN_FSB_ENABLE;
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90 | 8caa0065 | Jan Kiszka | } |
91 | 8caa0065 | Jan Kiszka | |
92 | b7eaa6c7 | Jan Kiszka | static uint32_t hpet_enabled(HPETState *s)
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93 | 16b29ae1 | aliguori | { |
94 | b7eaa6c7 | Jan Kiszka | return s->config & HPET_CFG_ENABLE;
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95 | 16b29ae1 | aliguori | } |
96 | 16b29ae1 | aliguori | |
97 | 16b29ae1 | aliguori | static uint32_t timer_is_periodic(HPETTimer *t)
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98 | 16b29ae1 | aliguori | { |
99 | 16b29ae1 | aliguori | return t->config & HPET_TN_PERIODIC;
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100 | 16b29ae1 | aliguori | } |
101 | 16b29ae1 | aliguori | |
102 | 16b29ae1 | aliguori | static uint32_t timer_enabled(HPETTimer *t)
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103 | 16b29ae1 | aliguori | { |
104 | 16b29ae1 | aliguori | return t->config & HPET_TN_ENABLE;
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105 | 16b29ae1 | aliguori | } |
106 | 16b29ae1 | aliguori | |
107 | 16b29ae1 | aliguori | static uint32_t hpet_time_after(uint64_t a, uint64_t b)
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108 | 16b29ae1 | aliguori | { |
109 | 16b29ae1 | aliguori | return ((int32_t)(b) - (int32_t)(a) < 0); |
110 | 16b29ae1 | aliguori | } |
111 | 16b29ae1 | aliguori | |
112 | 16b29ae1 | aliguori | static uint32_t hpet_time_after64(uint64_t a, uint64_t b)
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113 | 16b29ae1 | aliguori | { |
114 | 16b29ae1 | aliguori | return ((int64_t)(b) - (int64_t)(a) < 0); |
115 | 16b29ae1 | aliguori | } |
116 | 16b29ae1 | aliguori | |
117 | c50c2d68 | aurel32 | static uint64_t ticks_to_ns(uint64_t value)
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118 | 16b29ae1 | aliguori | { |
119 | 16b29ae1 | aliguori | return (muldiv64(value, HPET_CLK_PERIOD, FS_PER_NS));
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120 | 16b29ae1 | aliguori | } |
121 | 16b29ae1 | aliguori | |
122 | c50c2d68 | aurel32 | static uint64_t ns_to_ticks(uint64_t value)
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123 | 16b29ae1 | aliguori | { |
124 | 16b29ae1 | aliguori | return (muldiv64(value, FS_PER_NS, HPET_CLK_PERIOD));
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125 | 16b29ae1 | aliguori | } |
126 | 16b29ae1 | aliguori | |
127 | 16b29ae1 | aliguori | static uint64_t hpet_fixup_reg(uint64_t new, uint64_t old, uint64_t mask)
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128 | 16b29ae1 | aliguori | { |
129 | 16b29ae1 | aliguori | new &= mask; |
130 | 16b29ae1 | aliguori | new |= old & ~mask; |
131 | 16b29ae1 | aliguori | return new;
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132 | 16b29ae1 | aliguori | } |
133 | 16b29ae1 | aliguori | |
134 | 16b29ae1 | aliguori | static int activating_bit(uint64_t old, uint64_t new, uint64_t mask) |
135 | 16b29ae1 | aliguori | { |
136 | c50c2d68 | aurel32 | return (!(old & mask) && (new & mask));
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137 | 16b29ae1 | aliguori | } |
138 | 16b29ae1 | aliguori | |
139 | 16b29ae1 | aliguori | static int deactivating_bit(uint64_t old, uint64_t new, uint64_t mask) |
140 | 16b29ae1 | aliguori | { |
141 | c50c2d68 | aurel32 | return ((old & mask) && !(new & mask));
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142 | 16b29ae1 | aliguori | } |
143 | 16b29ae1 | aliguori | |
144 | b7eaa6c7 | Jan Kiszka | static uint64_t hpet_get_ticks(HPETState *s)
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145 | 16b29ae1 | aliguori | { |
146 | 74475455 | Paolo Bonzini | return ns_to_ticks(qemu_get_clock_ns(vm_clock) + s->hpet_offset);
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147 | 16b29ae1 | aliguori | } |
148 | 16b29ae1 | aliguori | |
149 | c50c2d68 | aurel32 | /*
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150 | c50c2d68 | aurel32 | * calculate diff between comparator value and current ticks
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151 | 16b29ae1 | aliguori | */
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152 | 16b29ae1 | aliguori | static inline uint64_t hpet_calculate_diff(HPETTimer *t, uint64_t current) |
153 | 16b29ae1 | aliguori | { |
154 | c50c2d68 | aurel32 | |
155 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT) {
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156 | 16b29ae1 | aliguori | uint32_t diff, cmp; |
157 | 27bb0b2d | Jan Kiszka | |
158 | 16b29ae1 | aliguori | cmp = (uint32_t)t->cmp; |
159 | 16b29ae1 | aliguori | diff = cmp - (uint32_t)current; |
160 | 16b29ae1 | aliguori | diff = (int32_t)diff > 0 ? diff : (uint32_t)0; |
161 | 16b29ae1 | aliguori | return (uint64_t)diff;
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162 | 16b29ae1 | aliguori | } else {
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163 | 16b29ae1 | aliguori | uint64_t diff, cmp; |
164 | 27bb0b2d | Jan Kiszka | |
165 | 16b29ae1 | aliguori | cmp = t->cmp; |
166 | 16b29ae1 | aliguori | diff = cmp - current; |
167 | 16b29ae1 | aliguori | diff = (int64_t)diff > 0 ? diff : (uint64_t)0; |
168 | 16b29ae1 | aliguori | return diff;
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169 | 16b29ae1 | aliguori | } |
170 | 16b29ae1 | aliguori | } |
171 | 16b29ae1 | aliguori | |
172 | 22a9fe38 | Jan Kiszka | static void update_irq(struct HPETTimer *timer, int set) |
173 | 16b29ae1 | aliguori | { |
174 | 22a9fe38 | Jan Kiszka | uint64_t mask; |
175 | 22a9fe38 | Jan Kiszka | HPETState *s; |
176 | 16b29ae1 | aliguori | int route;
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177 | 16b29ae1 | aliguori | |
178 | 7d932dfd | Jan Kiszka | if (timer->tn <= 1 && hpet_in_legacy_mode(timer->state)) { |
179 | 16b29ae1 | aliguori | /* if LegacyReplacementRoute bit is set, HPET specification requires
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180 | 16b29ae1 | aliguori | * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,
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181 | c50c2d68 | aurel32 | * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC.
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182 | 16b29ae1 | aliguori | */
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183 | 7d932dfd | Jan Kiszka | route = (timer->tn == 0) ? 0 : RTC_ISA_IRQ; |
184 | 16b29ae1 | aliguori | } else {
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185 | 27bb0b2d | Jan Kiszka | route = timer_int_route(timer); |
186 | 16b29ae1 | aliguori | } |
187 | 22a9fe38 | Jan Kiszka | s = timer->state; |
188 | 22a9fe38 | Jan Kiszka | mask = 1 << timer->tn;
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189 | 22a9fe38 | Jan Kiszka | if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) {
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190 | 22a9fe38 | Jan Kiszka | s->isr &= ~mask; |
191 | 8caa0065 | Jan Kiszka | if (!timer_fsb_route(timer)) {
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192 | 8caa0065 | Jan Kiszka | qemu_irq_lower(s->irqs[route]); |
193 | 8caa0065 | Jan Kiszka | } |
194 | 8caa0065 | Jan Kiszka | } else if (timer_fsb_route(timer)) { |
195 | 8caa0065 | Jan Kiszka | stl_phys(timer->fsb >> 32, timer->fsb & 0xffffffff); |
196 | 22a9fe38 | Jan Kiszka | } else if (timer->config & HPET_TN_TYPE_LEVEL) { |
197 | 22a9fe38 | Jan Kiszka | s->isr |= mask; |
198 | 22a9fe38 | Jan Kiszka | qemu_irq_raise(s->irqs[route]); |
199 | 22a9fe38 | Jan Kiszka | } else {
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200 | 22a9fe38 | Jan Kiszka | s->isr &= ~mask; |
201 | 22a9fe38 | Jan Kiszka | qemu_irq_pulse(s->irqs[route]); |
202 | 16b29ae1 | aliguori | } |
203 | 16b29ae1 | aliguori | } |
204 | 16b29ae1 | aliguori | |
205 | d4bfa4d7 | Juan Quintela | static void hpet_pre_save(void *opaque) |
206 | 16b29ae1 | aliguori | { |
207 | d4bfa4d7 | Juan Quintela | HPETState *s = opaque; |
208 | 27bb0b2d | Jan Kiszka | |
209 | 16b29ae1 | aliguori | /* save current counter value */
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210 | b7eaa6c7 | Jan Kiszka | s->hpet_counter = hpet_get_ticks(s); |
211 | 16b29ae1 | aliguori | } |
212 | 16b29ae1 | aliguori | |
213 | be4b44c5 | Jan Kiszka | static int hpet_pre_load(void *opaque) |
214 | be4b44c5 | Jan Kiszka | { |
215 | be4b44c5 | Jan Kiszka | HPETState *s = opaque; |
216 | be4b44c5 | Jan Kiszka | |
217 | be4b44c5 | Jan Kiszka | /* version 1 only supports 3, later versions will load the actual value */
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218 | be4b44c5 | Jan Kiszka | s->num_timers = HPET_MIN_TIMERS; |
219 | be4b44c5 | Jan Kiszka | return 0; |
220 | be4b44c5 | Jan Kiszka | } |
221 | be4b44c5 | Jan Kiszka | |
222 | e59fb374 | Juan Quintela | static int hpet_post_load(void *opaque, int version_id) |
223 | 16b29ae1 | aliguori | { |
224 | 16b29ae1 | aliguori | HPETState *s = opaque; |
225 | c50c2d68 | aurel32 | |
226 | 16b29ae1 | aliguori | /* Recalculate the offset between the main counter and guest time */
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227 | 74475455 | Paolo Bonzini | s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock); |
228 | be4b44c5 | Jan Kiszka | |
229 | be4b44c5 | Jan Kiszka | /* Push number of timers into capability returned via HPET_ID */
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230 | be4b44c5 | Jan Kiszka | s->capability &= ~HPET_ID_NUM_TIM_MASK; |
231 | be4b44c5 | Jan Kiszka | s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
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232 | 40ac17cd | Gleb Natapov | hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; |
233 | 8caa0065 | Jan Kiszka | |
234 | 8caa0065 | Jan Kiszka | /* Derive HPET_MSI_SUPPORT from the capability of the first timer. */
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235 | 8caa0065 | Jan Kiszka | s->flags &= ~(1 << HPET_MSI_SUPPORT);
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236 | 8caa0065 | Jan Kiszka | if (s->timer[0].config & HPET_TN_FSB_CAP) { |
237 | 8caa0065 | Jan Kiszka | s->flags |= 1 << HPET_MSI_SUPPORT;
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238 | 8caa0065 | Jan Kiszka | } |
239 | 16b29ae1 | aliguori | return 0; |
240 | 16b29ae1 | aliguori | } |
241 | 16b29ae1 | aliguori | |
242 | e6cb4d45 | Juan Quintela | static const VMStateDescription vmstate_hpet_timer = { |
243 | e6cb4d45 | Juan Quintela | .name = "hpet_timer",
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244 | e6cb4d45 | Juan Quintela | .version_id = 1,
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245 | e6cb4d45 | Juan Quintela | .minimum_version_id = 1,
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246 | e6cb4d45 | Juan Quintela | .minimum_version_id_old = 1,
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247 | e6cb4d45 | Juan Quintela | .fields = (VMStateField []) { |
248 | e6cb4d45 | Juan Quintela | VMSTATE_UINT8(tn, HPETTimer), |
249 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(config, HPETTimer), |
250 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(cmp, HPETTimer), |
251 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(fsb, HPETTimer), |
252 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(period, HPETTimer), |
253 | e6cb4d45 | Juan Quintela | VMSTATE_UINT8(wrap_flag, HPETTimer), |
254 | e6cb4d45 | Juan Quintela | VMSTATE_TIMER(qemu_timer, HPETTimer), |
255 | e6cb4d45 | Juan Quintela | VMSTATE_END_OF_LIST() |
256 | e6cb4d45 | Juan Quintela | } |
257 | e6cb4d45 | Juan Quintela | }; |
258 | e6cb4d45 | Juan Quintela | |
259 | e6cb4d45 | Juan Quintela | static const VMStateDescription vmstate_hpet = { |
260 | e6cb4d45 | Juan Quintela | .name = "hpet",
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261 | be4b44c5 | Jan Kiszka | .version_id = 2,
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262 | e6cb4d45 | Juan Quintela | .minimum_version_id = 1,
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263 | e6cb4d45 | Juan Quintela | .minimum_version_id_old = 1,
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264 | e6cb4d45 | Juan Quintela | .pre_save = hpet_pre_save, |
265 | be4b44c5 | Jan Kiszka | .pre_load = hpet_pre_load, |
266 | e6cb4d45 | Juan Quintela | .post_load = hpet_post_load, |
267 | e6cb4d45 | Juan Quintela | .fields = (VMStateField []) { |
268 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(config, HPETState), |
269 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(isr, HPETState), |
270 | e6cb4d45 | Juan Quintela | VMSTATE_UINT64(hpet_counter, HPETState), |
271 | be4b44c5 | Jan Kiszka | VMSTATE_UINT8_V(num_timers, HPETState, 2),
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272 | be4b44c5 | Jan Kiszka | VMSTATE_STRUCT_VARRAY_UINT8(timer, HPETState, num_timers, 0,
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273 | be4b44c5 | Jan Kiszka | vmstate_hpet_timer, HPETTimer), |
274 | e6cb4d45 | Juan Quintela | VMSTATE_END_OF_LIST() |
275 | e6cb4d45 | Juan Quintela | } |
276 | e6cb4d45 | Juan Quintela | }; |
277 | e6cb4d45 | Juan Quintela | |
278 | c50c2d68 | aurel32 | /*
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279 | 16b29ae1 | aliguori | * timer expiration callback
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280 | 16b29ae1 | aliguori | */
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281 | 16b29ae1 | aliguori | static void hpet_timer(void *opaque) |
282 | 16b29ae1 | aliguori | { |
283 | 27bb0b2d | Jan Kiszka | HPETTimer *t = opaque; |
284 | 16b29ae1 | aliguori | uint64_t diff; |
285 | 16b29ae1 | aliguori | |
286 | 16b29ae1 | aliguori | uint64_t period = t->period; |
287 | b7eaa6c7 | Jan Kiszka | uint64_t cur_tick = hpet_get_ticks(t->state); |
288 | 16b29ae1 | aliguori | |
289 | 16b29ae1 | aliguori | if (timer_is_periodic(t) && period != 0) { |
290 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT) {
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291 | 27bb0b2d | Jan Kiszka | while (hpet_time_after(cur_tick, t->cmp)) {
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292 | 16b29ae1 | aliguori | t->cmp = (uint32_t)(t->cmp + t->period); |
293 | 27bb0b2d | Jan Kiszka | } |
294 | 27bb0b2d | Jan Kiszka | } else {
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295 | 27bb0b2d | Jan Kiszka | while (hpet_time_after64(cur_tick, t->cmp)) {
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296 | 16b29ae1 | aliguori | t->cmp += period; |
297 | 27bb0b2d | Jan Kiszka | } |
298 | 27bb0b2d | Jan Kiszka | } |
299 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
300 | 27bb0b2d | Jan Kiszka | qemu_mod_timer(t->qemu_timer, |
301 | 74475455 | Paolo Bonzini | qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff)); |
302 | 16b29ae1 | aliguori | } else if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) { |
303 | 16b29ae1 | aliguori | if (t->wrap_flag) {
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304 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
305 | 74475455 | Paolo Bonzini | qemu_mod_timer(t->qemu_timer, qemu_get_clock_ns(vm_clock) + |
306 | 27bb0b2d | Jan Kiszka | (int64_t)ticks_to_ns(diff)); |
307 | 16b29ae1 | aliguori | t->wrap_flag = 0;
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308 | 16b29ae1 | aliguori | } |
309 | 16b29ae1 | aliguori | } |
310 | 22a9fe38 | Jan Kiszka | update_irq(t, 1);
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311 | 16b29ae1 | aliguori | } |
312 | 16b29ae1 | aliguori | |
313 | 16b29ae1 | aliguori | static void hpet_set_timer(HPETTimer *t) |
314 | 16b29ae1 | aliguori | { |
315 | 16b29ae1 | aliguori | uint64_t diff; |
316 | 16b29ae1 | aliguori | uint32_t wrap_diff; /* how many ticks until we wrap? */
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317 | b7eaa6c7 | Jan Kiszka | uint64_t cur_tick = hpet_get_ticks(t->state); |
318 | c50c2d68 | aurel32 | |
319 | 16b29ae1 | aliguori | /* whenever new timer is being set up, make sure wrap_flag is 0 */
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320 | 16b29ae1 | aliguori | t->wrap_flag = 0;
|
321 | 16b29ae1 | aliguori | diff = hpet_calculate_diff(t, cur_tick); |
322 | 16b29ae1 | aliguori | |
323 | c50c2d68 | aurel32 | /* hpet spec says in one-shot 32-bit mode, generate an interrupt when
|
324 | 16b29ae1 | aliguori | * counter wraps in addition to an interrupt with comparator match.
|
325 | c50c2d68 | aurel32 | */
|
326 | 16b29ae1 | aliguori | if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) {
|
327 | 16b29ae1 | aliguori | wrap_diff = 0xffffffff - (uint32_t)cur_tick;
|
328 | 16b29ae1 | aliguori | if (wrap_diff < (uint32_t)diff) {
|
329 | 16b29ae1 | aliguori | diff = wrap_diff; |
330 | c50c2d68 | aurel32 | t->wrap_flag = 1;
|
331 | 16b29ae1 | aliguori | } |
332 | 16b29ae1 | aliguori | } |
333 | 27bb0b2d | Jan Kiszka | qemu_mod_timer(t->qemu_timer, |
334 | 74475455 | Paolo Bonzini | qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff)); |
335 | 16b29ae1 | aliguori | } |
336 | 16b29ae1 | aliguori | |
337 | 16b29ae1 | aliguori | static void hpet_del_timer(HPETTimer *t) |
338 | 16b29ae1 | aliguori | { |
339 | 16b29ae1 | aliguori | qemu_del_timer(t->qemu_timer); |
340 | 22a9fe38 | Jan Kiszka | update_irq(t, 0);
|
341 | 16b29ae1 | aliguori | } |
342 | 16b29ae1 | aliguori | |
343 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
344 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readb(void *opaque, target_phys_addr_t addr) |
345 | 16b29ae1 | aliguori | { |
346 | 16b29ae1 | aliguori | printf("qemu: hpet_read b at %" PRIx64 "\n", addr); |
347 | 16b29ae1 | aliguori | return 0; |
348 | 16b29ae1 | aliguori | } |
349 | 16b29ae1 | aliguori | |
350 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readw(void *opaque, target_phys_addr_t addr) |
351 | 16b29ae1 | aliguori | { |
352 | 16b29ae1 | aliguori | printf("qemu: hpet_read w at %" PRIx64 "\n", addr); |
353 | 16b29ae1 | aliguori | return 0; |
354 | 16b29ae1 | aliguori | } |
355 | 16b29ae1 | aliguori | #endif
|
356 | 16b29ae1 | aliguori | |
357 | c227f099 | Anthony Liguori | static uint32_t hpet_ram_readl(void *opaque, target_phys_addr_t addr) |
358 | 16b29ae1 | aliguori | { |
359 | 27bb0b2d | Jan Kiszka | HPETState *s = opaque; |
360 | 16b29ae1 | aliguori | uint64_t cur_tick, index; |
361 | 16b29ae1 | aliguori | |
362 | d0f2c4c6 | malc | DPRINTF("qemu: Enter hpet_ram_readl at %" PRIx64 "\n", addr); |
363 | 16b29ae1 | aliguori | index = addr; |
364 | 16b29ae1 | aliguori | /*address range of all TN regs*/
|
365 | 16b29ae1 | aliguori | if (index >= 0x100 && index <= 0x3ff) { |
366 | 16b29ae1 | aliguori | uint8_t timer_id = (addr - 0x100) / 0x20; |
367 | 27bb0b2d | Jan Kiszka | HPETTimer *timer = &s->timer[timer_id]; |
368 | 27bb0b2d | Jan Kiszka | |
369 | be4b44c5 | Jan Kiszka | if (timer_id > s->num_timers) {
|
370 | 6982d664 | Jan Kiszka | DPRINTF("qemu: timer id out of range\n");
|
371 | 16b29ae1 | aliguori | return 0; |
372 | 16b29ae1 | aliguori | } |
373 | 16b29ae1 | aliguori | |
374 | 16b29ae1 | aliguori | switch ((addr - 0x100) % 0x20) { |
375 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG:
|
376 | 27bb0b2d | Jan Kiszka | return timer->config;
|
377 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG + 4: // Interrupt capabilities |
378 | 27bb0b2d | Jan Kiszka | return timer->config >> 32; |
379 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP: // comparator register |
380 | 27bb0b2d | Jan Kiszka | return timer->cmp;
|
381 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP + 4: |
382 | 27bb0b2d | Jan Kiszka | return timer->cmp >> 32; |
383 | 27bb0b2d | Jan Kiszka | case HPET_TN_ROUTE:
|
384 | 8caa0065 | Jan Kiszka | return timer->fsb;
|
385 | 8caa0065 | Jan Kiszka | case HPET_TN_ROUTE + 4: |
386 | 27bb0b2d | Jan Kiszka | return timer->fsb >> 32; |
387 | 27bb0b2d | Jan Kiszka | default:
|
388 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_readl\n");
|
389 | 27bb0b2d | Jan Kiszka | break;
|
390 | 16b29ae1 | aliguori | } |
391 | 16b29ae1 | aliguori | } else {
|
392 | 16b29ae1 | aliguori | switch (index) {
|
393 | 27bb0b2d | Jan Kiszka | case HPET_ID:
|
394 | 27bb0b2d | Jan Kiszka | return s->capability;
|
395 | 27bb0b2d | Jan Kiszka | case HPET_PERIOD:
|
396 | 27bb0b2d | Jan Kiszka | return s->capability >> 32; |
397 | 27bb0b2d | Jan Kiszka | case HPET_CFG:
|
398 | 27bb0b2d | Jan Kiszka | return s->config;
|
399 | 27bb0b2d | Jan Kiszka | case HPET_CFG + 4: |
400 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_CFG + 4 hpet_ram_readl \n");
|
401 | 27bb0b2d | Jan Kiszka | return 0; |
402 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER:
|
403 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
404 | b7eaa6c7 | Jan Kiszka | cur_tick = hpet_get_ticks(s); |
405 | 27bb0b2d | Jan Kiszka | } else {
|
406 | 27bb0b2d | Jan Kiszka | cur_tick = s->hpet_counter; |
407 | 27bb0b2d | Jan Kiszka | } |
408 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: reading counter = %" PRIx64 "\n", cur_tick); |
409 | 27bb0b2d | Jan Kiszka | return cur_tick;
|
410 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER + 4: |
411 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
412 | b7eaa6c7 | Jan Kiszka | cur_tick = hpet_get_ticks(s); |
413 | 27bb0b2d | Jan Kiszka | } else {
|
414 | 27bb0b2d | Jan Kiszka | cur_tick = s->hpet_counter; |
415 | 27bb0b2d | Jan Kiszka | } |
416 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: reading counter + 4 = %" PRIx64 "\n", cur_tick); |
417 | 27bb0b2d | Jan Kiszka | return cur_tick >> 32; |
418 | 27bb0b2d | Jan Kiszka | case HPET_STATUS:
|
419 | 27bb0b2d | Jan Kiszka | return s->isr;
|
420 | 27bb0b2d | Jan Kiszka | default:
|
421 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_readl\n");
|
422 | 27bb0b2d | Jan Kiszka | break;
|
423 | 16b29ae1 | aliguori | } |
424 | 16b29ae1 | aliguori | } |
425 | 16b29ae1 | aliguori | return 0; |
426 | 16b29ae1 | aliguori | } |
427 | 16b29ae1 | aliguori | |
428 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
429 | c227f099 | Anthony Liguori | static void hpet_ram_writeb(void *opaque, target_phys_addr_t addr, |
430 | 16b29ae1 | aliguori | uint32_t value) |
431 | 16b29ae1 | aliguori | { |
432 | c50c2d68 | aurel32 | printf("qemu: invalid hpet_write b at %" PRIx64 " = %#x\n", |
433 | 16b29ae1 | aliguori | addr, value); |
434 | 16b29ae1 | aliguori | } |
435 | 16b29ae1 | aliguori | |
436 | c227f099 | Anthony Liguori | static void hpet_ram_writew(void *opaque, target_phys_addr_t addr, |
437 | 16b29ae1 | aliguori | uint32_t value) |
438 | 16b29ae1 | aliguori | { |
439 | c50c2d68 | aurel32 | printf("qemu: invalid hpet_write w at %" PRIx64 " = %#x\n", |
440 | 16b29ae1 | aliguori | addr, value); |
441 | 16b29ae1 | aliguori | } |
442 | 16b29ae1 | aliguori | #endif
|
443 | 16b29ae1 | aliguori | |
444 | c227f099 | Anthony Liguori | static void hpet_ram_writel(void *opaque, target_phys_addr_t addr, |
445 | 16b29ae1 | aliguori | uint32_t value) |
446 | 16b29ae1 | aliguori | { |
447 | 16b29ae1 | aliguori | int i;
|
448 | 27bb0b2d | Jan Kiszka | HPETState *s = opaque; |
449 | ce536cfd | Beth Kon | uint64_t old_val, new_val, val, index; |
450 | 16b29ae1 | aliguori | |
451 | d0f2c4c6 | malc | DPRINTF("qemu: Enter hpet_ram_writel at %" PRIx64 " = %#x\n", addr, value); |
452 | 16b29ae1 | aliguori | index = addr; |
453 | 16b29ae1 | aliguori | old_val = hpet_ram_readl(opaque, addr); |
454 | 16b29ae1 | aliguori | new_val = value; |
455 | 16b29ae1 | aliguori | |
456 | 16b29ae1 | aliguori | /*address range of all TN regs*/
|
457 | 16b29ae1 | aliguori | if (index >= 0x100 && index <= 0x3ff) { |
458 | 16b29ae1 | aliguori | uint8_t timer_id = (addr - 0x100) / 0x20; |
459 | 16b29ae1 | aliguori | HPETTimer *timer = &s->timer[timer_id]; |
460 | c50c2d68 | aurel32 | |
461 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel timer_id = %#x \n", timer_id);
|
462 | be4b44c5 | Jan Kiszka | if (timer_id > s->num_timers) {
|
463 | 6982d664 | Jan Kiszka | DPRINTF("qemu: timer id out of range\n");
|
464 | 6982d664 | Jan Kiszka | return;
|
465 | 6982d664 | Jan Kiszka | } |
466 | 16b29ae1 | aliguori | switch ((addr - 0x100) % 0x20) { |
467 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG:
|
468 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CFG\n");
|
469 | 8caa0065 | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_TN_FSB_ENABLE)) {
|
470 | 8caa0065 | Jan Kiszka | update_irq(timer, 0);
|
471 | 8caa0065 | Jan Kiszka | } |
472 | 27bb0b2d | Jan Kiszka | val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); |
473 | 27bb0b2d | Jan Kiszka | timer->config = (timer->config & 0xffffffff00000000ULL) | val;
|
474 | 27bb0b2d | Jan Kiszka | if (new_val & HPET_TN_32BIT) {
|
475 | 27bb0b2d | Jan Kiszka | timer->cmp = (uint32_t)timer->cmp; |
476 | 27bb0b2d | Jan Kiszka | timer->period = (uint32_t)timer->period; |
477 | 27bb0b2d | Jan Kiszka | } |
478 | 9cec89e8 | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_TN_ENABLE)) {
|
479 | 9cec89e8 | Jan Kiszka | hpet_set_timer(timer); |
480 | 9cec89e8 | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_TN_ENABLE)) { |
481 | 9cec89e8 | Jan Kiszka | hpet_del_timer(timer); |
482 | 9cec89e8 | Jan Kiszka | } |
483 | 27bb0b2d | Jan Kiszka | break;
|
484 | 27bb0b2d | Jan Kiszka | case HPET_TN_CFG + 4: // Interrupt capabilities |
485 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_TN_CFG+4 write\n");
|
486 | 27bb0b2d | Jan Kiszka | break;
|
487 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP: // comparator register |
488 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CMP \n");
|
489 | 27bb0b2d | Jan Kiszka | if (timer->config & HPET_TN_32BIT) {
|
490 | 27bb0b2d | Jan Kiszka | new_val = (uint32_t)new_val; |
491 | 27bb0b2d | Jan Kiszka | } |
492 | 27bb0b2d | Jan Kiszka | if (!timer_is_periodic(timer)
|
493 | 27bb0b2d | Jan Kiszka | || (timer->config & HPET_TN_SETVAL)) { |
494 | 27bb0b2d | Jan Kiszka | timer->cmp = (timer->cmp & 0xffffffff00000000ULL) | new_val;
|
495 | 27bb0b2d | Jan Kiszka | } |
496 | 27bb0b2d | Jan Kiszka | if (timer_is_periodic(timer)) {
|
497 | 27bb0b2d | Jan Kiszka | /*
|
498 | 27bb0b2d | Jan Kiszka | * FIXME: Clamp period to reasonable min value?
|
499 | 27bb0b2d | Jan Kiszka | * Clamp period to reasonable max value
|
500 | 27bb0b2d | Jan Kiszka | */
|
501 | 27bb0b2d | Jan Kiszka | new_val &= (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1; |
502 | 27bb0b2d | Jan Kiszka | timer->period = |
503 | 27bb0b2d | Jan Kiszka | (timer->period & 0xffffffff00000000ULL) | new_val;
|
504 | 27bb0b2d | Jan Kiszka | } |
505 | 27bb0b2d | Jan Kiszka | timer->config &= ~HPET_TN_SETVAL; |
506 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
507 | 27bb0b2d | Jan Kiszka | hpet_set_timer(timer); |
508 | 27bb0b2d | Jan Kiszka | } |
509 | 27bb0b2d | Jan Kiszka | break;
|
510 | 27bb0b2d | Jan Kiszka | case HPET_TN_CMP + 4: // comparator register high order |
511 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: hpet_ram_writel HPET_TN_CMP + 4\n");
|
512 | 27bb0b2d | Jan Kiszka | if (!timer_is_periodic(timer)
|
513 | 27bb0b2d | Jan Kiszka | || (timer->config & HPET_TN_SETVAL)) { |
514 | 27bb0b2d | Jan Kiszka | timer->cmp = (timer->cmp & 0xffffffffULL) | new_val << 32; |
515 | 27bb0b2d | Jan Kiszka | } else {
|
516 | 27bb0b2d | Jan Kiszka | /*
|
517 | 27bb0b2d | Jan Kiszka | * FIXME: Clamp period to reasonable min value?
|
518 | 27bb0b2d | Jan Kiszka | * Clamp period to reasonable max value
|
519 | 27bb0b2d | Jan Kiszka | */
|
520 | 27bb0b2d | Jan Kiszka | new_val &= (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1; |
521 | 27bb0b2d | Jan Kiszka | timer->period = |
522 | 27bb0b2d | Jan Kiszka | (timer->period & 0xffffffffULL) | new_val << 32; |
523 | 16b29ae1 | aliguori | } |
524 | 16b29ae1 | aliguori | timer->config &= ~HPET_TN_SETVAL; |
525 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
526 | 16b29ae1 | aliguori | hpet_set_timer(timer); |
527 | 16b29ae1 | aliguori | } |
528 | 16b29ae1 | aliguori | break;
|
529 | 8caa0065 | Jan Kiszka | case HPET_TN_ROUTE:
|
530 | 8caa0065 | Jan Kiszka | timer->fsb = (timer->fsb & 0xffffffff00000000ULL) | new_val;
|
531 | 8caa0065 | Jan Kiszka | break;
|
532 | 27bb0b2d | Jan Kiszka | case HPET_TN_ROUTE + 4: |
533 | 8caa0065 | Jan Kiszka | timer->fsb = (new_val << 32) | (timer->fsb & 0xffffffff); |
534 | 27bb0b2d | Jan Kiszka | break;
|
535 | 27bb0b2d | Jan Kiszka | default:
|
536 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_writel\n");
|
537 | 27bb0b2d | Jan Kiszka | break;
|
538 | 16b29ae1 | aliguori | } |
539 | 16b29ae1 | aliguori | return;
|
540 | 16b29ae1 | aliguori | } else {
|
541 | 16b29ae1 | aliguori | switch (index) {
|
542 | 27bb0b2d | Jan Kiszka | case HPET_ID:
|
543 | 27bb0b2d | Jan Kiszka | return;
|
544 | 27bb0b2d | Jan Kiszka | case HPET_CFG:
|
545 | 27bb0b2d | Jan Kiszka | val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); |
546 | 27bb0b2d | Jan Kiszka | s->config = (s->config & 0xffffffff00000000ULL) | val;
|
547 | 27bb0b2d | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
|
548 | 27bb0b2d | Jan Kiszka | /* Enable main counter and interrupt generation. */
|
549 | 27bb0b2d | Jan Kiszka | s->hpet_offset = |
550 | 74475455 | Paolo Bonzini | ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock); |
551 | be4b44c5 | Jan Kiszka | for (i = 0; i < s->num_timers; i++) { |
552 | 27bb0b2d | Jan Kiszka | if ((&s->timer[i])->cmp != ~0ULL) { |
553 | 27bb0b2d | Jan Kiszka | hpet_set_timer(&s->timer[i]); |
554 | 27bb0b2d | Jan Kiszka | } |
555 | 16b29ae1 | aliguori | } |
556 | 27bb0b2d | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_CFG_ENABLE)) { |
557 | 27bb0b2d | Jan Kiszka | /* Halt main counter and disable interrupt generation. */
|
558 | b7eaa6c7 | Jan Kiszka | s->hpet_counter = hpet_get_ticks(s); |
559 | be4b44c5 | Jan Kiszka | for (i = 0; i < s->num_timers; i++) { |
560 | 27bb0b2d | Jan Kiszka | hpet_del_timer(&s->timer[i]); |
561 | 16b29ae1 | aliguori | } |
562 | 27bb0b2d | Jan Kiszka | } |
563 | 27bb0b2d | Jan Kiszka | /* i8254 and RTC are disabled when HPET is in legacy mode */
|
564 | 27bb0b2d | Jan Kiszka | if (activating_bit(old_val, new_val, HPET_CFG_LEGACY)) {
|
565 | 27bb0b2d | Jan Kiszka | hpet_pit_disable(); |
566 | 7d932dfd | Jan Kiszka | qemu_irq_lower(s->irqs[RTC_ISA_IRQ]); |
567 | 27bb0b2d | Jan Kiszka | } else if (deactivating_bit(old_val, new_val, HPET_CFG_LEGACY)) { |
568 | 27bb0b2d | Jan Kiszka | hpet_pit_enable(); |
569 | 7d932dfd | Jan Kiszka | qemu_set_irq(s->irqs[RTC_ISA_IRQ], s->rtc_irq_level); |
570 | 27bb0b2d | Jan Kiszka | } |
571 | 27bb0b2d | Jan Kiszka | break;
|
572 | 27bb0b2d | Jan Kiszka | case HPET_CFG + 4: |
573 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid HPET_CFG+4 write \n");
|
574 | 27bb0b2d | Jan Kiszka | break;
|
575 | 27bb0b2d | Jan Kiszka | case HPET_STATUS:
|
576 | 22a9fe38 | Jan Kiszka | val = new_val & s->isr; |
577 | be4b44c5 | Jan Kiszka | for (i = 0; i < s->num_timers; i++) { |
578 | 22a9fe38 | Jan Kiszka | if (val & (1 << i)) { |
579 | 22a9fe38 | Jan Kiszka | update_irq(&s->timer[i], 0);
|
580 | 22a9fe38 | Jan Kiszka | } |
581 | 22a9fe38 | Jan Kiszka | } |
582 | 27bb0b2d | Jan Kiszka | break;
|
583 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER:
|
584 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
585 | ad0a6551 | Jan Kiszka | DPRINTF("qemu: Writing counter while HPET enabled!\n");
|
586 | 27bb0b2d | Jan Kiszka | } |
587 | 27bb0b2d | Jan Kiszka | s->hpet_counter = |
588 | 27bb0b2d | Jan Kiszka | (s->hpet_counter & 0xffffffff00000000ULL) | value;
|
589 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: HPET counter written. ctr = %#x -> %" PRIx64 "\n", |
590 | 27bb0b2d | Jan Kiszka | value, s->hpet_counter); |
591 | 27bb0b2d | Jan Kiszka | break;
|
592 | 27bb0b2d | Jan Kiszka | case HPET_COUNTER + 4: |
593 | b7eaa6c7 | Jan Kiszka | if (hpet_enabled(s)) {
|
594 | ad0a6551 | Jan Kiszka | DPRINTF("qemu: Writing counter while HPET enabled!\n");
|
595 | 27bb0b2d | Jan Kiszka | } |
596 | 27bb0b2d | Jan Kiszka | s->hpet_counter = |
597 | 27bb0b2d | Jan Kiszka | (s->hpet_counter & 0xffffffffULL) | (((uint64_t)value) << 32); |
598 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: HPET counter + 4 written. ctr = %#x -> %" PRIx64 "\n", |
599 | 27bb0b2d | Jan Kiszka | value, s->hpet_counter); |
600 | 27bb0b2d | Jan Kiszka | break;
|
601 | 27bb0b2d | Jan Kiszka | default:
|
602 | 27bb0b2d | Jan Kiszka | DPRINTF("qemu: invalid hpet_ram_writel\n");
|
603 | 27bb0b2d | Jan Kiszka | break;
|
604 | 16b29ae1 | aliguori | } |
605 | 16b29ae1 | aliguori | } |
606 | 16b29ae1 | aliguori | } |
607 | 16b29ae1 | aliguori | |
608 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const hpet_ram_read[] = { |
609 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
|
610 | 16b29ae1 | aliguori | hpet_ram_readb, |
611 | 16b29ae1 | aliguori | hpet_ram_readw, |
612 | 16b29ae1 | aliguori | #else
|
613 | 16b29ae1 | aliguori | NULL,
|
614 | 16b29ae1 | aliguori | NULL,
|
615 | 16b29ae1 | aliguori | #endif
|
616 | 16b29ae1 | aliguori | hpet_ram_readl, |
617 | 16b29ae1 | aliguori | }; |
618 | 16b29ae1 | aliguori | |
619 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const hpet_ram_write[] = { |
620 | 16b29ae1 | aliguori | #ifdef HPET_DEBUG
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621 | 16b29ae1 | aliguori | hpet_ram_writeb, |
622 | 16b29ae1 | aliguori | hpet_ram_writew, |
623 | 16b29ae1 | aliguori | #else
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624 | 16b29ae1 | aliguori | NULL,
|
625 | 16b29ae1 | aliguori | NULL,
|
626 | 16b29ae1 | aliguori | #endif
|
627 | 16b29ae1 | aliguori | hpet_ram_writel, |
628 | 16b29ae1 | aliguori | }; |
629 | 16b29ae1 | aliguori | |
630 | 822557eb | Jan Kiszka | static void hpet_reset(DeviceState *d) |
631 | 27bb0b2d | Jan Kiszka | { |
632 | 822557eb | Jan Kiszka | HPETState *s = FROM_SYSBUS(HPETState, sysbus_from_qdev(d)); |
633 | 16b29ae1 | aliguori | int i;
|
634 | 16b29ae1 | aliguori | static int count = 0; |
635 | 16b29ae1 | aliguori | |
636 | be4b44c5 | Jan Kiszka | for (i = 0; i < s->num_timers; i++) { |
637 | 16b29ae1 | aliguori | HPETTimer *timer = &s->timer[i]; |
638 | 27bb0b2d | Jan Kiszka | |
639 | 16b29ae1 | aliguori | hpet_del_timer(timer); |
640 | 16b29ae1 | aliguori | timer->cmp = ~0ULL;
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641 | 8caa0065 | Jan Kiszka | timer->config = HPET_TN_PERIODIC_CAP | HPET_TN_SIZE_CAP; |
642 | 8caa0065 | Jan Kiszka | if (s->flags & (1 << HPET_MSI_SUPPORT)) { |
643 | 8caa0065 | Jan Kiszka | timer->config |= HPET_TN_FSB_CAP; |
644 | 8caa0065 | Jan Kiszka | } |
645 | ce536cfd | Beth Kon | /* advertise availability of ioapic inti2 */
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646 | ce536cfd | Beth Kon | timer->config |= 0x00000004ULL << 32; |
647 | 16b29ae1 | aliguori | timer->period = 0ULL;
|
648 | 16b29ae1 | aliguori | timer->wrap_flag = 0;
|
649 | 16b29ae1 | aliguori | } |
650 | 16b29ae1 | aliguori | |
651 | 16b29ae1 | aliguori | s->hpet_counter = 0ULL;
|
652 | 16b29ae1 | aliguori | s->hpet_offset = 0ULL;
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653 | 7d93b1fa | Beth Kon | s->config = 0ULL;
|
654 | 27bb0b2d | Jan Kiszka | if (count > 0) { |
655 | c50c2d68 | aurel32 | /* we don't enable pit when hpet_reset is first called (by hpet_init)
|
656 | 16b29ae1 | aliguori | * because hpet is taking over for pit here. On subsequent invocations,
|
657 | 16b29ae1 | aliguori | * hpet_reset is called due to system reset. At this point control must
|
658 | c50c2d68 | aurel32 | * be returned to pit until SW reenables hpet.
|
659 | 16b29ae1 | aliguori | */
|
660 | 16b29ae1 | aliguori | hpet_pit_enable(); |
661 | 27bb0b2d | Jan Kiszka | } |
662 | 40ac17cd | Gleb Natapov | hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; |
663 | 40ac17cd | Gleb Natapov | hpet_cfg.hpet[s->hpet_id].address = sysbus_from_qdev(d)->mmio[0].addr;
|
664 | 16b29ae1 | aliguori | count = 1;
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665 | 16b29ae1 | aliguori | } |
666 | 16b29ae1 | aliguori | |
667 | 7d932dfd | Jan Kiszka | static void hpet_handle_rtc_irq(void *opaque, int n, int level) |
668 | 7d932dfd | Jan Kiszka | { |
669 | 7d932dfd | Jan Kiszka | HPETState *s = FROM_SYSBUS(HPETState, opaque); |
670 | 7d932dfd | Jan Kiszka | |
671 | 7d932dfd | Jan Kiszka | s->rtc_irq_level = level; |
672 | 7d932dfd | Jan Kiszka | if (!hpet_in_legacy_mode(s)) {
|
673 | 7d932dfd | Jan Kiszka | qemu_set_irq(s->irqs[RTC_ISA_IRQ], level); |
674 | 7d932dfd | Jan Kiszka | } |
675 | 7d932dfd | Jan Kiszka | } |
676 | 7d932dfd | Jan Kiszka | |
677 | 822557eb | Jan Kiszka | static int hpet_init(SysBusDevice *dev) |
678 | 27bb0b2d | Jan Kiszka | { |
679 | 822557eb | Jan Kiszka | HPETState *s = FROM_SYSBUS(HPETState, dev); |
680 | 16b29ae1 | aliguori | int i, iomemtype;
|
681 | 27bb0b2d | Jan Kiszka | HPETTimer *timer; |
682 | 16b29ae1 | aliguori | |
683 | d2c5efd8 | Stefan Weil | if (hpet_cfg.count == UINT8_MAX) {
|
684 | d2c5efd8 | Stefan Weil | /* first instance */
|
685 | 40ac17cd | Gleb Natapov | hpet_cfg.count = 0;
|
686 | d2c5efd8 | Stefan Weil | } |
687 | 40ac17cd | Gleb Natapov | |
688 | 40ac17cd | Gleb Natapov | if (hpet_cfg.count == 8) { |
689 | 40ac17cd | Gleb Natapov | fprintf(stderr, "Only 8 instances of HPET is allowed\n");
|
690 | 40ac17cd | Gleb Natapov | return -1; |
691 | 40ac17cd | Gleb Natapov | } |
692 | 40ac17cd | Gleb Natapov | |
693 | 40ac17cd | Gleb Natapov | s->hpet_id = hpet_cfg.count++; |
694 | 40ac17cd | Gleb Natapov | |
695 | 822557eb | Jan Kiszka | for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) { |
696 | 822557eb | Jan Kiszka | sysbus_init_irq(dev, &s->irqs[i]); |
697 | 822557eb | Jan Kiszka | } |
698 | be4b44c5 | Jan Kiszka | |
699 | be4b44c5 | Jan Kiszka | if (s->num_timers < HPET_MIN_TIMERS) {
|
700 | be4b44c5 | Jan Kiszka | s->num_timers = HPET_MIN_TIMERS; |
701 | be4b44c5 | Jan Kiszka | } else if (s->num_timers > HPET_MAX_TIMERS) { |
702 | be4b44c5 | Jan Kiszka | s->num_timers = HPET_MAX_TIMERS; |
703 | be4b44c5 | Jan Kiszka | } |
704 | be4b44c5 | Jan Kiszka | for (i = 0; i < HPET_MAX_TIMERS; i++) { |
705 | 27bb0b2d | Jan Kiszka | timer = &s->timer[i]; |
706 | 74475455 | Paolo Bonzini | timer->qemu_timer = qemu_new_timer_ns(vm_clock, hpet_timer, timer); |
707 | 7afbecc9 | Jan Kiszka | timer->tn = i; |
708 | 7afbecc9 | Jan Kiszka | timer->state = s; |
709 | 16b29ae1 | aliguori | } |
710 | 822557eb | Jan Kiszka | |
711 | 072c2c31 | Jan Kiszka | /* 64-bit main counter; LegacyReplacementRoute. */
|
712 | 072c2c31 | Jan Kiszka | s->capability = 0x8086a001ULL;
|
713 | 072c2c31 | Jan Kiszka | s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
|
714 | 072c2c31 | Jan Kiszka | s->capability |= ((HPET_CLK_PERIOD) << 32);
|
715 | 072c2c31 | Jan Kiszka | |
716 | 7d932dfd | Jan Kiszka | qdev_init_gpio_in(&dev->qdev, hpet_handle_rtc_irq, 1);
|
717 | 7d932dfd | Jan Kiszka | |
718 | 16b29ae1 | aliguori | /* HPET Area */
|
719 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(hpet_ram_read, |
720 | 2507c12a | Alexander Graf | hpet_ram_write, s, |
721 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
722 | 822557eb | Jan Kiszka | sysbus_init_mmio(dev, 0x400, iomemtype);
|
723 | 822557eb | Jan Kiszka | return 0; |
724 | 16b29ae1 | aliguori | } |
725 | 822557eb | Jan Kiszka | |
726 | 822557eb | Jan Kiszka | static SysBusDeviceInfo hpet_device_info = {
|
727 | 822557eb | Jan Kiszka | .qdev.name = "hpet",
|
728 | 822557eb | Jan Kiszka | .qdev.size = sizeof(HPETState),
|
729 | 822557eb | Jan Kiszka | .qdev.no_user = 1,
|
730 | 822557eb | Jan Kiszka | .qdev.vmsd = &vmstate_hpet, |
731 | 822557eb | Jan Kiszka | .qdev.reset = hpet_reset, |
732 | 822557eb | Jan Kiszka | .init = hpet_init, |
733 | be4b44c5 | Jan Kiszka | .qdev.props = (Property[]) { |
734 | be4b44c5 | Jan Kiszka | DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
|
735 | 8caa0065 | Jan Kiszka | DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), |
736 | be4b44c5 | Jan Kiszka | DEFINE_PROP_END_OF_LIST(), |
737 | be4b44c5 | Jan Kiszka | }, |
738 | 822557eb | Jan Kiszka | }; |
739 | 822557eb | Jan Kiszka | |
740 | 822557eb | Jan Kiszka | static void hpet_register_device(void) |
741 | 822557eb | Jan Kiszka | { |
742 | 822557eb | Jan Kiszka | sysbus_register_withprop(&hpet_device_info); |
743 | 822557eb | Jan Kiszka | } |
744 | 822557eb | Jan Kiszka | |
745 | 822557eb | Jan Kiszka | device_init(hpet_register_device) |