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1 | 0428527c | Isaku Yamahata | /*
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2 | 0428527c | Isaku Yamahata | * pcie.c
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3 | 0428527c | Isaku Yamahata | *
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4 | 0428527c | Isaku Yamahata | * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
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5 | 0428527c | Isaku Yamahata | * VA Linux Systems Japan K.K.
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6 | 0428527c | Isaku Yamahata | *
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7 | 0428527c | Isaku Yamahata | * This program is free software; you can redistribute it and/or modify
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8 | 0428527c | Isaku Yamahata | * it under the terms of the GNU General Public License as published by
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9 | 0428527c | Isaku Yamahata | * the Free Software Foundation; either version 2 of the License, or
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10 | 0428527c | Isaku Yamahata | * (at your option) any later version.
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11 | 0428527c | Isaku Yamahata | *
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12 | 0428527c | Isaku Yamahata | * This program is distributed in the hope that it will be useful,
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13 | 0428527c | Isaku Yamahata | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 0428527c | Isaku Yamahata | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | 0428527c | Isaku Yamahata | * GNU General Public License for more details.
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16 | 0428527c | Isaku Yamahata | *
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17 | 0428527c | Isaku Yamahata | * You should have received a copy of the GNU General Public License along
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18 | 0428527c | Isaku Yamahata | * with this program; if not, see <http://www.gnu.org/licenses/>.
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19 | 0428527c | Isaku Yamahata | */
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20 | 0428527c | Isaku Yamahata | |
21 | d8dfad9c | Blue Swirl | #include "qemu-common.h" |
22 | 0428527c | Isaku Yamahata | #include "pci_bridge.h" |
23 | 0428527c | Isaku Yamahata | #include "pcie.h" |
24 | 0428527c | Isaku Yamahata | #include "msix.h" |
25 | 0428527c | Isaku Yamahata | #include "msi.h" |
26 | 0428527c | Isaku Yamahata | #include "pci_internals.h" |
27 | 0428527c | Isaku Yamahata | #include "pcie_regs.h" |
28 | 5afb9869 | Blue Swirl | #include "range.h" |
29 | 0428527c | Isaku Yamahata | |
30 | 0428527c | Isaku Yamahata | //#define DEBUG_PCIE
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31 | 0428527c | Isaku Yamahata | #ifdef DEBUG_PCIE
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32 | 0428527c | Isaku Yamahata | # define PCIE_DPRINTF(fmt, ...) \
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33 | 0428527c | Isaku Yamahata | fprintf(stderr, "%s:%d " fmt, __func__, __LINE__, ## __VA_ARGS__) |
34 | 0428527c | Isaku Yamahata | #else
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35 | 0428527c | Isaku Yamahata | # define PCIE_DPRINTF(fmt, ...) do {} while (0) |
36 | 0428527c | Isaku Yamahata | #endif
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37 | 0428527c | Isaku Yamahata | #define PCIE_DEV_PRINTF(dev, fmt, ...) \
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38 | 0428527c | Isaku Yamahata | PCIE_DPRINTF("%s:%x "fmt, (dev)->name, (dev)->devfn, ## __VA_ARGS__) |
39 | 0428527c | Isaku Yamahata | |
40 | 0428527c | Isaku Yamahata | |
41 | 0428527c | Isaku Yamahata | /***************************************************************************
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42 | 0428527c | Isaku Yamahata | * pci express capability helper functions
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43 | 0428527c | Isaku Yamahata | */
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44 | 0428527c | Isaku Yamahata | int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
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45 | 0428527c | Isaku Yamahata | { |
46 | 0428527c | Isaku Yamahata | int pos;
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47 | 0428527c | Isaku Yamahata | uint8_t *exp_cap; |
48 | 0428527c | Isaku Yamahata | |
49 | 0428527c | Isaku Yamahata | assert(pci_is_express(dev)); |
50 | 0428527c | Isaku Yamahata | |
51 | 0428527c | Isaku Yamahata | pos = pci_add_capability(dev, PCI_CAP_ID_EXP, offset, |
52 | 0428527c | Isaku Yamahata | PCI_EXP_VER2_SIZEOF); |
53 | 0428527c | Isaku Yamahata | if (pos < 0) { |
54 | 0428527c | Isaku Yamahata | return pos;
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55 | 0428527c | Isaku Yamahata | } |
56 | 0428527c | Isaku Yamahata | dev->exp.exp_cap = pos; |
57 | 0428527c | Isaku Yamahata | exp_cap = dev->config + pos; |
58 | 0428527c | Isaku Yamahata | |
59 | 0428527c | Isaku Yamahata | /* capability register
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60 | 0428527c | Isaku Yamahata | interrupt message number defaults to 0 */
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61 | 0428527c | Isaku Yamahata | pci_set_word(exp_cap + PCI_EXP_FLAGS, |
62 | 0428527c | Isaku Yamahata | ((type << PCI_EXP_FLAGS_TYPE_SHIFT) & PCI_EXP_FLAGS_TYPE) | |
63 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_VER2); |
64 | 0428527c | Isaku Yamahata | |
65 | 0428527c | Isaku Yamahata | /* device capability register
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66 | 0428527c | Isaku Yamahata | * table 7-12:
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67 | 0428527c | Isaku Yamahata | * roll based error reporting bit must be set by all
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68 | 0428527c | Isaku Yamahata | * Functions conforming to the ECN, PCI Express Base
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69 | 0428527c | Isaku Yamahata | * Specification, Revision 1.1., or subsequent PCI Express Base
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70 | 0428527c | Isaku Yamahata | * Specification revisions.
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71 | 0428527c | Isaku Yamahata | */
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72 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_DEVCAP, PCI_EXP_DEVCAP_RBER); |
73 | 0428527c | Isaku Yamahata | |
74 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_LNKCAP, |
75 | 0428527c | Isaku Yamahata | (port << PCI_EXP_LNKCAP_PN_SHIFT) | |
76 | 0428527c | Isaku Yamahata | PCI_EXP_LNKCAP_ASPMS_0S | |
77 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_MLW_1 | |
78 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_LS_25); |
79 | 0428527c | Isaku Yamahata | |
80 | 0428527c | Isaku Yamahata | pci_set_word(exp_cap + PCI_EXP_LNKSTA, |
81 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25); |
82 | 0428527c | Isaku Yamahata | |
83 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_DEVCAP2, |
84 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); |
85 | 0428527c | Isaku Yamahata | |
86 | 0428527c | Isaku Yamahata | pci_set_word(dev->wmask + pos, PCI_EXP_DEVCTL2_EETLPPB); |
87 | 0428527c | Isaku Yamahata | return pos;
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88 | 0428527c | Isaku Yamahata | } |
89 | 0428527c | Isaku Yamahata | |
90 | 0428527c | Isaku Yamahata | void pcie_cap_exit(PCIDevice *dev)
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91 | 0428527c | Isaku Yamahata | { |
92 | 0428527c | Isaku Yamahata | pci_del_capability(dev, PCI_CAP_ID_EXP, PCI_EXP_VER2_SIZEOF); |
93 | 0428527c | Isaku Yamahata | } |
94 | 0428527c | Isaku Yamahata | |
95 | 0428527c | Isaku Yamahata | uint8_t pcie_cap_get_type(const PCIDevice *dev)
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96 | 0428527c | Isaku Yamahata | { |
97 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
98 | 0428527c | Isaku Yamahata | assert(pos > 0);
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99 | 0428527c | Isaku Yamahata | return (pci_get_word(dev->config + pos + PCI_EXP_FLAGS) &
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100 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_TYPE) >> PCI_EXP_FLAGS_TYPE_SHIFT; |
101 | 0428527c | Isaku Yamahata | } |
102 | 0428527c | Isaku Yamahata | |
103 | 0428527c | Isaku Yamahata | /* MSI/MSI-X */
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104 | 0428527c | Isaku Yamahata | /* pci express interrupt message number */
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105 | 0428527c | Isaku Yamahata | /* 7.8.2 PCI Express Capabilities Register: Interrupt Message Number */
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106 | 0428527c | Isaku Yamahata | void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector)
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107 | 0428527c | Isaku Yamahata | { |
108 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + dev->exp.exp_cap; |
109 | 0428527c | Isaku Yamahata | assert(vector < 32);
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110 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_FLAGS, PCI_EXP_FLAGS_IRQ); |
111 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_FLAGS, |
112 | 0428527c | Isaku Yamahata | vector << PCI_EXP_FLAGS_IRQ_SHIFT); |
113 | 0428527c | Isaku Yamahata | } |
114 | 0428527c | Isaku Yamahata | |
115 | 0428527c | Isaku Yamahata | uint8_t pcie_cap_flags_get_vector(PCIDevice *dev) |
116 | 0428527c | Isaku Yamahata | { |
117 | 0428527c | Isaku Yamahata | return (pci_get_word(dev->config + dev->exp.exp_cap + PCI_EXP_FLAGS) &
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118 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_IRQ) >> PCI_EXP_FLAGS_IRQ_SHIFT; |
119 | 0428527c | Isaku Yamahata | } |
120 | 0428527c | Isaku Yamahata | |
121 | 0428527c | Isaku Yamahata | void pcie_cap_deverr_init(PCIDevice *dev)
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122 | 0428527c | Isaku Yamahata | { |
123 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
124 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP, |
125 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP_RBER); |
126 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL, |
127 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | |
128 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); |
129 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->w1cmask + pos + PCI_EXP_DEVSTA, |
130 | 0428527c | Isaku Yamahata | PCI_EXP_DEVSTA_CED | PCI_EXP_DEVSTA_NFED | |
131 | 0428527c | Isaku Yamahata | PCI_EXP_DEVSTA_URD | PCI_EXP_DEVSTA_URD); |
132 | 0428527c | Isaku Yamahata | } |
133 | 0428527c | Isaku Yamahata | |
134 | 0428527c | Isaku Yamahata | void pcie_cap_deverr_reset(PCIDevice *dev)
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135 | 0428527c | Isaku Yamahata | { |
136 | 0428527c | Isaku Yamahata | uint8_t *devctl = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL; |
137 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(devctl, |
138 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | |
139 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); |
140 | 0428527c | Isaku Yamahata | } |
141 | 0428527c | Isaku Yamahata | |
142 | 6bde6aaa | Michael S. Tsirkin | static void hotplug_event_update_event_status(PCIDevice *dev) |
143 | 6bde6aaa | Michael S. Tsirkin | { |
144 | 6bde6aaa | Michael S. Tsirkin | uint32_t pos = dev->exp.exp_cap; |
145 | 6bde6aaa | Michael S. Tsirkin | uint8_t *exp_cap = dev->config + pos; |
146 | 6bde6aaa | Michael S. Tsirkin | uint16_t sltctl = pci_get_word(exp_cap + PCI_EXP_SLTCTL); |
147 | 6bde6aaa | Michael S. Tsirkin | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
148 | 6bde6aaa | Michael S. Tsirkin | |
149 | 6bde6aaa | Michael S. Tsirkin | dev->exp.hpev_notified = (sltctl & PCI_EXP_SLTCTL_HPIE) && |
150 | 6bde6aaa | Michael S. Tsirkin | (sltsta & sltctl & PCI_EXP_HP_EV_SUPPORTED); |
151 | 6bde6aaa | Michael S. Tsirkin | } |
152 | 6bde6aaa | Michael S. Tsirkin | |
153 | 6bde6aaa | Michael S. Tsirkin | static void hotplug_event_notify(PCIDevice *dev) |
154 | 6bde6aaa | Michael S. Tsirkin | { |
155 | 6bde6aaa | Michael S. Tsirkin | bool prev = dev->exp.hpev_notified;
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156 | 6bde6aaa | Michael S. Tsirkin | |
157 | 6bde6aaa | Michael S. Tsirkin | hotplug_event_update_event_status(dev); |
158 | 6bde6aaa | Michael S. Tsirkin | |
159 | 6bde6aaa | Michael S. Tsirkin | if (prev == dev->exp.hpev_notified) {
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160 | 6bde6aaa | Michael S. Tsirkin | return;
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161 | 6bde6aaa | Michael S. Tsirkin | } |
162 | 6bde6aaa | Michael S. Tsirkin | |
163 | 6bde6aaa | Michael S. Tsirkin | /* Note: the logic above does not take into account whether interrupts
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164 | 6bde6aaa | Michael S. Tsirkin | * are masked. The result is that interrupt will be sent when it is
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165 | 6bde6aaa | Michael S. Tsirkin | * subsequently unmasked. This appears to be legal: Section 6.7.3.4:
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166 | 6bde6aaa | Michael S. Tsirkin | * The Port may optionally send an MSI when there are hot-plug events that
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167 | 6bde6aaa | Michael S. Tsirkin | * occur while interrupt generation is disabled, and interrupt generation is
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168 | 6bde6aaa | Michael S. Tsirkin | * subsequently enabled. */
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169 | 4a9dd665 | Michael S. Tsirkin | if (msix_enabled(dev)) {
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170 | 4a9dd665 | Michael S. Tsirkin | msix_notify(dev, pcie_cap_flags_get_vector(dev)); |
171 | 4a9dd665 | Michael S. Tsirkin | } else if (msi_enabled(dev)) { |
172 | 4a9dd665 | Michael S. Tsirkin | msi_notify(dev, pcie_cap_flags_get_vector(dev)); |
173 | 4a9dd665 | Michael S. Tsirkin | } else {
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174 | 6bde6aaa | Michael S. Tsirkin | qemu_set_irq(dev->irq[dev->exp.hpev_intx], dev->exp.hpev_notified); |
175 | 6bde6aaa | Michael S. Tsirkin | } |
176 | 6bde6aaa | Michael S. Tsirkin | } |
177 | 6bde6aaa | Michael S. Tsirkin | |
178 | 0428527c | Isaku Yamahata | /*
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179 | 0428527c | Isaku Yamahata | * A PCI Express Hot-Plug Event has occured, so update slot status register
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180 | 0428527c | Isaku Yamahata | * and notify OS of the event if necessary.
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181 | 0428527c | Isaku Yamahata | *
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182 | 0428527c | Isaku Yamahata | * 6.7.3 PCI Express Hot-Plug Events
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183 | 0428527c | Isaku Yamahata | * 6.7.3.4 Software Notification of Hot-Plug Events
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184 | 0428527c | Isaku Yamahata | */
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185 | 0428527c | Isaku Yamahata | static void pcie_cap_slot_event(PCIDevice *dev, PCIExpressHotPlugEvent event) |
186 | 0428527c | Isaku Yamahata | { |
187 | 6bde6aaa | Michael S. Tsirkin | /* Minor optimization: if nothing changed - no event is needed. */
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188 | 6bde6aaa | Michael S. Tsirkin | if (pci_word_test_and_set_mask(dev->config + dev->exp.exp_cap +
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189 | 6bde6aaa | Michael S. Tsirkin | PCI_EXP_SLTSTA, event)) { |
190 | 0428527c | Isaku Yamahata | return;
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191 | 0428527c | Isaku Yamahata | } |
192 | 6bde6aaa | Michael S. Tsirkin | hotplug_event_notify(dev); |
193 | 0428527c | Isaku Yamahata | } |
194 | 0428527c | Isaku Yamahata | |
195 | 0428527c | Isaku Yamahata | static int pcie_cap_slot_hotplug(DeviceState *qdev, |
196 | 4cff0a59 | Michael S. Tsirkin | PCIDevice *pci_dev, PCIHotplugState state) |
197 | 0428527c | Isaku Yamahata | { |
198 | 0428527c | Isaku Yamahata | PCIDevice *d = DO_UPCAST(PCIDevice, qdev, qdev); |
199 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = d->config + d->exp.exp_cap; |
200 | 0428527c | Isaku Yamahata | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
201 | 0428527c | Isaku Yamahata | |
202 | 4cff0a59 | Michael S. Tsirkin | /* Don't send event when device is enabled during qemu machine creation:
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203 | 4cff0a59 | Michael S. Tsirkin | * it is present on boot, no hotplug event is necessary. We do send an
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204 | 4cff0a59 | Michael S. Tsirkin | * event when the device is disabled later. */
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205 | 4cff0a59 | Michael S. Tsirkin | if (state == PCI_COLDPLUG_ENABLED) {
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206 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA, |
207 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
208 | 0428527c | Isaku Yamahata | return 0; |
209 | 0428527c | Isaku Yamahata | } |
210 | 0428527c | Isaku Yamahata | |
211 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(pci_dev, "hotplug state: %d\n", state);
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212 | 0428527c | Isaku Yamahata | if (sltsta & PCI_EXP_SLTSTA_EIS) {
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213 | 0428527c | Isaku Yamahata | /* the slot is electromechanically locked.
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214 | 0428527c | Isaku Yamahata | * This error is propagated up to qdev and then to HMP/QMP.
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215 | 0428527c | Isaku Yamahata | */
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216 | 0428527c | Isaku Yamahata | return -EBUSY;
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217 | 0428527c | Isaku Yamahata | } |
218 | 0428527c | Isaku Yamahata | |
219 | 0428527c | Isaku Yamahata | /* TODO: multifunction hot-plug.
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220 | 0428527c | Isaku Yamahata | * Right now, only a device of function = 0 is allowed to be
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221 | 0428527c | Isaku Yamahata | * hot plugged/unplugged.
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222 | 0428527c | Isaku Yamahata | */
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223 | 0428527c | Isaku Yamahata | assert(PCI_FUNC(pci_dev->devfn) == 0);
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224 | 0428527c | Isaku Yamahata | |
225 | 4cff0a59 | Michael S. Tsirkin | if (state == PCI_HOTPLUG_ENABLED) {
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226 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA, |
227 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
228 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(d, PCI_EXP_HP_EV_PDC); |
229 | 0428527c | Isaku Yamahata | } else {
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230 | 0428527c | Isaku Yamahata | qdev_free(&pci_dev->qdev); |
231 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTSTA, |
232 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
233 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(d, PCI_EXP_HP_EV_PDC); |
234 | 0428527c | Isaku Yamahata | } |
235 | 0428527c | Isaku Yamahata | return 0; |
236 | 0428527c | Isaku Yamahata | } |
237 | 0428527c | Isaku Yamahata | |
238 | 0428527c | Isaku Yamahata | /* pci express slot for pci express root/downstream port
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239 | 0428527c | Isaku Yamahata | PCI express capability slot registers */
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240 | 0428527c | Isaku Yamahata | void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot)
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241 | 0428527c | Isaku Yamahata | { |
242 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
243 | 0428527c | Isaku Yamahata | |
244 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->config + pos + PCI_EXP_FLAGS, |
245 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_SLOT); |
246 | 0428527c | Isaku Yamahata | |
247 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(dev->config + pos + PCI_EXP_SLTCAP, |
248 | 0428527c | Isaku Yamahata | ~PCI_EXP_SLTCAP_PSN); |
249 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP, |
250 | 0428527c | Isaku Yamahata | (slot << PCI_EXP_SLTCAP_PSN_SHIFT) | |
251 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_EIP | |
252 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_HPS | |
253 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_HPC | |
254 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_PIP | |
255 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_AIP | |
256 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_ABP); |
257 | 0428527c | Isaku Yamahata | |
258 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(dev->config + pos + PCI_EXP_SLTCTL, |
259 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
260 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC); |
261 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCTL, |
262 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC_OFF | |
263 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC_OFF); |
264 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + pos + PCI_EXP_SLTCTL, |
265 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
266 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC | |
267 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_HPIE | |
268 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_CCIE | |
269 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PDCE | |
270 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_ABPE); |
271 | 0428527c | Isaku Yamahata | /* Although reading PCI_EXP_SLTCTL_EIC returns always 0,
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272 | 0428527c | Isaku Yamahata | * make the bit writable here in order to detect 1b is written.
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273 | 0428527c | Isaku Yamahata | * pcie_cap_slot_write_config() test-and-clear the bit, so
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274 | 0428527c | Isaku Yamahata | * this bit always returns 0 to the guest.
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275 | 0428527c | Isaku Yamahata | */
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276 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + pos + PCI_EXP_SLTCTL, |
277 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_EIC); |
278 | 0428527c | Isaku Yamahata | |
279 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->w1cmask + pos + PCI_EXP_SLTSTA, |
280 | 0428527c | Isaku Yamahata | PCI_EXP_HP_EV_SUPPORTED); |
281 | 0428527c | Isaku Yamahata | |
282 | 6bde6aaa | Michael S. Tsirkin | dev->exp.hpev_notified = false;
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283 | 6bde6aaa | Michael S. Tsirkin | |
284 | 0428527c | Isaku Yamahata | pci_bus_hotplug(pci_bridge_get_sec_bus(DO_UPCAST(PCIBridge, dev, dev)), |
285 | 0428527c | Isaku Yamahata | pcie_cap_slot_hotplug, &dev->qdev); |
286 | 0428527c | Isaku Yamahata | } |
287 | 0428527c | Isaku Yamahata | |
288 | 0428527c | Isaku Yamahata | void pcie_cap_slot_reset(PCIDevice *dev)
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289 | 0428527c | Isaku Yamahata | { |
290 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + dev->exp.exp_cap; |
291 | 0428527c | Isaku Yamahata | |
292 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(dev, "reset\n");
|
293 | 0428527c | Isaku Yamahata | |
294 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTCTL, |
295 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_EIC | |
296 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
297 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC | |
298 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_HPIE | |
299 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_CCIE | |
300 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PDCE | |
301 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_ABPE); |
302 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTCTL, |
303 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC_OFF | |
304 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC_OFF); |
305 | 0428527c | Isaku Yamahata | |
306 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTSTA, |
307 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_EIS |/* on reset,
|
308 | 0428527c | Isaku Yamahata | the lock is released */
|
309 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_CC | |
310 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDC | |
311 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_ABP); |
312 | 6bde6aaa | Michael S. Tsirkin | |
313 | 804b2071 | Michael S. Tsirkin | hotplug_event_update_event_status(dev); |
314 | 0428527c | Isaku Yamahata | } |
315 | 0428527c | Isaku Yamahata | |
316 | 0428527c | Isaku Yamahata | void pcie_cap_slot_write_config(PCIDevice *dev,
|
317 | 6bde6aaa | Michael S. Tsirkin | uint32_t addr, uint32_t val, int len)
|
318 | 0428527c | Isaku Yamahata | { |
319 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
320 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + pos; |
321 | 0428527c | Isaku Yamahata | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
322 | 0428527c | Isaku Yamahata | |
323 | ac0cdda3 | Michael S. Tsirkin | if (!ranges_overlap(addr, len, pos + PCI_EXP_SLTCTL, 2)) { |
324 | ac0cdda3 | Michael S. Tsirkin | return;
|
325 | ac0cdda3 | Michael S. Tsirkin | } |
326 | ac0cdda3 | Michael S. Tsirkin | |
327 | ac0cdda3 | Michael S. Tsirkin | if (pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTCTL,
|
328 | ac0cdda3 | Michael S. Tsirkin | PCI_EXP_SLTCTL_EIC)) { |
329 | ac0cdda3 | Michael S. Tsirkin | sltsta ^= PCI_EXP_SLTSTA_EIS; /* toggle PCI_EXP_SLTSTA_EIS bit */
|
330 | ac0cdda3 | Michael S. Tsirkin | pci_set_word(exp_cap + PCI_EXP_SLTSTA, sltsta); |
331 | ac0cdda3 | Michael S. Tsirkin | PCIE_DEV_PRINTF(dev, "PCI_EXP_SLTCTL_EIC: "
|
332 | ac0cdda3 | Michael S. Tsirkin | "sltsta -> 0x%02"PRIx16"\n", |
333 | ac0cdda3 | Michael S. Tsirkin | sltsta); |
334 | ac0cdda3 | Michael S. Tsirkin | } |
335 | 0428527c | Isaku Yamahata | |
336 | 6bde6aaa | Michael S. Tsirkin | hotplug_event_notify(dev); |
337 | ac0cdda3 | Michael S. Tsirkin | |
338 | ac0cdda3 | Michael S. Tsirkin | /*
|
339 | ac0cdda3 | Michael S. Tsirkin | * 6.7.3.2 Command Completed Events
|
340 | ac0cdda3 | Michael S. Tsirkin | *
|
341 | ac0cdda3 | Michael S. Tsirkin | * Software issues a command to a hot-plug capable Downstream Port by
|
342 | ac0cdda3 | Michael S. Tsirkin | * issuing a write transaction that targets any portion of the Portโs Slot
|
343 | ac0cdda3 | Michael S. Tsirkin | * Control register. A single write to the Slot Control register is
|
344 | ac0cdda3 | Michael S. Tsirkin | * considered to be a single command, even if the write affects more than
|
345 | ac0cdda3 | Michael S. Tsirkin | * one field in the Slot Control register. In response to this transaction,
|
346 | ac0cdda3 | Michael S. Tsirkin | * the Port must carry out the requested actions and then set the
|
347 | ac0cdda3 | Michael S. Tsirkin | * associated status field for the command completed event. */
|
348 | ac0cdda3 | Michael S. Tsirkin | |
349 | ac0cdda3 | Michael S. Tsirkin | /* Real hardware might take a while to complete requested command because
|
350 | ac0cdda3 | Michael S. Tsirkin | * physical movement would be involved like locking the electromechanical
|
351 | ac0cdda3 | Michael S. Tsirkin | * lock. However in our case, command is completed instantaneously above,
|
352 | ac0cdda3 | Michael S. Tsirkin | * so send a command completion event right now.
|
353 | ac0cdda3 | Michael S. Tsirkin | */
|
354 | ac0cdda3 | Michael S. Tsirkin | pcie_cap_slot_event(dev, PCI_EXP_HP_EV_CCI); |
355 | 0428527c | Isaku Yamahata | } |
356 | 0428527c | Isaku Yamahata | |
357 | 6bde6aaa | Michael S. Tsirkin | int pcie_cap_slot_post_load(void *opaque, int version_id) |
358 | 6bde6aaa | Michael S. Tsirkin | { |
359 | 6bde6aaa | Michael S. Tsirkin | PCIDevice *dev = opaque; |
360 | 6bde6aaa | Michael S. Tsirkin | hotplug_event_update_event_status(dev); |
361 | 6bde6aaa | Michael S. Tsirkin | return 0; |
362 | 6bde6aaa | Michael S. Tsirkin | } |
363 | 6bde6aaa | Michael S. Tsirkin | |
364 | 0428527c | Isaku Yamahata | void pcie_cap_slot_push_attention_button(PCIDevice *dev)
|
365 | 0428527c | Isaku Yamahata | { |
366 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(dev, PCI_EXP_HP_EV_ABP); |
367 | 0428527c | Isaku Yamahata | } |
368 | 0428527c | Isaku Yamahata | |
369 | 0428527c | Isaku Yamahata | /* root control/capabilities/status. PME isn't emulated for now */
|
370 | 0428527c | Isaku Yamahata | void pcie_cap_root_init(PCIDevice *dev)
|
371 | 0428527c | Isaku Yamahata | { |
372 | 0428527c | Isaku Yamahata | pci_set_word(dev->wmask + dev->exp.exp_cap + PCI_EXP_RTCTL, |
373 | 0428527c | Isaku Yamahata | PCI_EXP_RTCTL_SECEE | PCI_EXP_RTCTL_SENFEE | |
374 | 0428527c | Isaku Yamahata | PCI_EXP_RTCTL_SEFEE); |
375 | 0428527c | Isaku Yamahata | } |
376 | 0428527c | Isaku Yamahata | |
377 | 0428527c | Isaku Yamahata | void pcie_cap_root_reset(PCIDevice *dev)
|
378 | 0428527c | Isaku Yamahata | { |
379 | 0428527c | Isaku Yamahata | pci_set_word(dev->config + dev->exp.exp_cap + PCI_EXP_RTCTL, 0);
|
380 | 0428527c | Isaku Yamahata | } |
381 | 0428527c | Isaku Yamahata | |
382 | 0428527c | Isaku Yamahata | /* function level reset(FLR) */
|
383 | 0428527c | Isaku Yamahata | void pcie_cap_flr_init(PCIDevice *dev)
|
384 | 0428527c | Isaku Yamahata | { |
385 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCAP, |
386 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP_FLR); |
387 | 0428527c | Isaku Yamahata | |
388 | 0428527c | Isaku Yamahata | /* Although reading BCR_FLR returns always 0,
|
389 | 0428527c | Isaku Yamahata | * the bit is made writable here in order to detect the 1b is written
|
390 | 0428527c | Isaku Yamahata | * pcie_cap_flr_write_config() test-and-clear the bit, so
|
391 | 0428527c | Isaku Yamahata | * this bit always returns 0 to the guest.
|
392 | 0428527c | Isaku Yamahata | */
|
393 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + dev->exp.exp_cap + PCI_EXP_DEVCTL, |
394 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_BCR_FLR); |
395 | 0428527c | Isaku Yamahata | } |
396 | 0428527c | Isaku Yamahata | |
397 | 0428527c | Isaku Yamahata | void pcie_cap_flr_write_config(PCIDevice *dev,
|
398 | 0428527c | Isaku Yamahata | uint32_t addr, uint32_t val, int len)
|
399 | 0428527c | Isaku Yamahata | { |
400 | 0428527c | Isaku Yamahata | uint8_t *devctl = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL; |
401 | 0ead87c8 | Isaku Yamahata | if (pci_get_word(devctl) & PCI_EXP_DEVCTL_BCR_FLR) {
|
402 | 0ead87c8 | Isaku Yamahata | /* Clear PCI_EXP_DEVCTL_BCR_FLR after invoking the reset handler
|
403 | 0ead87c8 | Isaku Yamahata | so the handler can detect FLR by looking at this bit. */
|
404 | 0ead87c8 | Isaku Yamahata | pci_device_reset(dev); |
405 | 0ead87c8 | Isaku Yamahata | pci_word_test_and_clear_mask(devctl, PCI_EXP_DEVCTL_BCR_FLR); |
406 | 0428527c | Isaku Yamahata | } |
407 | 0428527c | Isaku Yamahata | } |
408 | 0428527c | Isaku Yamahata | |
409 | 0428527c | Isaku Yamahata | /* Alternative Routing-ID Interpretation (ARI) */
|
410 | 0428527c | Isaku Yamahata | /* ari forwarding support for down stream port */
|
411 | 0428527c | Isaku Yamahata | void pcie_cap_ari_init(PCIDevice *dev)
|
412 | 0428527c | Isaku Yamahata | { |
413 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
414 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP2, |
415 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP2_ARI); |
416 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL2, |
417 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL2_ARI); |
418 | 0428527c | Isaku Yamahata | } |
419 | 0428527c | Isaku Yamahata | |
420 | 0428527c | Isaku Yamahata | void pcie_cap_ari_reset(PCIDevice *dev)
|
421 | 0428527c | Isaku Yamahata | { |
422 | 0428527c | Isaku Yamahata | uint8_t *devctl2 = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2; |
423 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(devctl2, PCI_EXP_DEVCTL2_ARI); |
424 | 0428527c | Isaku Yamahata | } |
425 | 0428527c | Isaku Yamahata | |
426 | 0428527c | Isaku Yamahata | bool pcie_cap_is_ari_enabled(const PCIDevice *dev) |
427 | 0428527c | Isaku Yamahata | { |
428 | 0428527c | Isaku Yamahata | if (!pci_is_express(dev)) {
|
429 | 0428527c | Isaku Yamahata | return false; |
430 | 0428527c | Isaku Yamahata | } |
431 | 0428527c | Isaku Yamahata | if (!dev->exp.exp_cap) {
|
432 | 0428527c | Isaku Yamahata | return false; |
433 | 0428527c | Isaku Yamahata | } |
434 | 0428527c | Isaku Yamahata | |
435 | 0428527c | Isaku Yamahata | return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
|
436 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL2_ARI; |
437 | 0428527c | Isaku Yamahata | } |
438 | 0428527c | Isaku Yamahata | |
439 | 0428527c | Isaku Yamahata | /**************************************************************************
|
440 | 0428527c | Isaku Yamahata | * pci express extended capability allocation functions
|
441 | 0428527c | Isaku Yamahata | * uint16_t ext_cap_id (16 bit)
|
442 | 0428527c | Isaku Yamahata | * uint8_t cap_ver (4 bit)
|
443 | 0428527c | Isaku Yamahata | * uint16_t cap_offset (12 bit)
|
444 | 0428527c | Isaku Yamahata | * uint16_t ext_cap_size
|
445 | 0428527c | Isaku Yamahata | */
|
446 | 0428527c | Isaku Yamahata | |
447 | 0428527c | Isaku Yamahata | static uint16_t pcie_find_capability_list(PCIDevice *dev, uint16_t cap_id,
|
448 | 0428527c | Isaku Yamahata | uint16_t *prev_p) |
449 | 0428527c | Isaku Yamahata | { |
450 | 0428527c | Isaku Yamahata | uint16_t prev = 0;
|
451 | 0428527c | Isaku Yamahata | uint16_t next; |
452 | 0428527c | Isaku Yamahata | uint32_t header = pci_get_long(dev->config + PCI_CONFIG_SPACE_SIZE); |
453 | 0428527c | Isaku Yamahata | |
454 | 0428527c | Isaku Yamahata | if (!header) {
|
455 | 0428527c | Isaku Yamahata | /* no extended capability */
|
456 | 0428527c | Isaku Yamahata | next = 0;
|
457 | 0428527c | Isaku Yamahata | goto out;
|
458 | 0428527c | Isaku Yamahata | } |
459 | 0428527c | Isaku Yamahata | for (next = PCI_CONFIG_SPACE_SIZE; next;
|
460 | 0428527c | Isaku Yamahata | prev = next, next = PCI_EXT_CAP_NEXT(header)) { |
461 | 0428527c | Isaku Yamahata | |
462 | 0428527c | Isaku Yamahata | assert(next >= PCI_CONFIG_SPACE_SIZE); |
463 | 0428527c | Isaku Yamahata | assert(next <= PCIE_CONFIG_SPACE_SIZE - 8);
|
464 | 0428527c | Isaku Yamahata | |
465 | 0428527c | Isaku Yamahata | header = pci_get_long(dev->config + next); |
466 | 0428527c | Isaku Yamahata | if (PCI_EXT_CAP_ID(header) == cap_id) {
|
467 | 0428527c | Isaku Yamahata | break;
|
468 | 0428527c | Isaku Yamahata | } |
469 | 0428527c | Isaku Yamahata | } |
470 | 0428527c | Isaku Yamahata | |
471 | 0428527c | Isaku Yamahata | out:
|
472 | 0428527c | Isaku Yamahata | if (prev_p) {
|
473 | 0428527c | Isaku Yamahata | *prev_p = prev; |
474 | 0428527c | Isaku Yamahata | } |
475 | 0428527c | Isaku Yamahata | return next;
|
476 | 0428527c | Isaku Yamahata | } |
477 | 0428527c | Isaku Yamahata | |
478 | 0428527c | Isaku Yamahata | uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id) |
479 | 0428527c | Isaku Yamahata | { |
480 | 0428527c | Isaku Yamahata | return pcie_find_capability_list(dev, cap_id, NULL); |
481 | 0428527c | Isaku Yamahata | } |
482 | 0428527c | Isaku Yamahata | |
483 | 0428527c | Isaku Yamahata | static void pcie_ext_cap_set_next(PCIDevice *dev, uint16_t pos, uint16_t next) |
484 | 0428527c | Isaku Yamahata | { |
485 | 0428527c | Isaku Yamahata | uint16_t header = pci_get_long(dev->config + pos); |
486 | 0428527c | Isaku Yamahata | assert(!(next & (PCI_EXT_CAP_ALIGN - 1)));
|
487 | 0428527c | Isaku Yamahata | header = (header & ~PCI_EXT_CAP_NEXT_MASK) | |
488 | 0428527c | Isaku Yamahata | ((next << PCI_EXT_CAP_NEXT_SHIFT) & PCI_EXT_CAP_NEXT_MASK); |
489 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + pos, header); |
490 | 0428527c | Isaku Yamahata | } |
491 | 0428527c | Isaku Yamahata | |
492 | 0428527c | Isaku Yamahata | /*
|
493 | 0428527c | Isaku Yamahata | * caller must supply valid (offset, size) * such that the range shouldn't
|
494 | 0428527c | Isaku Yamahata | * overlap with other capability or other registers.
|
495 | 0428527c | Isaku Yamahata | * This function doesn't check it.
|
496 | 0428527c | Isaku Yamahata | */
|
497 | 0428527c | Isaku Yamahata | void pcie_add_capability(PCIDevice *dev,
|
498 | 0428527c | Isaku Yamahata | uint16_t cap_id, uint8_t cap_ver, |
499 | 0428527c | Isaku Yamahata | uint16_t offset, uint16_t size) |
500 | 0428527c | Isaku Yamahata | { |
501 | 0428527c | Isaku Yamahata | uint32_t header; |
502 | 0428527c | Isaku Yamahata | uint16_t next; |
503 | 0428527c | Isaku Yamahata | |
504 | 0428527c | Isaku Yamahata | assert(offset >= PCI_CONFIG_SPACE_SIZE); |
505 | 0428527c | Isaku Yamahata | assert(offset < offset + size); |
506 | 0428527c | Isaku Yamahata | assert(offset + size < PCIE_CONFIG_SPACE_SIZE); |
507 | 0428527c | Isaku Yamahata | assert(size >= 8);
|
508 | 0428527c | Isaku Yamahata | assert(pci_is_express(dev)); |
509 | 0428527c | Isaku Yamahata | |
510 | 0428527c | Isaku Yamahata | if (offset == PCI_CONFIG_SPACE_SIZE) {
|
511 | 0428527c | Isaku Yamahata | header = pci_get_long(dev->config + offset); |
512 | 0428527c | Isaku Yamahata | next = PCI_EXT_CAP_NEXT(header); |
513 | 0428527c | Isaku Yamahata | } else {
|
514 | 0428527c | Isaku Yamahata | uint16_t prev; |
515 | 0428527c | Isaku Yamahata | |
516 | 0428527c | Isaku Yamahata | /* 0 is reserved cap id. use internally to find the last capability
|
517 | 0428527c | Isaku Yamahata | in the linked list */
|
518 | 0428527c | Isaku Yamahata | next = pcie_find_capability_list(dev, 0, &prev);
|
519 | 0428527c | Isaku Yamahata | |
520 | 0428527c | Isaku Yamahata | assert(prev >= PCI_CONFIG_SPACE_SIZE); |
521 | 0428527c | Isaku Yamahata | assert(next == 0);
|
522 | 0428527c | Isaku Yamahata | pcie_ext_cap_set_next(dev, prev, offset); |
523 | 0428527c | Isaku Yamahata | } |
524 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + offset, PCI_EXT_CAP(cap_id, cap_ver, next)); |
525 | 0428527c | Isaku Yamahata | |
526 | 0428527c | Isaku Yamahata | /* Make capability read-only by default */
|
527 | 0428527c | Isaku Yamahata | memset(dev->wmask + offset, 0, size);
|
528 | 0428527c | Isaku Yamahata | memset(dev->w1cmask + offset, 0, size);
|
529 | 0428527c | Isaku Yamahata | /* Check capability by default */
|
530 | 0428527c | Isaku Yamahata | memset(dev->cmask + offset, 0xFF, size);
|
531 | 0428527c | Isaku Yamahata | } |
532 | 0428527c | Isaku Yamahata | |
533 | 0428527c | Isaku Yamahata | /**************************************************************************
|
534 | 0428527c | Isaku Yamahata | * pci express extended capability helper functions
|
535 | 0428527c | Isaku Yamahata | */
|
536 | 0428527c | Isaku Yamahata | |
537 | 0428527c | Isaku Yamahata | /* ARI */
|
538 | 0428527c | Isaku Yamahata | void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn)
|
539 | 0428527c | Isaku Yamahata | { |
540 | 0428527c | Isaku Yamahata | pcie_add_capability(dev, PCI_EXT_CAP_ID_ARI, PCI_ARI_VER, |
541 | 0428527c | Isaku Yamahata | offset, PCI_ARI_SIZEOF); |
542 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + offset + PCI_ARI_CAP, PCI_ARI_CAP_NFN(nextfn)); |
543 | 0428527c | Isaku Yamahata | } |