Revision 1a522e8a
| b/hw/iommu.c | ||
|---|---|---|
| 340 | 340 |
} |
| 341 | 341 |
}; |
| 342 | 342 |
|
| 343 |
static void iommu_reset(void *opaque)
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|
| 343 |
static void iommu_reset(DeviceState *d)
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|
| 344 | 344 |
{
|
| 345 |
IOMMUState *s = opaque;
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|
| 345 |
IOMMUState *s = container_of(d, IOMMUState, busdev.qdev);
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|
| 346 | 346 |
|
| 347 | 347 |
memset(s->regs, 0, IOMMU_NREGS * 4); |
| 348 | 348 |
s->iostart = 0; |
| ... | ... | |
| 363 | 363 |
io = cpu_register_io_memory(iommu_mem_read, iommu_mem_write, s); |
| 364 | 364 |
sysbus_init_mmio(dev, IOMMU_NREGS * sizeof(uint32_t), io); |
| 365 | 365 |
|
| 366 |
vmstate_register(-1, &vmstate_iommu, s); |
|
| 367 |
qemu_register_reset(iommu_reset, s); |
|
| 368 |
iommu_reset(s); |
|
| 366 |
iommu_reset(&s->busdev.qdev); |
|
| 367 |
|
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| 369 | 368 |
return 0; |
| 370 | 369 |
} |
| 371 | 370 |
|
| ... | ... | |
| 373 | 372 |
.init = iommu_init1, |
| 374 | 373 |
.qdev.name = "iommu", |
| 375 | 374 |
.qdev.size = sizeof(IOMMUState), |
| 375 |
.qdev.vmsd = &vmstate_iommu, |
|
| 376 |
.qdev.reset = iommu_reset, |
|
| 376 | 377 |
.qdev.props = (Property[]) {
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| 377 | 378 |
DEFINE_PROP_HEX32("version", IOMMUState, version, 0),
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| 378 | 379 |
DEFINE_PROP_END_OF_LIST(), |
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