Revision 1ac5889f target-s390x/translate.c
| b/target-s390x/translate.c | ||
|---|---|---|
| 293 | 293 |
#endif |
| 294 | 294 |
} |
| 295 | 295 |
|
| 296 |
static inline void return_low128(TCGv_i64 dest) |
|
| 297 |
{
|
|
| 298 |
tcg_gen_ld_i64(dest, cpu_env, offsetof(CPUS390XState, retxl)); |
|
| 299 |
} |
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| 300 |
|
|
| 296 | 301 |
static inline void update_psw_addr(DisasContext *s) |
| 297 | 302 |
{
|
| 298 | 303 |
/* psw.addr */ |
| ... | ... | |
| 1563 | 1568 |
set_cc_nz_u64(s, regs[r1]); |
| 1564 | 1569 |
tcg_temp_free_i64(tmp3); |
| 1565 | 1570 |
break; |
| 1566 |
case 0x86: /* MLG R1,D2(X2,B2) [RXY] */ |
|
| 1567 |
tmp2 = tcg_temp_new_i64(); |
|
| 1568 |
tmp32_1 = tcg_const_i32(r1); |
|
| 1569 |
tcg_gen_qemu_ld64(tmp2, addr, get_mem_index(s)); |
|
| 1570 |
gen_helper_mlg(cpu_env, tmp32_1, tmp2); |
|
| 1571 |
tcg_temp_free_i64(tmp2); |
|
| 1572 |
tcg_temp_free_i32(tmp32_1); |
|
| 1573 |
break; |
|
| 1574 | 1571 |
case 0x87: /* DLG R1,D2(X2,B2) [RXY] */ |
| 1575 | 1572 |
tmp2 = tcg_temp_new_i64(); |
| 1576 | 1573 |
tmp32_1 = tcg_const_i32(r1); |
| ... | ... | |
| 4732 | 4729 |
return NO_EXIT; |
| 4733 | 4730 |
} |
| 4734 | 4731 |
|
| 4732 |
static ExitStatus op_mul128(DisasContext *s, DisasOps *o) |
|
| 4733 |
{
|
|
| 4734 |
gen_helper_mul128(o->out, cpu_env, o->in1, o->in2); |
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| 4735 |
return_low128(o->out2); |
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return NO_EXIT; |
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| 4737 |
} |
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| 4738 |
|
|
| 4735 | 4739 |
static ExitStatus op_sub(DisasContext *s, DisasOps *o) |
| 4736 | 4740 |
{
|
| 4737 | 4741 |
tcg_gen_sub_i64(o->out, o->in1, o->in2); |
| ... | ... | |
| 4800 | 4804 |
o->g_out = true; |
| 4801 | 4805 |
} |
| 4802 | 4806 |
|
| 4807 |
static void prep_r1_P(DisasContext *s, DisasFields *f, DisasOps *o) |
|
| 4808 |
{
|
|
| 4809 |
/* ??? Specification exception: r1 must be even. */ |
|
| 4810 |
int r1 = get_field(f, r1); |
|
| 4811 |
o->out = regs[r1]; |
|
| 4812 |
o->out2 = regs[(r1 + 1) & 15]; |
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| 4813 |
o->g_out = o->g_out2 = true; |
|
| 4814 |
} |
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| 4815 |
|
|
| 4803 | 4816 |
/* ====================================================================== */ |
| 4804 | 4817 |
/* The "Write OUTput" generators. These generally perform some non-trivial |
| 4805 | 4818 |
copy of data to TCG globals, or to main memory. The trivial cases are |
| ... | ... | |
| 4844 | 4857 |
o->g_in1 = true; |
| 4845 | 4858 |
} |
| 4846 | 4859 |
|
| 4860 |
static void in1_r1p1(DisasContext *s, DisasFields *f, DisasOps *o) |
|
| 4861 |
{
|
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| 4862 |
/* ??? Specification exception: r1 must be even. */ |
|
| 4863 |
int r1 = get_field(f, r1); |
|
| 4864 |
o->in1 = load_reg((r1 + 1) & 15); |
|
| 4865 |
} |
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| 4866 |
|
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| 4847 | 4867 |
static void in1_r1p1_32s(DisasContext *s, DisasFields *f, DisasOps *o) |
| 4848 | 4868 |
{
|
| 4849 | 4869 |
/* ??? Specification exception: r1 must be even. */ |
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