root / hw / smbus.h @ 1b9d9ebb
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1 | 3fffc223 | ths | /*
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2 | 3fffc223 | ths | * QEMU SMBus API
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3 | 5fafdf24 | ths | *
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4 | 3fffc223 | ths | * Copyright (c) 2007 Arastra, Inc.
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5 | 5fafdf24 | ths | *
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6 | 3fffc223 | ths | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 3fffc223 | ths | * of this software and associated documentation files (the "Software"), to deal
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8 | 3fffc223 | ths | * in the Software without restriction, including without limitation the rights
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9 | 3fffc223 | ths | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 3fffc223 | ths | * copies of the Software, and to permit persons to whom the Software is
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11 | 3fffc223 | ths | * furnished to do so, subject to the following conditions:
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12 | 3fffc223 | ths | *
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13 | 3fffc223 | ths | * The above copyright notice and this permission notice shall be included in
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14 | 3fffc223 | ths | * all copies or substantial portions of the Software.
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15 | 3fffc223 | ths | *
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16 | 3fffc223 | ths | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 3fffc223 | ths | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 3fffc223 | ths | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 3fffc223 | ths | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 3fffc223 | ths | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 3fffc223 | ths | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 3fffc223 | ths | * THE SOFTWARE.
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23 | 3fffc223 | ths | */
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24 | 3fffc223 | ths | |
25 | 87ecb68b | pbrook | #include "i2c.h" |
26 | 3fffc223 | ths | |
27 | 3fffc223 | ths | struct SMBusDevice {
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28 | 0ff596d0 | pbrook | /* The SMBus protocol is implemented on top of I2C. */
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29 | 0ff596d0 | pbrook | i2c_slave i2c; |
30 | 0ff596d0 | pbrook | |
31 | 0ff596d0 | pbrook | /* Callbacks set by the device. */
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32 | 3fffc223 | ths | void (*quick_cmd)(SMBusDevice *dev, uint8_t read);
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33 | 3fffc223 | ths | void (*send_byte)(SMBusDevice *dev, uint8_t val);
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34 | 3fffc223 | ths | uint8_t (*receive_byte)(SMBusDevice *dev); |
35 | 0ff596d0 | pbrook | /* We can't distinguish between a word write and a block write with
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36 | 0ff596d0 | pbrook | length 1, so pass the whole data block including the length byte
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37 | 0ff596d0 | pbrook | (if present). The device is responsible figuring out what type of
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38 | 0ff596d0 | pbrook | command this is. */
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39 | 0ff596d0 | pbrook | void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len); |
40 | 3f582262 | balrog | /* Likewise we can't distinguish between different reads, or even know
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41 | 0ff596d0 | pbrook | the length of the read until the read is complete, so read data a
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42 | 0ff596d0 | pbrook | byte at a time. The device is responsible for adding the length
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43 | 0ff596d0 | pbrook | byte on block reads. */
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44 | 0ff596d0 | pbrook | uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n);
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45 | 0ff596d0 | pbrook | |
46 | 0ff596d0 | pbrook | /* Remaining fields for internal use only. */
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47 | 0ff596d0 | pbrook | int mode;
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48 | 0ff596d0 | pbrook | int data_len;
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49 | 0ff596d0 | pbrook | uint8_t data_buf[34]; /* command + len + 32 bytes of data. */ |
50 | 0ff596d0 | pbrook | uint8_t command; |
51 | 3fffc223 | ths | }; |
52 | 0ff596d0 | pbrook | |
53 | 0ff596d0 | pbrook | /* Create a slave device. */
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54 | 0ff596d0 | pbrook | SMBusDevice *smbus_device_init(i2c_bus *bus, int address, int size); |
55 | 0ff596d0 | pbrook | |
56 | 0ff596d0 | pbrook | /* Master device commands. */
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57 | 0ff596d0 | pbrook | void smbus_quick_command(i2c_bus *bus, int addr, int read); |
58 | 0ff596d0 | pbrook | uint8_t smbus_receive_byte(i2c_bus *bus, int addr);
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59 | 0ff596d0 | pbrook | void smbus_send_byte(i2c_bus *bus, int addr, uint8_t data); |
60 | 0ff596d0 | pbrook | uint8_t smbus_read_byte(i2c_bus *bus, int addr, uint8_t command);
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61 | 0ff596d0 | pbrook | void smbus_write_byte(i2c_bus *bus, int addr, uint8_t command, uint8_t data); |
62 | 0ff596d0 | pbrook | uint16_t smbus_read_word(i2c_bus *bus, int addr, uint8_t command);
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63 | 0ff596d0 | pbrook | void smbus_write_word(i2c_bus *bus, int addr, uint8_t command, uint16_t data); |
64 | 0ff596d0 | pbrook | int smbus_read_block(i2c_bus *bus, int addr, uint8_t command, uint8_t *data); |
65 | 0ff596d0 | pbrook | void smbus_write_block(i2c_bus *bus, int addr, uint8_t command, uint8_t *data, |
66 | 0ff596d0 | pbrook | int len);
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67 | 0ff596d0 | pbrook | |
68 | 0ff596d0 | pbrook | /* smbus_eeprom.c */
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69 | 0ff596d0 | pbrook | void smbus_eeprom_device_init(i2c_bus *bus, uint8_t addr, uint8_t *buf);
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