Revision 1ba74fb8 target-mips/cpu.h

b/target-mips/cpu.h
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#define MIPS_HFLAG_BL     0x0C00 /* Likely branch                      */
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#define MIPS_HFLAG_BR     0x1000 /* branch to register (can't link TB) */
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    target_ulong btarget;        /* Jump / branch target               */
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    int bcond;                   /* Branch condition (if needed)       */
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    target_ulong bcond;          /* Branch condition (if needed)       */
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    int SYNCI_Step; /* Address step size for SYNCI */


  		





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    int CCRes; /* Cycle count resolution/divisor */


  		












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