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/*
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* Optimizations for Tiny Code Generator for QEMU
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*
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* Copyright (c) 2010 Samsung Electronics.
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* Contributed by Kirill Batuzov <batuzovk@ispras.ru>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "config.h" |
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#include <stdlib.h> |
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#include <stdio.h> |
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#include "qemu-common.h" |
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#include "tcg-op.h" |
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|
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#if TCG_TARGET_REG_BITS == 64 |
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32): \
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glue(glue(case INDEX_op_, x), _i64)
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#else
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32)
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#endif
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|
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typedef enum { |
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TCG_TEMP_UNDEF = 0,
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TCG_TEMP_CONST, |
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TCG_TEMP_COPY, |
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TCG_TEMP_HAS_COPY, |
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TCG_TEMP_ANY |
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} tcg_temp_state; |
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|
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struct tcg_temp_info {
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tcg_temp_state state; |
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uint16_t prev_copy; |
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uint16_t next_copy; |
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tcg_target_ulong val; |
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}; |
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|
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static struct tcg_temp_info temps[TCG_MAX_TEMPS]; |
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|
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/* Reset TEMP's state to TCG_TEMP_ANY. If TEMP was a representative of some
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class of equivalent temp's, a new representative should be chosen in this
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class. */
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static void reset_temp(TCGArg temp, int nb_temps, int nb_globals) |
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{
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int i;
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TCGArg new_base = (TCGArg)-1;
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if (temps[temp].state == TCG_TEMP_HAS_COPY) {
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for (i = temps[temp].next_copy; i != temp; i = temps[i].next_copy) {
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if (i >= nb_globals) {
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temps[i].state = TCG_TEMP_HAS_COPY; |
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new_base = i; |
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break;
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} |
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} |
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for (i = temps[temp].next_copy; i != temp; i = temps[i].next_copy) {
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if (new_base == (TCGArg)-1) { |
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temps[i].state = TCG_TEMP_ANY; |
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} else {
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temps[i].val = new_base; |
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} |
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} |
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temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy; |
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temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy; |
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} else if (temps[temp].state == TCG_TEMP_COPY) { |
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temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy; |
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temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy; |
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new_base = temps[temp].val; |
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} |
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temps[temp].state = TCG_TEMP_ANY; |
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if (new_base != (TCGArg)-1 && temps[new_base].next_copy == new_base) { |
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temps[new_base].state = TCG_TEMP_ANY; |
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} |
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} |
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|
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static int op_bits(int op) |
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{
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switch (op) {
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case INDEX_op_mov_i32:
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case INDEX_op_add_i32:
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case INDEX_op_sub_i32:
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case INDEX_op_mul_i32:
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case INDEX_op_and_i32:
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case INDEX_op_or_i32:
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case INDEX_op_xor_i32:
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case INDEX_op_shl_i32:
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case INDEX_op_shr_i32:
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case INDEX_op_sar_i32:
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotl_i32:
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case INDEX_op_rotr_i32:
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#endif
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#ifdef TCG_TARGET_HAS_not_i32
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case INDEX_op_not_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext8s_i32
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case INDEX_op_ext8s_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext16s_i32
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case INDEX_op_ext16s_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext8u_i32
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case INDEX_op_ext8u_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext16u_i32
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case INDEX_op_ext16u_i32:
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#endif
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return 32; |
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_mov_i64:
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case INDEX_op_add_i64:
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case INDEX_op_sub_i64:
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case INDEX_op_mul_i64:
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case INDEX_op_and_i64:
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case INDEX_op_or_i64:
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case INDEX_op_xor_i64:
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case INDEX_op_shl_i64:
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case INDEX_op_shr_i64:
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case INDEX_op_sar_i64:
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#ifdef TCG_TARGET_HAS_rot_i64
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case INDEX_op_rotl_i64:
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case INDEX_op_rotr_i64:
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#endif
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#ifdef TCG_TARGET_HAS_not_i64
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case INDEX_op_not_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext8s_i64
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case INDEX_op_ext8s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext16s_i64
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case INDEX_op_ext16s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext32s_i64
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case INDEX_op_ext32s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext8u_i64
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case INDEX_op_ext8u_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext16u_i64
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case INDEX_op_ext16u_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext32u_i64
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case INDEX_op_ext32u_i64:
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#endif
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return 64; |
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#endif
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default:
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fprintf(stderr, "Unrecognized operation %d in op_bits.\n", op);
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tcg_abort(); |
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} |
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} |
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static int op_to_movi(int op) |
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{
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switch (op_bits(op)) {
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case 32: |
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return INDEX_op_movi_i32;
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#if TCG_TARGET_REG_BITS == 64 |
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case 64: |
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return INDEX_op_movi_i64;
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#endif
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default:
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fprintf(stderr, "op_to_movi: unexpected return value of "
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"function op_bits.\n");
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tcg_abort(); |
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} |
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} |
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|
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static void tcg_opt_gen_mov(TCGArg *gen_args, TCGArg dst, TCGArg src, |
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int nb_temps, int nb_globals) |
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{
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reset_temp(dst, nb_temps, nb_globals); |
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assert(temps[src].state != TCG_TEMP_COPY); |
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if (src >= nb_globals) {
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assert(temps[src].state != TCG_TEMP_CONST); |
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if (temps[src].state != TCG_TEMP_HAS_COPY) {
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temps[src].state = TCG_TEMP_HAS_COPY; |
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temps[src].next_copy = src; |
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temps[src].prev_copy = src; |
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} |
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temps[dst].state = TCG_TEMP_COPY; |
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temps[dst].val = src; |
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temps[dst].next_copy = temps[src].next_copy; |
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temps[dst].prev_copy = src; |
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temps[temps[dst].next_copy].prev_copy = dst; |
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temps[src].next_copy = dst; |
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} |
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gen_args[0] = dst;
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gen_args[1] = src;
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} |
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static void tcg_opt_gen_movi(TCGArg *gen_args, TCGArg dst, TCGArg val, |
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int nb_temps, int nb_globals) |
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{
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reset_temp(dst, nb_temps, nb_globals); |
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temps[dst].state = TCG_TEMP_CONST; |
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temps[dst].val = val; |
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gen_args[0] = dst;
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gen_args[1] = val;
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} |
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|
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static int op_to_mov(int op) |
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{
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switch (op_bits(op)) {
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case 32: |
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return INDEX_op_mov_i32;
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#if TCG_TARGET_REG_BITS == 64 |
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case 64: |
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return INDEX_op_mov_i64;
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#endif
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default:
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fprintf(stderr, "op_to_mov: unexpected return value of "
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"function op_bits.\n");
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tcg_abort(); |
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} |
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} |
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static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y) |
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{
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switch (op) {
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CASE_OP_32_64(add): |
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return x + y;
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|
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CASE_OP_32_64(sub): |
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return x - y;
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|
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CASE_OP_32_64(mul): |
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return x * y;
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CASE_OP_32_64(and): |
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return x & y;
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CASE_OP_32_64(or): |
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return x | y;
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CASE_OP_32_64(xor): |
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return x ^ y;
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case INDEX_op_shl_i32:
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return (uint32_t)x << (uint32_t)y;
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|
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_shl_i64:
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return (uint64_t)x << (uint64_t)y;
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#endif
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case INDEX_op_shr_i32:
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return (uint32_t)x >> (uint32_t)y;
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|
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_shr_i64:
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return (uint64_t)x >> (uint64_t)y;
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#endif
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|
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case INDEX_op_sar_i32:
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return (int32_t)x >> (int32_t)y;
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|
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_sar_i64:
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return (int64_t)x >> (int64_t)y;
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#endif
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|
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotr_i32:
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#if TCG_TARGET_REG_BITS == 64 |
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x &= 0xffffffff;
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y &= 0xffffffff;
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#endif
|
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x = (x << (32 - y)) | (x >> y);
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return x;
|
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#endif
|
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|
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#ifdef TCG_TARGET_HAS_rot_i64
|
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_rotr_i64:
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x = (x << (64 - y)) | (x >> y);
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return x;
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#endif
|
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#endif
|
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|
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#ifdef TCG_TARGET_HAS_rot_i32
|
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case INDEX_op_rotl_i32:
|
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#if TCG_TARGET_REG_BITS == 64 |
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x &= 0xffffffff;
|
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y &= 0xffffffff;
|
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#endif
|
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x = (x << y) | (x >> (32 - y));
|
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return x;
|
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#endif
|
| 309 |
|
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#ifdef TCG_TARGET_HAS_rot_i64
|
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#if TCG_TARGET_REG_BITS == 64 |
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case INDEX_op_rotl_i64:
|
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x = (x << y) | (x >> (64 - y));
|
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return x;
|
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#endif
|
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#endif
|
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|
| 318 |
#if defined(TCG_TARGET_HAS_not_i32) || defined(TCG_TARGET_HAS_not_i64)
|
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#ifdef TCG_TARGET_HAS_not_i32
|
| 320 |
case INDEX_op_not_i32:
|
| 321 |
#else
|
| 322 |
case INDEX_op_not_i64:
|
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#endif
|
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return ~x;
|
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#endif
|
| 326 |
|
| 327 |
#if defined(TCG_TARGET_HAS_ext8s_i32) || defined(TCG_TARGET_HAS_ext8s_i64)
|
| 328 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
| 329 |
case INDEX_op_ext8s_i32:
|
| 330 |
#else
|
| 331 |
case INDEX_op_ext8s_i64:
|
| 332 |
#endif
|
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return (int8_t)x;
|
| 334 |
#endif
|
| 335 |
|
| 336 |
#if defined(TCG_TARGET_HAS_ext16s_i32) || defined(TCG_TARGET_HAS_ext16s_i64)
|
| 337 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
| 338 |
case INDEX_op_ext16s_i32:
|
| 339 |
#else
|
| 340 |
case INDEX_op_ext16s_i64:
|
| 341 |
#endif
|
| 342 |
return (int16_t)x;
|
| 343 |
#endif
|
| 344 |
|
| 345 |
#if defined(TCG_TARGET_HAS_ext8u_i32) || defined(TCG_TARGET_HAS_ext8u_i64)
|
| 346 |
#ifdef TCG_TARGET_HAS_ext8u_i32
|
| 347 |
case INDEX_op_ext8u_i32:
|
| 348 |
#else
|
| 349 |
case INDEX_op_ext8u_i64:
|
| 350 |
#endif
|
| 351 |
return (uint8_t)x;
|
| 352 |
#endif
|
| 353 |
|
| 354 |
#if defined(TCG_TARGET_HAS_ext16u_i32) || defined(TCG_TARGET_HAS_ext16u_i64)
|
| 355 |
#ifdef TCG_TARGET_HAS_ext16u_i32
|
| 356 |
case INDEX_op_ext16u_i32:
|
| 357 |
#else
|
| 358 |
case INDEX_op_ext16u_i64:
|
| 359 |
#endif
|
| 360 |
return (uint16_t)x;
|
| 361 |
#endif
|
| 362 |
|
| 363 |
#if TCG_TARGET_REG_BITS == 64 |
| 364 |
#ifdef TCG_TARGET_HAS_ext32s_i32
|
| 365 |
case INDEX_op_ext32s_i64:
|
| 366 |
return (int32_t)x;
|
| 367 |
#endif
|
| 368 |
|
| 369 |
#ifdef TCG_TARGET_HAS_ext32u_i32
|
| 370 |
case INDEX_op_ext32u_i64:
|
| 371 |
return (uint32_t)x;
|
| 372 |
#endif
|
| 373 |
#endif
|
| 374 |
|
| 375 |
default:
|
| 376 |
fprintf(stderr, |
| 377 |
"Unrecognized operation %d in do_constant_folding.\n", op);
|
| 378 |
tcg_abort(); |
| 379 |
} |
| 380 |
} |
| 381 |
|
| 382 |
static TCGArg do_constant_folding(int op, TCGArg x, TCGArg y) |
| 383 |
{
|
| 384 |
TCGArg res = do_constant_folding_2(op, x, y); |
| 385 |
#if TCG_TARGET_REG_BITS == 64 |
| 386 |
if (op_bits(op) == 32) { |
| 387 |
res &= 0xffffffff;
|
| 388 |
} |
| 389 |
#endif
|
| 390 |
return res;
|
| 391 |
} |
| 392 |
|
| 393 |
/* Propagate constants and copies, fold constant expressions. */
|
| 394 |
static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
|
| 395 |
TCGArg *args, TCGOpDef *tcg_op_defs) |
| 396 |
{
|
| 397 |
int i, nb_ops, op_index, op, nb_temps, nb_globals, nb_call_args;
|
| 398 |
const TCGOpDef *def;
|
| 399 |
TCGArg *gen_args; |
| 400 |
TCGArg tmp; |
| 401 |
/* Array VALS has an element for each temp.
|
| 402 |
If this temp holds a constant then its value is kept in VALS' element.
|
| 403 |
If this temp is a copy of other ones then this equivalence class'
|
| 404 |
representative is kept in VALS' element.
|
| 405 |
If this temp is neither copy nor constant then corresponding VALS'
|
| 406 |
element is unused. */
|
| 407 |
|
| 408 |
nb_temps = s->nb_temps; |
| 409 |
nb_globals = s->nb_globals; |
| 410 |
memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); |
| 411 |
|
| 412 |
nb_ops = tcg_opc_ptr - gen_opc_buf; |
| 413 |
gen_args = args; |
| 414 |
for (op_index = 0; op_index < nb_ops; op_index++) { |
| 415 |
op = gen_opc_buf[op_index]; |
| 416 |
def = &tcg_op_defs[op]; |
| 417 |
/* Do copy propagation */
|
| 418 |
if (!(def->flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS))) {
|
| 419 |
assert(op != INDEX_op_call); |
| 420 |
for (i = def->nb_oargs; i < def->nb_oargs + def->nb_iargs; i++) {
|
| 421 |
if (temps[args[i]].state == TCG_TEMP_COPY) {
|
| 422 |
args[i] = temps[args[i]].val; |
| 423 |
} |
| 424 |
} |
| 425 |
} |
| 426 |
|
| 427 |
/* For commutative operations make constant second argument */
|
| 428 |
switch (op) {
|
| 429 |
CASE_OP_32_64(add): |
| 430 |
CASE_OP_32_64(mul): |
| 431 |
CASE_OP_32_64(and): |
| 432 |
CASE_OP_32_64(or): |
| 433 |
CASE_OP_32_64(xor): |
| 434 |
if (temps[args[1]].state == TCG_TEMP_CONST) { |
| 435 |
tmp = args[1];
|
| 436 |
args[1] = args[2]; |
| 437 |
args[2] = tmp;
|
| 438 |
} |
| 439 |
break;
|
| 440 |
default:
|
| 441 |
break;
|
| 442 |
} |
| 443 |
|
| 444 |
/* Simplify expression if possible. */
|
| 445 |
switch (op) {
|
| 446 |
CASE_OP_32_64(add): |
| 447 |
CASE_OP_32_64(sub): |
| 448 |
CASE_OP_32_64(shl): |
| 449 |
CASE_OP_32_64(shr): |
| 450 |
CASE_OP_32_64(sar): |
| 451 |
#ifdef TCG_TARGET_HAS_rot_i32
|
| 452 |
case INDEX_op_rotl_i32:
|
| 453 |
case INDEX_op_rotr_i32:
|
| 454 |
#endif
|
| 455 |
#ifdef TCG_TARGET_HAS_rot_i64
|
| 456 |
case INDEX_op_rotl_i64:
|
| 457 |
case INDEX_op_rotr_i64:
|
| 458 |
#endif
|
| 459 |
if (temps[args[1]].state == TCG_TEMP_CONST) { |
| 460 |
/* Proceed with possible constant folding. */
|
| 461 |
break;
|
| 462 |
} |
| 463 |
if (temps[args[2]].state == TCG_TEMP_CONST |
| 464 |
&& temps[args[2]].val == 0) { |
| 465 |
if ((temps[args[0]].state == TCG_TEMP_COPY |
| 466 |
&& temps[args[0]].val == args[1]) |
| 467 |
|| args[0] == args[1]) { |
| 468 |
args += 3;
|
| 469 |
gen_opc_buf[op_index] = INDEX_op_nop; |
| 470 |
} else {
|
| 471 |
gen_opc_buf[op_index] = op_to_mov(op); |
| 472 |
tcg_opt_gen_mov(gen_args, args[0], args[1], |
| 473 |
nb_temps, nb_globals); |
| 474 |
gen_args += 2;
|
| 475 |
args += 3;
|
| 476 |
} |
| 477 |
continue;
|
| 478 |
} |
| 479 |
break;
|
| 480 |
CASE_OP_32_64(mul): |
| 481 |
if ((temps[args[2]].state == TCG_TEMP_CONST |
| 482 |
&& temps[args[2]].val == 0)) { |
| 483 |
gen_opc_buf[op_index] = op_to_movi(op); |
| 484 |
tcg_opt_gen_movi(gen_args, args[0], 0, nb_temps, nb_globals); |
| 485 |
args += 3;
|
| 486 |
gen_args += 2;
|
| 487 |
continue;
|
| 488 |
} |
| 489 |
break;
|
| 490 |
CASE_OP_32_64(or): |
| 491 |
CASE_OP_32_64(and): |
| 492 |
if (args[1] == args[2]) { |
| 493 |
if (args[1] == args[0]) { |
| 494 |
args += 3;
|
| 495 |
gen_opc_buf[op_index] = INDEX_op_nop; |
| 496 |
} else {
|
| 497 |
gen_opc_buf[op_index] = op_to_mov(op); |
| 498 |
tcg_opt_gen_mov(gen_args, args[0], args[1], nb_temps, |
| 499 |
nb_globals); |
| 500 |
gen_args += 2;
|
| 501 |
args += 3;
|
| 502 |
} |
| 503 |
continue;
|
| 504 |
} |
| 505 |
break;
|
| 506 |
} |
| 507 |
|
| 508 |
/* Propagate constants through copy operations and do constant
|
| 509 |
folding. Constants will be substituted to arguments by register
|
| 510 |
allocator where needed and possible. Also detect copies. */
|
| 511 |
switch (op) {
|
| 512 |
CASE_OP_32_64(mov): |
| 513 |
if ((temps[args[1]].state == TCG_TEMP_COPY |
| 514 |
&& temps[args[1]].val == args[0]) |
| 515 |
|| args[0] == args[1]) { |
| 516 |
args += 2;
|
| 517 |
gen_opc_buf[op_index] = INDEX_op_nop; |
| 518 |
break;
|
| 519 |
} |
| 520 |
if (temps[args[1]].state != TCG_TEMP_CONST) { |
| 521 |
tcg_opt_gen_mov(gen_args, args[0], args[1], |
| 522 |
nb_temps, nb_globals); |
| 523 |
gen_args += 2;
|
| 524 |
args += 2;
|
| 525 |
break;
|
| 526 |
} |
| 527 |
/* Source argument is constant. Rewrite the operation and
|
| 528 |
let movi case handle it. */
|
| 529 |
op = op_to_movi(op); |
| 530 |
gen_opc_buf[op_index] = op; |
| 531 |
args[1] = temps[args[1]].val; |
| 532 |
/* fallthrough */
|
| 533 |
CASE_OP_32_64(movi): |
| 534 |
tcg_opt_gen_movi(gen_args, args[0], args[1], nb_temps, nb_globals); |
| 535 |
gen_args += 2;
|
| 536 |
args += 2;
|
| 537 |
break;
|
| 538 |
CASE_OP_32_64(not): |
| 539 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
| 540 |
case INDEX_op_ext8s_i32:
|
| 541 |
#endif
|
| 542 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
| 543 |
case INDEX_op_ext8s_i64:
|
| 544 |
#endif
|
| 545 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
| 546 |
case INDEX_op_ext16s_i32:
|
| 547 |
#endif
|
| 548 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
| 549 |
case INDEX_op_ext16s_i64:
|
| 550 |
#endif
|
| 551 |
#ifdef TCG_TARGET_HAS_ext8u_i32
|
| 552 |
case INDEX_op_ext8u_i32:
|
| 553 |
#endif
|
| 554 |
#ifdef TCG_TARGET_HAS_ext8u_i64
|
| 555 |
case INDEX_op_ext8u_i64:
|
| 556 |
#endif
|
| 557 |
#ifdef TCG_TARGET_HAS_ext16u_i32
|
| 558 |
case INDEX_op_ext16u_i32:
|
| 559 |
#endif
|
| 560 |
#ifdef TCG_TARGET_HAS_ext16u_i64
|
| 561 |
case INDEX_op_ext16u_i64:
|
| 562 |
#endif
|
| 563 |
#if TCG_TARGET_REG_BITS == 64 |
| 564 |
case INDEX_op_ext32s_i64:
|
| 565 |
case INDEX_op_ext32u_i64:
|
| 566 |
#endif
|
| 567 |
if (temps[args[1]].state == TCG_TEMP_CONST) { |
| 568 |
gen_opc_buf[op_index] = op_to_movi(op); |
| 569 |
tmp = do_constant_folding(op, temps[args[1]].val, 0); |
| 570 |
tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals);
|
| 571 |
gen_args += 2;
|
| 572 |
args += 2;
|
| 573 |
break;
|
| 574 |
} else {
|
| 575 |
reset_temp(args[0], nb_temps, nb_globals);
|
| 576 |
gen_args[0] = args[0]; |
| 577 |
gen_args[1] = args[1]; |
| 578 |
gen_args += 2;
|
| 579 |
args += 2;
|
| 580 |
break;
|
| 581 |
} |
| 582 |
CASE_OP_32_64(add): |
| 583 |
CASE_OP_32_64(sub): |
| 584 |
CASE_OP_32_64(mul): |
| 585 |
CASE_OP_32_64(or): |
| 586 |
CASE_OP_32_64(and): |
| 587 |
CASE_OP_32_64(xor): |
| 588 |
CASE_OP_32_64(shl): |
| 589 |
CASE_OP_32_64(shr): |
| 590 |
CASE_OP_32_64(sar): |
| 591 |
#ifdef TCG_TARGET_HAS_rot_i32
|
| 592 |
case INDEX_op_rotl_i32:
|
| 593 |
case INDEX_op_rotr_i32:
|
| 594 |
#endif
|
| 595 |
#ifdef TCG_TARGET_HAS_rot_i64
|
| 596 |
case INDEX_op_rotl_i64:
|
| 597 |
case INDEX_op_rotr_i64:
|
| 598 |
#endif
|
| 599 |
if (temps[args[1]].state == TCG_TEMP_CONST |
| 600 |
&& temps[args[2]].state == TCG_TEMP_CONST) {
|
| 601 |
gen_opc_buf[op_index] = op_to_movi(op); |
| 602 |
tmp = do_constant_folding(op, temps[args[1]].val,
|
| 603 |
temps[args[2]].val);
|
| 604 |
tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals);
|
| 605 |
gen_args += 2;
|
| 606 |
args += 3;
|
| 607 |
break;
|
| 608 |
} else {
|
| 609 |
reset_temp(args[0], nb_temps, nb_globals);
|
| 610 |
gen_args[0] = args[0]; |
| 611 |
gen_args[1] = args[1]; |
| 612 |
gen_args[2] = args[2]; |
| 613 |
gen_args += 3;
|
| 614 |
args += 3;
|
| 615 |
break;
|
| 616 |
} |
| 617 |
case INDEX_op_call:
|
| 618 |
nb_call_args = (args[0] >> 16) + (args[0] & 0xffff); |
| 619 |
if (!(args[nb_call_args + 1] & (TCG_CALL_CONST | TCG_CALL_PURE))) { |
| 620 |
for (i = 0; i < nb_globals; i++) { |
| 621 |
reset_temp(i, nb_temps, nb_globals); |
| 622 |
} |
| 623 |
} |
| 624 |
for (i = 0; i < (args[0] >> 16); i++) { |
| 625 |
reset_temp(args[i + 1], nb_temps, nb_globals);
|
| 626 |
} |
| 627 |
i = nb_call_args + 3;
|
| 628 |
while (i) {
|
| 629 |
*gen_args = *args; |
| 630 |
args++; |
| 631 |
gen_args++; |
| 632 |
i--; |
| 633 |
} |
| 634 |
break;
|
| 635 |
case INDEX_op_set_label:
|
| 636 |
case INDEX_op_jmp:
|
| 637 |
case INDEX_op_br:
|
| 638 |
CASE_OP_32_64(brcond): |
| 639 |
memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info)); |
| 640 |
for (i = 0; i < def->nb_args; i++) { |
| 641 |
*gen_args = *args; |
| 642 |
args++; |
| 643 |
gen_args++; |
| 644 |
} |
| 645 |
break;
|
| 646 |
default:
|
| 647 |
/* Default case: we do know nothing about operation so no
|
| 648 |
propagation is done. We only trash output args. */
|
| 649 |
for (i = 0; i < def->nb_oargs; i++) { |
| 650 |
reset_temp(args[i], nb_temps, nb_globals); |
| 651 |
} |
| 652 |
for (i = 0; i < def->nb_args; i++) { |
| 653 |
gen_args[i] = args[i]; |
| 654 |
} |
| 655 |
args += def->nb_args; |
| 656 |
gen_args += def->nb_args; |
| 657 |
break;
|
| 658 |
} |
| 659 |
} |
| 660 |
|
| 661 |
return gen_args;
|
| 662 |
} |
| 663 |
|
| 664 |
TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, |
| 665 |
TCGArg *args, TCGOpDef *tcg_op_defs) |
| 666 |
{
|
| 667 |
TCGArg *res; |
| 668 |
res = tcg_constant_folding(s, tcg_opc_ptr, args, tcg_op_defs); |
| 669 |
return res;
|
| 670 |
} |