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1 | 610626af | aliguori | /*
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2 | 610626af | aliguori | * ioapic.c IOAPIC emulation logic
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3 | 610626af | aliguori | *
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4 | 610626af | aliguori | * Copyright (c) 2004-2005 Fabrice Bellard
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5 | 610626af | aliguori | *
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6 | 610626af | aliguori | * Split the ioapic logic from apic.c
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7 | 610626af | aliguori | * Xiantao Zhang <xiantao.zhang@intel.com>
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8 | 610626af | aliguori | *
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9 | 610626af | aliguori | * This library is free software; you can redistribute it and/or
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10 | 610626af | aliguori | * modify it under the terms of the GNU Lesser General Public
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11 | 610626af | aliguori | * License as published by the Free Software Foundation; either
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12 | 610626af | aliguori | * version 2 of the License, or (at your option) any later version.
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13 | 610626af | aliguori | *
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14 | 610626af | aliguori | * This library is distributed in the hope that it will be useful,
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15 | 610626af | aliguori | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 | 610626af | aliguori | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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17 | 610626af | aliguori | * Lesser General Public License for more details.
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18 | 610626af | aliguori | *
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19 | 610626af | aliguori | * You should have received a copy of the GNU Lesser General Public
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20 | 610626af | aliguori | * License along with this library; if not, write to the Free Software
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21 | 610626af | aliguori | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
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22 | 610626af | aliguori | */
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23 | 610626af | aliguori | |
24 | 610626af | aliguori | #include "hw.h" |
25 | 610626af | aliguori | #include "pc.h" |
26 | 610626af | aliguori | #include "qemu-timer.h" |
27 | 610626af | aliguori | #include "host-utils.h" |
28 | 610626af | aliguori | |
29 | 610626af | aliguori | //#define DEBUG_IOAPIC
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30 | 610626af | aliguori | |
31 | 610626af | aliguori | #define IOAPIC_NUM_PINS 0x18 |
32 | 610626af | aliguori | #define IOAPIC_LVT_MASKED (1<<16) |
33 | 610626af | aliguori | |
34 | 610626af | aliguori | #define IOAPIC_TRIGGER_EDGE 0 |
35 | 610626af | aliguori | #define IOAPIC_TRIGGER_LEVEL 1 |
36 | 610626af | aliguori | |
37 | 610626af | aliguori | /*io{apic,sapic} delivery mode*/
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38 | 610626af | aliguori | #define IOAPIC_DM_FIXED 0x0 |
39 | 610626af | aliguori | #define IOAPIC_DM_LOWEST_PRIORITY 0x1 |
40 | 610626af | aliguori | #define IOAPIC_DM_PMI 0x2 |
41 | 610626af | aliguori | #define IOAPIC_DM_NMI 0x4 |
42 | 610626af | aliguori | #define IOAPIC_DM_INIT 0x5 |
43 | 610626af | aliguori | #define IOAPIC_DM_SIPI 0x5 |
44 | 610626af | aliguori | #define IOAPIC_DM_EXTINT 0x7 |
45 | 610626af | aliguori | |
46 | 610626af | aliguori | struct IOAPICState {
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47 | 610626af | aliguori | uint8_t id; |
48 | 610626af | aliguori | uint8_t ioregsel; |
49 | 610626af | aliguori | |
50 | 610626af | aliguori | uint32_t irr; |
51 | 610626af | aliguori | uint64_t ioredtbl[IOAPIC_NUM_PINS]; |
52 | 610626af | aliguori | }; |
53 | 610626af | aliguori | |
54 | 610626af | aliguori | static void ioapic_service(IOAPICState *s) |
55 | 610626af | aliguori | { |
56 | 610626af | aliguori | uint8_t i; |
57 | 610626af | aliguori | uint8_t trig_mode; |
58 | 610626af | aliguori | uint8_t vector; |
59 | 610626af | aliguori | uint8_t delivery_mode; |
60 | 610626af | aliguori | uint32_t mask; |
61 | 610626af | aliguori | uint64_t entry; |
62 | 610626af | aliguori | uint8_t dest; |
63 | 610626af | aliguori | uint8_t dest_mode; |
64 | 610626af | aliguori | uint8_t polarity; |
65 | 610626af | aliguori | |
66 | 610626af | aliguori | for (i = 0; i < IOAPIC_NUM_PINS; i++) { |
67 | 610626af | aliguori | mask = 1 << i;
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68 | 610626af | aliguori | if (s->irr & mask) {
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69 | 610626af | aliguori | entry = s->ioredtbl[i]; |
70 | 610626af | aliguori | if (!(entry & IOAPIC_LVT_MASKED)) {
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71 | 610626af | aliguori | trig_mode = ((entry >> 15) & 1); |
72 | 610626af | aliguori | dest = entry >> 56;
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73 | 610626af | aliguori | dest_mode = (entry >> 11) & 1; |
74 | 610626af | aliguori | delivery_mode = (entry >> 8) & 7; |
75 | 610626af | aliguori | polarity = (entry >> 13) & 1; |
76 | 610626af | aliguori | if (trig_mode == IOAPIC_TRIGGER_EDGE)
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77 | 610626af | aliguori | s->irr &= ~mask; |
78 | 610626af | aliguori | if (delivery_mode == IOAPIC_DM_EXTINT)
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79 | 610626af | aliguori | vector = pic_read_irq(isa_pic); |
80 | 610626af | aliguori | else
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81 | 610626af | aliguori | vector = entry & 0xff;
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82 | 610626af | aliguori | |
83 | 610626af | aliguori | apic_deliver_irq(dest, dest_mode, delivery_mode, |
84 | 610626af | aliguori | vector, polarity, trig_mode); |
85 | 610626af | aliguori | } |
86 | 610626af | aliguori | } |
87 | 610626af | aliguori | } |
88 | 610626af | aliguori | } |
89 | 610626af | aliguori | |
90 | 610626af | aliguori | void ioapic_set_irq(void *opaque, int vector, int level) |
91 | 610626af | aliguori | { |
92 | 610626af | aliguori | IOAPICState *s = opaque; |
93 | 610626af | aliguori | |
94 | 610626af | aliguori | /* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
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95 | 610626af | aliguori | * to GSI 2. GSI maps to ioapic 1-1. This is not
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96 | 610626af | aliguori | * the cleanest way of doing it but it should work. */
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97 | 610626af | aliguori | |
98 | 610626af | aliguori | if (vector == 0) |
99 | 610626af | aliguori | vector = 2;
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100 | 610626af | aliguori | |
101 | 610626af | aliguori | if (vector >= 0 && vector < IOAPIC_NUM_PINS) { |
102 | 610626af | aliguori | uint32_t mask = 1 << vector;
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103 | 610626af | aliguori | uint64_t entry = s->ioredtbl[vector]; |
104 | 610626af | aliguori | |
105 | 610626af | aliguori | if ((entry >> 15) & 1) { |
106 | 610626af | aliguori | /* level triggered */
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107 | 610626af | aliguori | if (level) {
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108 | 610626af | aliguori | s->irr |= mask; |
109 | 610626af | aliguori | ioapic_service(s); |
110 | 610626af | aliguori | } else {
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111 | 610626af | aliguori | s->irr &= ~mask; |
112 | 610626af | aliguori | } |
113 | 610626af | aliguori | } else {
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114 | 610626af | aliguori | /* edge triggered */
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115 | 610626af | aliguori | if (level) {
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116 | 610626af | aliguori | s->irr |= mask; |
117 | 610626af | aliguori | ioapic_service(s); |
118 | 610626af | aliguori | } |
119 | 610626af | aliguori | } |
120 | 610626af | aliguori | } |
121 | 610626af | aliguori | } |
122 | 610626af | aliguori | |
123 | 610626af | aliguori | static uint32_t ioapic_mem_readl(void *opaque, target_phys_addr_t addr) |
124 | 610626af | aliguori | { |
125 | 610626af | aliguori | IOAPICState *s = opaque; |
126 | 610626af | aliguori | int index;
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127 | 610626af | aliguori | uint32_t val = 0;
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128 | 610626af | aliguori | |
129 | 610626af | aliguori | addr &= 0xff;
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130 | 610626af | aliguori | if (addr == 0x00) { |
131 | 610626af | aliguori | val = s->ioregsel; |
132 | 610626af | aliguori | } else if (addr == 0x10) { |
133 | 610626af | aliguori | switch (s->ioregsel) {
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134 | 610626af | aliguori | case 0x00: |
135 | 610626af | aliguori | val = s->id << 24;
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136 | 610626af | aliguori | break;
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137 | 610626af | aliguori | case 0x01: |
138 | 610626af | aliguori | val = 0x11 | ((IOAPIC_NUM_PINS - 1) << 16); /* version 0x11 */ |
139 | 610626af | aliguori | break;
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140 | 610626af | aliguori | case 0x02: |
141 | 610626af | aliguori | val = 0;
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142 | 610626af | aliguori | break;
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143 | 610626af | aliguori | default:
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144 | 610626af | aliguori | index = (s->ioregsel - 0x10) >> 1; |
145 | 610626af | aliguori | if (index >= 0 && index < IOAPIC_NUM_PINS) { |
146 | 610626af | aliguori | if (s->ioregsel & 1) |
147 | 610626af | aliguori | val = s->ioredtbl[index] >> 32;
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148 | 610626af | aliguori | else
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149 | 610626af | aliguori | val = s->ioredtbl[index] & 0xffffffff;
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150 | 610626af | aliguori | } |
151 | 610626af | aliguori | } |
152 | 610626af | aliguori | #ifdef DEBUG_IOAPIC
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153 | 610626af | aliguori | printf("I/O APIC read: %08x = %08x\n", s->ioregsel, val);
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154 | 610626af | aliguori | #endif
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155 | 610626af | aliguori | } |
156 | 610626af | aliguori | return val;
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157 | 610626af | aliguori | } |
158 | 610626af | aliguori | |
159 | 610626af | aliguori | static void ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) |
160 | 610626af | aliguori | { |
161 | 610626af | aliguori | IOAPICState *s = opaque; |
162 | 610626af | aliguori | int index;
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163 | 610626af | aliguori | |
164 | 610626af | aliguori | addr &= 0xff;
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165 | 610626af | aliguori | if (addr == 0x00) { |
166 | 610626af | aliguori | s->ioregsel = val; |
167 | 610626af | aliguori | return;
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168 | 610626af | aliguori | } else if (addr == 0x10) { |
169 | 610626af | aliguori | #ifdef DEBUG_IOAPIC
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170 | 610626af | aliguori | printf("I/O APIC write: %08x = %08x\n", s->ioregsel, val);
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171 | 610626af | aliguori | #endif
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172 | 610626af | aliguori | switch (s->ioregsel) {
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173 | 610626af | aliguori | case 0x00: |
174 | 610626af | aliguori | s->id = (val >> 24) & 0xff; |
175 | 610626af | aliguori | return;
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176 | 610626af | aliguori | case 0x01: |
177 | 610626af | aliguori | case 0x02: |
178 | 610626af | aliguori | return;
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179 | 610626af | aliguori | default:
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180 | 610626af | aliguori | index = (s->ioregsel - 0x10) >> 1; |
181 | 610626af | aliguori | if (index >= 0 && index < IOAPIC_NUM_PINS) { |
182 | 610626af | aliguori | if (s->ioregsel & 1) { |
183 | 610626af | aliguori | s->ioredtbl[index] &= 0xffffffff;
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184 | 610626af | aliguori | s->ioredtbl[index] |= (uint64_t)val << 32;
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185 | 610626af | aliguori | } else {
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186 | 610626af | aliguori | s->ioredtbl[index] &= ~0xffffffffULL;
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187 | 610626af | aliguori | s->ioredtbl[index] |= val; |
188 | 610626af | aliguori | } |
189 | 610626af | aliguori | ioapic_service(s); |
190 | 610626af | aliguori | } |
191 | 610626af | aliguori | } |
192 | 610626af | aliguori | } |
193 | 610626af | aliguori | } |
194 | 610626af | aliguori | |
195 | 610626af | aliguori | static void ioapic_save(QEMUFile *f, void *opaque) |
196 | 610626af | aliguori | { |
197 | 610626af | aliguori | IOAPICState *s = opaque; |
198 | 610626af | aliguori | int i;
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199 | 610626af | aliguori | |
200 | 610626af | aliguori | qemu_put_8s(f, &s->id); |
201 | 610626af | aliguori | qemu_put_8s(f, &s->ioregsel); |
202 | 610626af | aliguori | for (i = 0; i < IOAPIC_NUM_PINS; i++) { |
203 | 610626af | aliguori | qemu_put_be64s(f, &s->ioredtbl[i]); |
204 | 610626af | aliguori | } |
205 | 610626af | aliguori | } |
206 | 610626af | aliguori | |
207 | 610626af | aliguori | static int ioapic_load(QEMUFile *f, void *opaque, int version_id) |
208 | 610626af | aliguori | { |
209 | 610626af | aliguori | IOAPICState *s = opaque; |
210 | 610626af | aliguori | int i;
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211 | 610626af | aliguori | |
212 | 610626af | aliguori | if (version_id != 1) |
213 | 610626af | aliguori | return -EINVAL;
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214 | 610626af | aliguori | |
215 | 610626af | aliguori | qemu_get_8s(f, &s->id); |
216 | 610626af | aliguori | qemu_get_8s(f, &s->ioregsel); |
217 | 610626af | aliguori | for (i = 0; i < IOAPIC_NUM_PINS; i++) { |
218 | 610626af | aliguori | qemu_get_be64s(f, &s->ioredtbl[i]); |
219 | 610626af | aliguori | } |
220 | 610626af | aliguori | return 0; |
221 | 610626af | aliguori | } |
222 | 610626af | aliguori | |
223 | 610626af | aliguori | static void ioapic_reset(void *opaque) |
224 | 610626af | aliguori | { |
225 | 610626af | aliguori | IOAPICState *s = opaque; |
226 | 610626af | aliguori | int i;
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227 | 610626af | aliguori | |
228 | 610626af | aliguori | memset(s, 0, sizeof(*s)); |
229 | 610626af | aliguori | for(i = 0; i < IOAPIC_NUM_PINS; i++) |
230 | 610626af | aliguori | s->ioredtbl[i] = 1 << 16; /* mask LVT */ |
231 | 610626af | aliguori | } |
232 | 610626af | aliguori | |
233 | 610626af | aliguori | static CPUReadMemoryFunc *ioapic_mem_read[3] = { |
234 | 610626af | aliguori | ioapic_mem_readl, |
235 | 610626af | aliguori | ioapic_mem_readl, |
236 | 610626af | aliguori | ioapic_mem_readl, |
237 | 610626af | aliguori | }; |
238 | 610626af | aliguori | |
239 | 610626af | aliguori | static CPUWriteMemoryFunc *ioapic_mem_write[3] = { |
240 | 610626af | aliguori | ioapic_mem_writel, |
241 | 610626af | aliguori | ioapic_mem_writel, |
242 | 610626af | aliguori | ioapic_mem_writel, |
243 | 610626af | aliguori | }; |
244 | 610626af | aliguori | |
245 | 610626af | aliguori | IOAPICState *ioapic_init(void)
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246 | 610626af | aliguori | { |
247 | 610626af | aliguori | IOAPICState *s; |
248 | 610626af | aliguori | int io_memory;
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249 | 610626af | aliguori | |
250 | 610626af | aliguori | s = qemu_mallocz(sizeof(IOAPICState));
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251 | 610626af | aliguori | ioapic_reset(s); |
252 | 610626af | aliguori | |
253 | 1eed09cb | Avi Kivity | io_memory = cpu_register_io_memory(ioapic_mem_read, |
254 | 610626af | aliguori | ioapic_mem_write, s); |
255 | 610626af | aliguori | cpu_register_physical_memory(0xfec00000, 0x1000, io_memory); |
256 | 610626af | aliguori | |
257 | 610626af | aliguori | register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s); |
258 | 8217606e | Jan Kiszka | qemu_register_reset(ioapic_reset, 0, s);
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259 | 610626af | aliguori | |
260 | 610626af | aliguori | return s;
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261 | 610626af | aliguori | } |