root / target-arm / nwfpe / fpa11.inl @ 1d6e34fd
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1 | 00406dff | bellard | /* |
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2 | 00406dff | bellard | NetWinder Floating Point Emulator |
3 | 00406dff | bellard | (c) Rebel.COM, 1998,1999 |
4 | 00406dff | bellard | |
5 | 00406dff | bellard | Direct questions, comments to Scott Bambrough <scottb@netwinder.org> |
6 | 00406dff | bellard | |
7 | 00406dff | bellard | This program is free software; you can redistribute it and/or modify |
8 | 00406dff | bellard | it under the terms of the GNU General Public License as published by |
9 | 00406dff | bellard | the Free Software Foundation; either version 2 of the License, or |
10 | 00406dff | bellard | (at your option) any later version. |
11 | 00406dff | bellard | |
12 | 00406dff | bellard | This program is distributed in the hope that it will be useful, |
13 | 00406dff | bellard | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | 00406dff | bellard | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
15 | 00406dff | bellard | GNU General Public License for more details. |
16 | 00406dff | bellard | |
17 | 00406dff | bellard | You should have received a copy of the GNU General Public License |
18 | 00406dff | bellard | along with this program; if not, write to the Free Software |
19 | 00406dff | bellard | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
20 | 00406dff | bellard | */ |
21 | 00406dff | bellard | |
22 | 00406dff | bellard | #include "fpa11.h" |
23 | 00406dff | bellard | |
24 | 00406dff | bellard | /* Read and write floating point status register */ |
25 | 00406dff | bellard | extern __inline__ unsigned int readFPSR(void) |
26 | 00406dff | bellard | { |
27 | 00406dff | bellard | FPA11 *fpa11 = GET_FPA11(); |
28 | 00406dff | bellard | return(fpa11->fpsr); |
29 | 00406dff | bellard | } |
30 | 00406dff | bellard | |
31 | 00406dff | bellard | extern __inline__ void writeFPSR(FPSR reg) |
32 | 00406dff | bellard | { |
33 | 00406dff | bellard | FPA11 *fpa11 = GET_FPA11(); |
34 | 00406dff | bellard | /* the sysid byte in the status register is readonly */ |
35 | 00406dff | bellard | fpa11->fpsr = (fpa11->fpsr & MASK_SYSID) | (reg & ~MASK_SYSID); |
36 | 00406dff | bellard | } |
37 | 00406dff | bellard | |
38 | 00406dff | bellard | /* Read and write floating point control register */ |
39 | 00406dff | bellard | extern __inline__ FPCR readFPCR(void) |
40 | 00406dff | bellard | { |
41 | 00406dff | bellard | FPA11 *fpa11 = GET_FPA11(); |
42 | 00406dff | bellard | /* clear SB, AB and DA bits before returning FPCR */ |
43 | 00406dff | bellard | return(fpa11->fpcr & ~MASK_RFC); |
44 | 00406dff | bellard | } |
45 | 00406dff | bellard | |
46 | 00406dff | bellard | extern __inline__ void writeFPCR(FPCR reg) |
47 | 00406dff | bellard | { |
48 | 00406dff | bellard | FPA11 *fpa11 = GET_FPA11(); |
49 | 00406dff | bellard | fpa11->fpcr &= ~MASK_WFC; /* clear SB, AB and DA bits */ |
50 | 00406dff | bellard | fpa11->fpcr |= (reg & MASK_WFC); /* write SB, AB and DA bits */ |
51 | 00406dff | bellard | } |