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1 | 00406dff | bellard | |
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2 | 00406dff | bellard | /*
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3 | 00406dff | bellard | ===============================================================================
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4 | 00406dff | bellard | |
5 | 00406dff | bellard | This C header file is part of the SoftFloat IEC/IEEE Floating-point
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6 | 00406dff | bellard | Arithmetic Package, Release 2.
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7 | 00406dff | bellard | |
8 | 00406dff | bellard | Written by John R. Hauser. This work was made possible in part by the
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9 | 00406dff | bellard | International Computer Science Institute, located at Suite 600, 1947 Center
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10 | 00406dff | bellard | Street, Berkeley, California 94704. Funding was partially provided by the
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11 | 00406dff | bellard | National Science Foundation under grant MIP-9311980. The original version
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12 | 00406dff | bellard | of this code was written as part of a project to build a fixed-point vector
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13 | 00406dff | bellard | processor in collaboration with the University of California at Berkeley,
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14 | 00406dff | bellard | overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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15 | 00406dff | bellard | is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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16 | 00406dff | bellard | arithmetic/softfloat.html'.
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17 | 00406dff | bellard | |
18 | 00406dff | bellard | THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
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19 | 00406dff | bellard | has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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20 | 00406dff | bellard | TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
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21 | 00406dff | bellard | PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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22 | 00406dff | bellard | AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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23 | 00406dff | bellard | |
24 | 00406dff | bellard | Derivative works are acceptable, even for commercial purposes, so long as
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25 | 00406dff | bellard | (1) they include prominent notice that the work is derivative, and (2) they
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26 | 00406dff | bellard | include prominent notice akin to these three paragraphs for those parts of
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27 | 00406dff | bellard | this code that are retained.
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28 | 00406dff | bellard | |
29 | 00406dff | bellard | ===============================================================================
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30 | 00406dff | bellard | */
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31 | 00406dff | bellard | |
32 | 00406dff | bellard | #ifndef __SOFTFLOAT_H__
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33 | 00406dff | bellard | #define __SOFTFLOAT_H__
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34 | 00406dff | bellard | |
35 | 00406dff | bellard | /*
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36 | 00406dff | bellard | -------------------------------------------------------------------------------
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37 | 00406dff | bellard | The macro `FLOATX80' must be defined to enable the extended double-precision
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38 | 00406dff | bellard | floating-point format `floatx80'. If this macro is not defined, the
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39 | 00406dff | bellard | `floatx80' type will not be defined, and none of the functions that either
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40 | 00406dff | bellard | input or output the `floatx80' type will be defined.
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41 | 00406dff | bellard | -------------------------------------------------------------------------------
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42 | 00406dff | bellard | */
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43 | 00406dff | bellard | #define FLOATX80
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44 | 00406dff | bellard | |
45 | 00406dff | bellard | /*
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46 | 00406dff | bellard | -------------------------------------------------------------------------------
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47 | 00406dff | bellard | Software IEC/IEEE floating-point types.
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48 | 00406dff | bellard | -------------------------------------------------------------------------------
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49 | 00406dff | bellard | */
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50 | 00406dff | bellard | typedef unsigned long int float32; |
51 | 00406dff | bellard | typedef unsigned long long float64; |
52 | 00406dff | bellard | typedef struct { |
53 | 00406dff | bellard | unsigned short high; |
54 | 00406dff | bellard | unsigned long long low; |
55 | 00406dff | bellard | } floatx80; |
56 | 00406dff | bellard | |
57 | 00406dff | bellard | /*
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58 | 00406dff | bellard | -------------------------------------------------------------------------------
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59 | 00406dff | bellard | Software IEC/IEEE floating-point underflow tininess-detection mode.
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60 | 00406dff | bellard | -------------------------------------------------------------------------------
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61 | 00406dff | bellard | */
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62 | 00406dff | bellard | extern signed char float_detect_tininess; |
63 | 00406dff | bellard | enum {
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64 | 00406dff | bellard | float_tininess_after_rounding = 0,
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65 | 00406dff | bellard | float_tininess_before_rounding = 1
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66 | 00406dff | bellard | }; |
67 | 00406dff | bellard | |
68 | 00406dff | bellard | /*
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69 | 00406dff | bellard | -------------------------------------------------------------------------------
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70 | 00406dff | bellard | Software IEC/IEEE floating-point rounding mode.
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71 | 00406dff | bellard | -------------------------------------------------------------------------------
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72 | 00406dff | bellard | */
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73 | 00406dff | bellard | extern signed char float_rounding_mode; |
74 | 00406dff | bellard | enum {
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75 | 00406dff | bellard | float_round_nearest_even = 0,
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76 | 00406dff | bellard | float_round_to_zero = 1,
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77 | 00406dff | bellard | float_round_down = 2,
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78 | 00406dff | bellard | float_round_up = 3
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79 | 00406dff | bellard | }; |
80 | 00406dff | bellard | |
81 | 00406dff | bellard | /*
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82 | 00406dff | bellard | -------------------------------------------------------------------------------
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83 | 00406dff | bellard | Software IEC/IEEE floating-point exception flags.
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84 | 00406dff | bellard | -------------------------------------------------------------------------------
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85 | 00406dff | bellard | extern signed char float_exception_flags;
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86 | 00406dff | bellard | enum {
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87 | 00406dff | bellard | float_flag_inexact = 1,
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88 | 00406dff | bellard | float_flag_underflow = 2,
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89 | 00406dff | bellard | float_flag_overflow = 4,
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90 | 00406dff | bellard | float_flag_divbyzero = 8,
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91 | 00406dff | bellard | float_flag_invalid = 16
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92 | 00406dff | bellard | };
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93 | 00406dff | bellard | |
94 | 00406dff | bellard | ScottB: November 4, 1998
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95 | 00406dff | bellard | Changed the enumeration to match the bit order in the FPA11.
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96 | 00406dff | bellard | */
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97 | 00406dff | bellard | |
98 | 00406dff | bellard | extern signed char float_exception_flags; |
99 | 00406dff | bellard | enum {
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100 | 00406dff | bellard | float_flag_invalid = 1,
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101 | 00406dff | bellard | float_flag_divbyzero = 2,
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102 | 00406dff | bellard | float_flag_overflow = 4,
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103 | 00406dff | bellard | float_flag_underflow = 8,
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104 | 00406dff | bellard | float_flag_inexact = 16
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105 | 00406dff | bellard | }; |
106 | 00406dff | bellard | |
107 | 00406dff | bellard | /*
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108 | 00406dff | bellard | -------------------------------------------------------------------------------
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109 | 00406dff | bellard | Routine to raise any or all of the software IEC/IEEE floating-point
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110 | 00406dff | bellard | exception flags.
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111 | 00406dff | bellard | -------------------------------------------------------------------------------
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112 | 00406dff | bellard | */
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113 | 00406dff | bellard | void float_raise( signed char ); |
114 | 00406dff | bellard | |
115 | 00406dff | bellard | /*
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116 | 00406dff | bellard | -------------------------------------------------------------------------------
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117 | 00406dff | bellard | Software IEC/IEEE integer-to-floating-point conversion routines.
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118 | 00406dff | bellard | -------------------------------------------------------------------------------
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119 | 00406dff | bellard | */
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120 | 00406dff | bellard | float32 int32_to_float32( signed int ); |
121 | 00406dff | bellard | float64 int32_to_float64( signed int ); |
122 | 00406dff | bellard | #ifdef FLOATX80
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123 | 00406dff | bellard | floatx80 int32_to_floatx80( signed int ); |
124 | 00406dff | bellard | #endif
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125 | 00406dff | bellard | |
126 | 00406dff | bellard | /*
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127 | 00406dff | bellard | -------------------------------------------------------------------------------
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128 | 00406dff | bellard | Software IEC/IEEE single-precision conversion routines.
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129 | 00406dff | bellard | -------------------------------------------------------------------------------
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130 | 00406dff | bellard | */
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131 | 00406dff | bellard | signed int float32_to_int32( float32 ); |
132 | 00406dff | bellard | signed int float32_to_int32_round_to_zero( float32 ); |
133 | 00406dff | bellard | float64 float32_to_float64( float32 ); |
134 | 00406dff | bellard | #ifdef FLOATX80
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135 | 00406dff | bellard | floatx80 float32_to_floatx80( float32 ); |
136 | 00406dff | bellard | #endif
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137 | 00406dff | bellard | |
138 | 00406dff | bellard | /*
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139 | 00406dff | bellard | -------------------------------------------------------------------------------
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140 | 00406dff | bellard | Software IEC/IEEE single-precision operations.
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141 | 00406dff | bellard | -------------------------------------------------------------------------------
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142 | 00406dff | bellard | */
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143 | 00406dff | bellard | float32 float32_round_to_int( float32 ); |
144 | 00406dff | bellard | float32 float32_add( float32, float32 ); |
145 | 00406dff | bellard | float32 float32_sub( float32, float32 ); |
146 | 00406dff | bellard | float32 float32_mul( float32, float32 ); |
147 | 00406dff | bellard | float32 float32_div( float32, float32 ); |
148 | 00406dff | bellard | float32 float32_rem( float32, float32 ); |
149 | 00406dff | bellard | float32 float32_sqrt( float32 ); |
150 | 00406dff | bellard | char float32_eq( float32, float32 );
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151 | 00406dff | bellard | char float32_le( float32, float32 );
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152 | 00406dff | bellard | char float32_lt( float32, float32 );
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153 | 00406dff | bellard | char float32_eq_signaling( float32, float32 );
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154 | 00406dff | bellard | char float32_le_quiet( float32, float32 );
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155 | 00406dff | bellard | char float32_lt_quiet( float32, float32 );
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156 | 00406dff | bellard | char float32_is_signaling_nan( float32 );
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157 | 00406dff | bellard | |
158 | 00406dff | bellard | /*
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159 | 00406dff | bellard | -------------------------------------------------------------------------------
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160 | 00406dff | bellard | Software IEC/IEEE double-precision conversion routines.
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161 | 00406dff | bellard | -------------------------------------------------------------------------------
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162 | 00406dff | bellard | */
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163 | 00406dff | bellard | signed int float64_to_int32( float64 ); |
164 | 00406dff | bellard | signed int float64_to_int32_round_to_zero( float64 ); |
165 | 00406dff | bellard | float32 float64_to_float32( float64 ); |
166 | 00406dff | bellard | #ifdef FLOATX80
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167 | 00406dff | bellard | floatx80 float64_to_floatx80( float64 ); |
168 | 00406dff | bellard | #endif
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169 | 00406dff | bellard | |
170 | 00406dff | bellard | /*
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171 | 00406dff | bellard | -------------------------------------------------------------------------------
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172 | 00406dff | bellard | Software IEC/IEEE double-precision operations.
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173 | 00406dff | bellard | -------------------------------------------------------------------------------
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174 | 00406dff | bellard | */
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175 | 00406dff | bellard | float64 float64_round_to_int( float64 ); |
176 | 00406dff | bellard | float64 float64_add( float64, float64 ); |
177 | 00406dff | bellard | float64 float64_sub( float64, float64 ); |
178 | 00406dff | bellard | float64 float64_mul( float64, float64 ); |
179 | 00406dff | bellard | float64 float64_div( float64, float64 ); |
180 | 00406dff | bellard | float64 float64_rem( float64, float64 ); |
181 | 00406dff | bellard | float64 float64_sqrt( float64 ); |
182 | 00406dff | bellard | char float64_eq( float64, float64 );
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183 | 00406dff | bellard | char float64_le( float64, float64 );
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184 | 00406dff | bellard | char float64_lt( float64, float64 );
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185 | 00406dff | bellard | char float64_eq_signaling( float64, float64 );
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186 | 00406dff | bellard | char float64_le_quiet( float64, float64 );
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187 | 00406dff | bellard | char float64_lt_quiet( float64, float64 );
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188 | 00406dff | bellard | char float64_is_signaling_nan( float64 );
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189 | 00406dff | bellard | |
190 | 00406dff | bellard | #ifdef FLOATX80
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191 | 00406dff | bellard | |
192 | 00406dff | bellard | /*
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193 | 00406dff | bellard | -------------------------------------------------------------------------------
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194 | 00406dff | bellard | Software IEC/IEEE extended double-precision conversion routines.
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195 | 00406dff | bellard | -------------------------------------------------------------------------------
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196 | 00406dff | bellard | */
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197 | 00406dff | bellard | signed int floatx80_to_int32( floatx80 ); |
198 | 00406dff | bellard | signed int floatx80_to_int32_round_to_zero( floatx80 ); |
199 | 00406dff | bellard | float32 floatx80_to_float32( floatx80 ); |
200 | 00406dff | bellard | float64 floatx80_to_float64( floatx80 ); |
201 | 00406dff | bellard | |
202 | 00406dff | bellard | /*
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203 | 00406dff | bellard | -------------------------------------------------------------------------------
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204 | 00406dff | bellard | Software IEC/IEEE extended double-precision rounding precision. Valid
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205 | 00406dff | bellard | values are 32, 64, and 80.
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206 | 00406dff | bellard | -------------------------------------------------------------------------------
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207 | 00406dff | bellard | */
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208 | 00406dff | bellard | extern signed char floatx80_rounding_precision; |
209 | 00406dff | bellard | |
210 | 00406dff | bellard | /*
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211 | 00406dff | bellard | -------------------------------------------------------------------------------
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212 | 00406dff | bellard | Software IEC/IEEE extended double-precision operations.
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213 | 00406dff | bellard | -------------------------------------------------------------------------------
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214 | 00406dff | bellard | */
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215 | 00406dff | bellard | floatx80 floatx80_round_to_int( floatx80 ); |
216 | 00406dff | bellard | floatx80 floatx80_add( floatx80, floatx80 ); |
217 | 00406dff | bellard | floatx80 floatx80_sub( floatx80, floatx80 ); |
218 | 00406dff | bellard | floatx80 floatx80_mul( floatx80, floatx80 ); |
219 | 00406dff | bellard | floatx80 floatx80_div( floatx80, floatx80 ); |
220 | 00406dff | bellard | floatx80 floatx80_rem( floatx80, floatx80 ); |
221 | 00406dff | bellard | floatx80 floatx80_sqrt( floatx80 ); |
222 | 00406dff | bellard | char floatx80_eq( floatx80, floatx80 );
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223 | 00406dff | bellard | char floatx80_le( floatx80, floatx80 );
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224 | 00406dff | bellard | char floatx80_lt( floatx80, floatx80 );
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225 | 00406dff | bellard | char floatx80_eq_signaling( floatx80, floatx80 );
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226 | 00406dff | bellard | char floatx80_le_quiet( floatx80, floatx80 );
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227 | 00406dff | bellard | char floatx80_lt_quiet( floatx80, floatx80 );
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228 | 00406dff | bellard | char floatx80_is_signaling_nan( floatx80 );
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229 | 00406dff | bellard | |
230 | 00406dff | bellard | #endif
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231 | 00406dff | bellard | |
232 | 00406dff | bellard | #endif |