root / target-i386 / exec.h @ 1d6e34fd
History | View | Annotate | Download (15.1 kB)
1 |
/*
|
---|---|
2 |
* i386 execution defines
|
3 |
*
|
4 |
* Copyright (c) 2003 Fabrice Bellard
|
5 |
*
|
6 |
* This library is free software; you can redistribute it and/or
|
7 |
* modify it under the terms of the GNU Lesser General Public
|
8 |
* License as published by the Free Software Foundation; either
|
9 |
* version 2 of the License, or (at your option) any later version.
|
10 |
*
|
11 |
* This library is distributed in the hope that it will be useful,
|
12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 |
* Lesser General Public License for more details.
|
15 |
*
|
16 |
* You should have received a copy of the GNU Lesser General Public
|
17 |
* License along with this library; if not, write to the Free Software
|
18 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
19 |
*/
|
20 |
#include "config.h" |
21 |
#include "dyngen-exec.h" |
22 |
|
23 |
/* XXX: factorize this mess */
|
24 |
#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
|
25 |
#define HOST_LONG_BITS 64 |
26 |
#else
|
27 |
#define HOST_LONG_BITS 32 |
28 |
#endif
|
29 |
|
30 |
#ifdef TARGET_X86_64
|
31 |
#define TARGET_LONG_BITS 64 |
32 |
#else
|
33 |
#define TARGET_LONG_BITS 32 |
34 |
#endif
|
35 |
|
36 |
/* at least 4 register variables are defined */
|
37 |
register struct CPUX86State *env asm(AREG0); |
38 |
|
39 |
/* XXX: use 64 bit regs if HOST_LONG_BITS == 64 */
|
40 |
#if TARGET_LONG_BITS == 32 |
41 |
|
42 |
register uint32_t T0 asm(AREG1); |
43 |
register uint32_t T1 asm(AREG2); |
44 |
register uint32_t T2 asm(AREG3); |
45 |
|
46 |
/* if more registers are available, we define some registers too */
|
47 |
#ifdef AREG4
|
48 |
register uint32_t EAX asm(AREG4); |
49 |
#define reg_EAX
|
50 |
#endif
|
51 |
|
52 |
#ifdef AREG5
|
53 |
register uint32_t ESP asm(AREG5); |
54 |
#define reg_ESP
|
55 |
#endif
|
56 |
|
57 |
#ifdef AREG6
|
58 |
register uint32_t EBP asm(AREG6); |
59 |
#define reg_EBP
|
60 |
#endif
|
61 |
|
62 |
#ifdef AREG7
|
63 |
register uint32_t ECX asm(AREG7); |
64 |
#define reg_ECX
|
65 |
#endif
|
66 |
|
67 |
#ifdef AREG8
|
68 |
register uint32_t EDX asm(AREG8); |
69 |
#define reg_EDX
|
70 |
#endif
|
71 |
|
72 |
#ifdef AREG9
|
73 |
register uint32_t EBX asm(AREG9); |
74 |
#define reg_EBX
|
75 |
#endif
|
76 |
|
77 |
#ifdef AREG10
|
78 |
register uint32_t ESI asm(AREG10); |
79 |
#define reg_ESI
|
80 |
#endif
|
81 |
|
82 |
#ifdef AREG11
|
83 |
register uint32_t EDI asm(AREG11); |
84 |
#define reg_EDI
|
85 |
#endif
|
86 |
|
87 |
#else
|
88 |
|
89 |
/* no registers can be used */
|
90 |
#define T0 (env->t0)
|
91 |
#define T1 (env->t1)
|
92 |
#define T2 (env->t2)
|
93 |
|
94 |
#endif
|
95 |
|
96 |
#define A0 T2
|
97 |
|
98 |
extern FILE *logfile;
|
99 |
extern int loglevel; |
100 |
|
101 |
#ifndef reg_EAX
|
102 |
#define EAX (env->regs[R_EAX])
|
103 |
#endif
|
104 |
#ifndef reg_ECX
|
105 |
#define ECX (env->regs[R_ECX])
|
106 |
#endif
|
107 |
#ifndef reg_EDX
|
108 |
#define EDX (env->regs[R_EDX])
|
109 |
#endif
|
110 |
#ifndef reg_EBX
|
111 |
#define EBX (env->regs[R_EBX])
|
112 |
#endif
|
113 |
#ifndef reg_ESP
|
114 |
#define ESP (env->regs[R_ESP])
|
115 |
#endif
|
116 |
#ifndef reg_EBP
|
117 |
#define EBP (env->regs[R_EBP])
|
118 |
#endif
|
119 |
#ifndef reg_ESI
|
120 |
#define ESI (env->regs[R_ESI])
|
121 |
#endif
|
122 |
#ifndef reg_EDI
|
123 |
#define EDI (env->regs[R_EDI])
|
124 |
#endif
|
125 |
#define EIP (env->eip)
|
126 |
#define DF (env->df)
|
127 |
|
128 |
#define CC_SRC (env->cc_src)
|
129 |
#define CC_DST (env->cc_dst)
|
130 |
#define CC_OP (env->cc_op)
|
131 |
|
132 |
/* float macros */
|
133 |
#define FT0 (env->ft0)
|
134 |
#define ST0 (env->fpregs[env->fpstt].d)
|
135 |
#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d) |
136 |
#define ST1 ST(1) |
137 |
|
138 |
#ifdef USE_FP_CONVERT
|
139 |
#define FP_CONVERT (env->fp_convert)
|
140 |
#endif
|
141 |
|
142 |
#include "cpu.h" |
143 |
#include "exec-all.h" |
144 |
|
145 |
/* XXX: add a generic FPU library */
|
146 |
|
147 |
static inline double float32_to_float64(float a) |
148 |
{ |
149 |
return a;
|
150 |
} |
151 |
|
152 |
static inline float float64_to_float32(double a) |
153 |
{ |
154 |
return a;
|
155 |
} |
156 |
|
157 |
#if defined(__powerpc__)
|
158 |
/* better to call an helper on ppc */
|
159 |
float int32_to_float32(int32_t a);
|
160 |
double int32_to_float64(int32_t a);
|
161 |
#else
|
162 |
static inline float int32_to_float32(int32_t a) |
163 |
{ |
164 |
return (float)a; |
165 |
} |
166 |
|
167 |
static inline double int32_to_float64(int32_t a) |
168 |
{ |
169 |
return (double)a; |
170 |
} |
171 |
#endif
|
172 |
|
173 |
static inline float int64_to_float32(int64_t a) |
174 |
{ |
175 |
return (float)a; |
176 |
} |
177 |
|
178 |
static inline double int64_to_float64(int64_t a) |
179 |
{ |
180 |
return (double)a; |
181 |
} |
182 |
|
183 |
typedef struct CCTable { |
184 |
int (*compute_all)(void); /* return all the flags */ |
185 |
int (*compute_c)(void); /* return the C flag */ |
186 |
} CCTable; |
187 |
|
188 |
extern CCTable cc_table[];
|
189 |
|
190 |
void load_seg(int seg_reg, int selector); |
191 |
void helper_ljmp_protected_T0_T1(int next_eip); |
192 |
void helper_lcall_real_T0_T1(int shift, int next_eip); |
193 |
void helper_lcall_protected_T0_T1(int shift, int next_eip); |
194 |
void helper_iret_real(int shift); |
195 |
void helper_iret_protected(int shift, int next_eip); |
196 |
void helper_lret_protected(int shift, int addend); |
197 |
void helper_lldt_T0(void); |
198 |
void helper_ltr_T0(void); |
199 |
void helper_movl_crN_T0(int reg); |
200 |
void helper_movl_drN_T0(int reg); |
201 |
void helper_invlpg(unsigned int addr); |
202 |
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
|
203 |
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
|
204 |
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
|
205 |
void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
|
206 |
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
|
207 |
int is_write, int is_user, int is_softmmu); |
208 |
void tlb_fill(target_ulong addr, int is_write, int is_user, |
209 |
void *retaddr);
|
210 |
void __hidden cpu_lock(void); |
211 |
void __hidden cpu_unlock(void); |
212 |
void do_interrupt(int intno, int is_int, int error_code, |
213 |
target_ulong next_eip, int is_hw);
|
214 |
void do_interrupt_user(int intno, int is_int, int error_code, |
215 |
target_ulong next_eip); |
216 |
void raise_interrupt(int intno, int is_int, int error_code, |
217 |
int next_eip_addend);
|
218 |
void raise_exception_err(int exception_index, int error_code); |
219 |
void raise_exception(int exception_index); |
220 |
void __hidden cpu_loop_exit(void); |
221 |
|
222 |
void OPPROTO op_movl_eflags_T0(void); |
223 |
void OPPROTO op_movl_T0_eflags(void); |
224 |
void helper_divl_EAX_T0(void); |
225 |
void helper_idivl_EAX_T0(void); |
226 |
void helper_mulq_EAX_T0(void); |
227 |
void helper_imulq_EAX_T0(void); |
228 |
void helper_imulq_T0_T1(void); |
229 |
void helper_divq_EAX_T0(void); |
230 |
void helper_idivq_EAX_T0(void); |
231 |
void helper_cmpxchg8b(void); |
232 |
void helper_cpuid(void); |
233 |
void helper_enter_level(int level, int data32); |
234 |
void helper_sysenter(void); |
235 |
void helper_sysexit(void); |
236 |
void helper_syscall(int next_eip_addend); |
237 |
void helper_sysret(int dflag); |
238 |
void helper_rdtsc(void); |
239 |
void helper_rdmsr(void); |
240 |
void helper_wrmsr(void); |
241 |
void helper_lsl(void); |
242 |
void helper_lar(void); |
243 |
void helper_verr(void); |
244 |
void helper_verw(void); |
245 |
|
246 |
void check_iob_T0(void); |
247 |
void check_iow_T0(void); |
248 |
void check_iol_T0(void); |
249 |
void check_iob_DX(void); |
250 |
void check_iow_DX(void); |
251 |
void check_iol_DX(void); |
252 |
|
253 |
/* XXX: move that to a generic header */
|
254 |
#if !defined(CONFIG_USER_ONLY)
|
255 |
|
256 |
#define ldul_user ldl_user
|
257 |
#define ldul_kernel ldl_kernel
|
258 |
|
259 |
#define ACCESS_TYPE 0 |
260 |
#define MEMSUFFIX _kernel
|
261 |
#define DATA_SIZE 1 |
262 |
#include "softmmu_header.h" |
263 |
|
264 |
#define DATA_SIZE 2 |
265 |
#include "softmmu_header.h" |
266 |
|
267 |
#define DATA_SIZE 4 |
268 |
#include "softmmu_header.h" |
269 |
|
270 |
#define DATA_SIZE 8 |
271 |
#include "softmmu_header.h" |
272 |
#undef ACCESS_TYPE
|
273 |
#undef MEMSUFFIX
|
274 |
|
275 |
#define ACCESS_TYPE 1 |
276 |
#define MEMSUFFIX _user
|
277 |
#define DATA_SIZE 1 |
278 |
#include "softmmu_header.h" |
279 |
|
280 |
#define DATA_SIZE 2 |
281 |
#include "softmmu_header.h" |
282 |
|
283 |
#define DATA_SIZE 4 |
284 |
#include "softmmu_header.h" |
285 |
|
286 |
#define DATA_SIZE 8 |
287 |
#include "softmmu_header.h" |
288 |
#undef ACCESS_TYPE
|
289 |
#undef MEMSUFFIX
|
290 |
|
291 |
/* these access are slower, they must be as rare as possible */
|
292 |
#define ACCESS_TYPE 2 |
293 |
#define MEMSUFFIX _data
|
294 |
#define DATA_SIZE 1 |
295 |
#include "softmmu_header.h" |
296 |
|
297 |
#define DATA_SIZE 2 |
298 |
#include "softmmu_header.h" |
299 |
|
300 |
#define DATA_SIZE 4 |
301 |
#include "softmmu_header.h" |
302 |
|
303 |
#define DATA_SIZE 8 |
304 |
#include "softmmu_header.h" |
305 |
#undef ACCESS_TYPE
|
306 |
#undef MEMSUFFIX
|
307 |
|
308 |
#define ldub(p) ldub_data(p)
|
309 |
#define ldsb(p) ldsb_data(p)
|
310 |
#define lduw(p) lduw_data(p)
|
311 |
#define ldsw(p) ldsw_data(p)
|
312 |
#define ldl(p) ldl_data(p)
|
313 |
#define ldq(p) ldq_data(p)
|
314 |
|
315 |
#define stb(p, v) stb_data(p, v)
|
316 |
#define stw(p, v) stw_data(p, v)
|
317 |
#define stl(p, v) stl_data(p, v)
|
318 |
#define stq(p, v) stq_data(p, v)
|
319 |
|
320 |
static inline double ldfq(target_ulong ptr) |
321 |
{ |
322 |
union {
|
323 |
double d;
|
324 |
uint64_t i; |
325 |
} u; |
326 |
u.i = ldq(ptr); |
327 |
return u.d;
|
328 |
} |
329 |
|
330 |
static inline void stfq(target_ulong ptr, double v) |
331 |
{ |
332 |
union {
|
333 |
double d;
|
334 |
uint64_t i; |
335 |
} u; |
336 |
u.d = v; |
337 |
stq(ptr, u.i); |
338 |
} |
339 |
|
340 |
static inline float ldfl(target_ulong ptr) |
341 |
{ |
342 |
union {
|
343 |
float f;
|
344 |
uint32_t i; |
345 |
} u; |
346 |
u.i = ldl(ptr); |
347 |
return u.f;
|
348 |
} |
349 |
|
350 |
static inline void stfl(target_ulong ptr, float v) |
351 |
{ |
352 |
union {
|
353 |
float f;
|
354 |
uint32_t i; |
355 |
} u; |
356 |
u.f = v; |
357 |
stl(ptr, u.i); |
358 |
} |
359 |
|
360 |
#endif /* !defined(CONFIG_USER_ONLY) */ |
361 |
|
362 |
#ifdef USE_X86LDOUBLE
|
363 |
/* use long double functions */
|
364 |
#define lrint lrintl
|
365 |
#define llrint llrintl
|
366 |
#define fabs fabsl
|
367 |
#define sin sinl
|
368 |
#define cos cosl
|
369 |
#define sqrt sqrtl
|
370 |
#define pow powl
|
371 |
#define log logl
|
372 |
#define tan tanl
|
373 |
#define atan2 atan2l
|
374 |
#define floor floorl
|
375 |
#define ceil ceill
|
376 |
#define rint rintl
|
377 |
#endif
|
378 |
|
379 |
#if !defined(_BSD)
|
380 |
extern int lrint(CPU86_LDouble x); |
381 |
extern int64_t llrint(CPU86_LDouble x);
|
382 |
#else
|
383 |
#define lrint(d) ((int)rint(d)) |
384 |
#define llrint(d) ((int)rint(d)) |
385 |
#endif
|
386 |
extern CPU86_LDouble fabs(CPU86_LDouble x);
|
387 |
extern CPU86_LDouble sin(CPU86_LDouble x);
|
388 |
extern CPU86_LDouble cos(CPU86_LDouble x);
|
389 |
extern CPU86_LDouble sqrt(CPU86_LDouble x);
|
390 |
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
|
391 |
extern CPU86_LDouble log(CPU86_LDouble x);
|
392 |
extern CPU86_LDouble tan(CPU86_LDouble x);
|
393 |
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
|
394 |
extern CPU86_LDouble floor(CPU86_LDouble x);
|
395 |
extern CPU86_LDouble ceil(CPU86_LDouble x);
|
396 |
extern CPU86_LDouble rint(CPU86_LDouble x);
|
397 |
|
398 |
#define RC_MASK 0xc00 |
399 |
#define RC_NEAR 0x000 |
400 |
#define RC_DOWN 0x400 |
401 |
#define RC_UP 0x800 |
402 |
#define RC_CHOP 0xc00 |
403 |
|
404 |
#define MAXTAN 9223372036854775808.0 |
405 |
|
406 |
#ifdef __arm__
|
407 |
/* we have no way to do correct rounding - a FPU emulator is needed */
|
408 |
#define FE_DOWNWARD FE_TONEAREST
|
409 |
#define FE_UPWARD FE_TONEAREST
|
410 |
#define FE_TOWARDZERO FE_TONEAREST
|
411 |
#endif
|
412 |
|
413 |
#ifdef USE_X86LDOUBLE
|
414 |
|
415 |
/* only for x86 */
|
416 |
typedef union { |
417 |
long double d; |
418 |
struct {
|
419 |
unsigned long long lower; |
420 |
unsigned short upper; |
421 |
} l; |
422 |
} CPU86_LDoubleU; |
423 |
|
424 |
/* the following deal with x86 long double-precision numbers */
|
425 |
#define MAXEXPD 0x7fff |
426 |
#define EXPBIAS 16383 |
427 |
#define EXPD(fp) (fp.l.upper & 0x7fff) |
428 |
#define SIGND(fp) ((fp.l.upper) & 0x8000) |
429 |
#define MANTD(fp) (fp.l.lower)
|
430 |
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS |
431 |
|
432 |
#else
|
433 |
|
434 |
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
|
435 |
typedef union { |
436 |
double d;
|
437 |
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
|
438 |
struct {
|
439 |
uint32_t lower; |
440 |
int32_t upper; |
441 |
} l; |
442 |
#else
|
443 |
struct {
|
444 |
int32_t upper; |
445 |
uint32_t lower; |
446 |
} l; |
447 |
#endif
|
448 |
#ifndef __arm__
|
449 |
int64_t ll; |
450 |
#endif
|
451 |
} CPU86_LDoubleU; |
452 |
|
453 |
/* the following deal with IEEE double-precision numbers */
|
454 |
#define MAXEXPD 0x7ff |
455 |
#define EXPBIAS 1023 |
456 |
#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF) |
457 |
#define SIGND(fp) ((fp.l.upper) & 0x80000000) |
458 |
#ifdef __arm__
|
459 |
#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32)) |
460 |
#else
|
461 |
#define MANTD(fp) (fp.ll & ((1LL << 52) - 1)) |
462 |
#endif
|
463 |
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20) |
464 |
#endif
|
465 |
|
466 |
static inline void fpush(void) |
467 |
{ |
468 |
env->fpstt = (env->fpstt - 1) & 7; |
469 |
env->fptags[env->fpstt] = 0; /* validate stack entry */ |
470 |
} |
471 |
|
472 |
static inline void fpop(void) |
473 |
{ |
474 |
env->fptags[env->fpstt] = 1; /* invvalidate stack entry */ |
475 |
env->fpstt = (env->fpstt + 1) & 7; |
476 |
} |
477 |
|
478 |
#ifndef USE_X86LDOUBLE
|
479 |
static inline CPU86_LDouble helper_fldt(target_ulong ptr) |
480 |
{ |
481 |
CPU86_LDoubleU temp; |
482 |
int upper, e;
|
483 |
uint64_t ll; |
484 |
|
485 |
/* mantissa */
|
486 |
upper = lduw(ptr + 8);
|
487 |
/* XXX: handle overflow ? */
|
488 |
e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */ |
489 |
e |= (upper >> 4) & 0x800; /* sign */ |
490 |
ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1); |
491 |
#ifdef __arm__
|
492 |
temp.l.upper = (e << 20) | (ll >> 32); |
493 |
temp.l.lower = ll; |
494 |
#else
|
495 |
temp.ll = ll | ((uint64_t)e << 52);
|
496 |
#endif
|
497 |
return temp.d;
|
498 |
} |
499 |
|
500 |
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr) |
501 |
{ |
502 |
CPU86_LDoubleU temp; |
503 |
int e;
|
504 |
|
505 |
temp.d = f; |
506 |
/* mantissa */
|
507 |
stq(ptr, (MANTD(temp) << 11) | (1LL << 63)); |
508 |
/* exponent + sign */
|
509 |
e = EXPD(temp) - EXPBIAS + 16383;
|
510 |
e |= SIGND(temp) >> 16;
|
511 |
stw(ptr + 8, e);
|
512 |
} |
513 |
#else
|
514 |
|
515 |
/* XXX: same endianness assumed */
|
516 |
|
517 |
#ifdef CONFIG_USER_ONLY
|
518 |
|
519 |
static inline CPU86_LDouble helper_fldt(target_ulong ptr) |
520 |
{ |
521 |
return *(CPU86_LDouble *)ptr;
|
522 |
} |
523 |
|
524 |
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr) |
525 |
{ |
526 |
*(CPU86_LDouble *)ptr = f; |
527 |
} |
528 |
|
529 |
#else
|
530 |
|
531 |
/* we use memory access macros */
|
532 |
|
533 |
static inline CPU86_LDouble helper_fldt(target_ulong ptr) |
534 |
{ |
535 |
CPU86_LDoubleU temp; |
536 |
|
537 |
temp.l.lower = ldq(ptr); |
538 |
temp.l.upper = lduw(ptr + 8);
|
539 |
return temp.d;
|
540 |
} |
541 |
|
542 |
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr) |
543 |
{ |
544 |
CPU86_LDoubleU temp; |
545 |
|
546 |
temp.d = f; |
547 |
stq(ptr, temp.l.lower); |
548 |
stw(ptr + 8, temp.l.upper);
|
549 |
} |
550 |
|
551 |
#endif /* !CONFIG_USER_ONLY */ |
552 |
|
553 |
#endif /* USE_X86LDOUBLE */ |
554 |
|
555 |
#define FPUS_IE (1 << 0) |
556 |
#define FPUS_DE (1 << 1) |
557 |
#define FPUS_ZE (1 << 2) |
558 |
#define FPUS_OE (1 << 3) |
559 |
#define FPUS_UE (1 << 4) |
560 |
#define FPUS_PE (1 << 5) |
561 |
#define FPUS_SF (1 << 6) |
562 |
#define FPUS_SE (1 << 7) |
563 |
#define FPUS_B (1 << 15) |
564 |
|
565 |
#define FPUC_EM 0x3f |
566 |
|
567 |
extern const CPU86_LDouble f15rk[7]; |
568 |
|
569 |
void helper_fldt_ST0_A0(void); |
570 |
void helper_fstt_ST0_A0(void); |
571 |
void fpu_raise_exception(void); |
572 |
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b); |
573 |
void helper_fbld_ST0_A0(void); |
574 |
void helper_fbst_ST0_A0(void); |
575 |
void helper_f2xm1(void); |
576 |
void helper_fyl2x(void); |
577 |
void helper_fptan(void); |
578 |
void helper_fpatan(void); |
579 |
void helper_fxtract(void); |
580 |
void helper_fprem1(void); |
581 |
void helper_fprem(void); |
582 |
void helper_fyl2xp1(void); |
583 |
void helper_fsqrt(void); |
584 |
void helper_fsincos(void); |
585 |
void helper_frndint(void); |
586 |
void helper_fscale(void); |
587 |
void helper_fsin(void); |
588 |
void helper_fcos(void); |
589 |
void helper_fxam_ST0(void); |
590 |
void helper_fstenv(target_ulong ptr, int data32); |
591 |
void helper_fldenv(target_ulong ptr, int data32); |
592 |
void helper_fsave(target_ulong ptr, int data32); |
593 |
void helper_frstor(target_ulong ptr, int data32); |
594 |
void helper_fxsave(target_ulong ptr, int data64); |
595 |
void helper_fxrstor(target_ulong ptr, int data64); |
596 |
void restore_native_fp_state(CPUState *env);
|
597 |
void save_native_fp_state(CPUState *env);
|
598 |
float approx_rsqrt(float a); |
599 |
float approx_rcp(float a); |
600 |
double helper_sqrt(double a); |
601 |
int fpu_isnan(double a); |
602 |
|
603 |
extern const uint8_t parity_table[256]; |
604 |
extern const uint8_t rclw_table[32]; |
605 |
extern const uint8_t rclb_table[32]; |
606 |
|
607 |
static inline uint32_t compute_eflags(void) |
608 |
{ |
609 |
return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
|
610 |
} |
611 |
|
612 |
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
|
613 |
static inline void load_eflags(int eflags, int update_mask) |
614 |
{ |
615 |
CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |
616 |
DF = 1 - (2 * ((eflags >> 10) & 1)); |
617 |
env->eflags = (env->eflags & ~update_mask) | |
618 |
(eflags & update_mask); |
619 |
} |
620 |
|
621 |
static inline void env_to_regs(void) |
622 |
{ |
623 |
#ifdef reg_EAX
|
624 |
EAX = env->regs[R_EAX]; |
625 |
#endif
|
626 |
#ifdef reg_ECX
|
627 |
ECX = env->regs[R_ECX]; |
628 |
#endif
|
629 |
#ifdef reg_EDX
|
630 |
EDX = env->regs[R_EDX]; |
631 |
#endif
|
632 |
#ifdef reg_EBX
|
633 |
EBX = env->regs[R_EBX]; |
634 |
#endif
|
635 |
#ifdef reg_ESP
|
636 |
ESP = env->regs[R_ESP]; |
637 |
#endif
|
638 |
#ifdef reg_EBP
|
639 |
EBP = env->regs[R_EBP]; |
640 |
#endif
|
641 |
#ifdef reg_ESI
|
642 |
ESI = env->regs[R_ESI]; |
643 |
#endif
|
644 |
#ifdef reg_EDI
|
645 |
EDI = env->regs[R_EDI]; |
646 |
#endif
|
647 |
} |
648 |
|
649 |
static inline void regs_to_env(void) |
650 |
{ |
651 |
#ifdef reg_EAX
|
652 |
env->regs[R_EAX] = EAX; |
653 |
#endif
|
654 |
#ifdef reg_ECX
|
655 |
env->regs[R_ECX] = ECX; |
656 |
#endif
|
657 |
#ifdef reg_EDX
|
658 |
env->regs[R_EDX] = EDX; |
659 |
#endif
|
660 |
#ifdef reg_EBX
|
661 |
env->regs[R_EBX] = EBX; |
662 |
#endif
|
663 |
#ifdef reg_ESP
|
664 |
env->regs[R_ESP] = ESP; |
665 |
#endif
|
666 |
#ifdef reg_EBP
|
667 |
env->regs[R_EBP] = EBP; |
668 |
#endif
|
669 |
#ifdef reg_ESI
|
670 |
env->regs[R_ESI] = ESI; |
671 |
#endif
|
672 |
#ifdef reg_EDI
|
673 |
env->regs[R_EDI] = EDI; |
674 |
#endif
|
675 |
} |