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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 5fafdf24 | ths | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pc.h" |
26 | aa28b9bf | Blue Swirl | #include "apic.h" |
27 | 87ecb68b | pbrook | #include "fdc.h" |
28 | 87ecb68b | pbrook | #include "pci.h" |
29 | 18e08a55 | Michael S. Tsirkin | #include "vmware_vga.h" |
30 | 376253ec | aliguori | #include "monitor.h" |
31 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
32 | 16b29ae1 | aliguori | #include "hpet_emul.h" |
33 | b6f6e3d3 | aliguori | #include "smbios.h" |
34 | ca20cf32 | Blue Swirl | #include "loader.h" |
35 | ca20cf32 | Blue Swirl | #include "elf.h" |
36 | 52001445 | Adam Lackorzynski | #include "multiboot.h" |
37 | 1d914fa0 | Isaku Yamahata | #include "mc146818rtc.h" |
38 | 80cabfad | bellard | |
39 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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40 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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41 | b41a2cd1 | bellard | |
42 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
43 | 80cabfad | bellard | |
44 | 7fb4fdcf | balrog | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
45 | 7fb4fdcf | balrog | |
46 | a80274c3 | pbrook | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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47 | a80274c3 | pbrook | #define ACPI_DATA_SIZE 0x10000 |
48 | 3cce6243 | blueswir1 | #define BIOS_CFG_IOPORT 0x510 |
49 | 8a92ea2f | aliguori | #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) |
50 | b6f6e3d3 | aliguori | #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) |
51 | 6b35e7bf | Jes Sorensen | #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) |
52 | 4c5b10b7 | Jes Sorensen | #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) |
53 | 80cabfad | bellard | |
54 | 4c5b10b7 | Jes Sorensen | #define E820_NR_ENTRIES 16 |
55 | 4c5b10b7 | Jes Sorensen | |
56 | 4c5b10b7 | Jes Sorensen | struct e820_entry {
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57 | 4c5b10b7 | Jes Sorensen | uint64_t address; |
58 | 4c5b10b7 | Jes Sorensen | uint64_t length; |
59 | 4c5b10b7 | Jes Sorensen | uint32_t type; |
60 | 4c5b10b7 | Jes Sorensen | }; |
61 | 4c5b10b7 | Jes Sorensen | |
62 | 4c5b10b7 | Jes Sorensen | struct e820_table {
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63 | 4c5b10b7 | Jes Sorensen | uint32_t count; |
64 | 4c5b10b7 | Jes Sorensen | struct e820_entry entry[E820_NR_ENTRIES];
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65 | 4c5b10b7 | Jes Sorensen | }; |
66 | 4c5b10b7 | Jes Sorensen | |
67 | 4c5b10b7 | Jes Sorensen | static struct e820_table e820_table; |
68 | 4c5b10b7 | Jes Sorensen | |
69 | 845773ab | Isaku Yamahata | void isa_irq_handler(void *opaque, int n, int level) |
70 | 1452411b | Avi Kivity | { |
71 | 1452411b | Avi Kivity | IsaIrqState *isa = (IsaIrqState *)opaque; |
72 | 1452411b | Avi Kivity | |
73 | 1632dc6a | Avi Kivity | if (n < 16) { |
74 | 1632dc6a | Avi Kivity | qemu_set_irq(isa->i8259[n], level); |
75 | 1632dc6a | Avi Kivity | } |
76 | 2c8d9340 | Gerd Hoffmann | if (isa->ioapic)
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77 | 2c8d9340 | Gerd Hoffmann | qemu_set_irq(isa->ioapic[n], level); |
78 | 1632dc6a | Avi Kivity | }; |
79 | 1452411b | Avi Kivity | |
80 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
81 | 80cabfad | bellard | { |
82 | 80cabfad | bellard | } |
83 | 80cabfad | bellard | |
84 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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85 | d537cf6c | pbrook | static qemu_irq ferr_irq;
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86 | 8e78eb28 | Isaku Yamahata | |
87 | 8e78eb28 | Isaku Yamahata | void pc_register_ferr_irq(qemu_irq irq)
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88 | 8e78eb28 | Isaku Yamahata | { |
89 | 8e78eb28 | Isaku Yamahata | ferr_irq = irq; |
90 | 8e78eb28 | Isaku Yamahata | } |
91 | 8e78eb28 | Isaku Yamahata | |
92 | f929aad6 | bellard | /* XXX: add IGNNE support */
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93 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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94 | f929aad6 | bellard | { |
95 | d537cf6c | pbrook | qemu_irq_raise(ferr_irq); |
96 | f929aad6 | bellard | } |
97 | f929aad6 | bellard | |
98 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
99 | f929aad6 | bellard | { |
100 | d537cf6c | pbrook | qemu_irq_lower(ferr_irq); |
101 | f929aad6 | bellard | } |
102 | f929aad6 | bellard | |
103 | 28ab0e2e | bellard | /* TSC handling */
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104 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
105 | 28ab0e2e | bellard | { |
106 | 4a1418e0 | Anthony Liguori | return cpu_get_ticks();
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107 | 28ab0e2e | bellard | } |
108 | 28ab0e2e | bellard | |
109 | a5954d5c | bellard | /* SMM support */
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110 | f885f1ea | Isaku Yamahata | |
111 | f885f1ea | Isaku Yamahata | static cpu_set_smm_t smm_set;
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112 | f885f1ea | Isaku Yamahata | static void *smm_arg; |
113 | f885f1ea | Isaku Yamahata | |
114 | f885f1ea | Isaku Yamahata | void cpu_smm_register(cpu_set_smm_t callback, void *arg) |
115 | f885f1ea | Isaku Yamahata | { |
116 | f885f1ea | Isaku Yamahata | assert(smm_set == NULL);
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117 | f885f1ea | Isaku Yamahata | assert(smm_arg == NULL);
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118 | f885f1ea | Isaku Yamahata | smm_set = callback; |
119 | f885f1ea | Isaku Yamahata | smm_arg = arg; |
120 | f885f1ea | Isaku Yamahata | } |
121 | f885f1ea | Isaku Yamahata | |
122 | a5954d5c | bellard | void cpu_smm_update(CPUState *env)
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123 | a5954d5c | bellard | { |
124 | f885f1ea | Isaku Yamahata | if (smm_set && smm_arg && env == first_cpu)
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125 | f885f1ea | Isaku Yamahata | smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg); |
126 | a5954d5c | bellard | } |
127 | a5954d5c | bellard | |
128 | a5954d5c | bellard | |
129 | 3de388f6 | bellard | /* IRQ handling */
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130 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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131 | 3de388f6 | bellard | { |
132 | 3de388f6 | bellard | int intno;
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133 | 3de388f6 | bellard | |
134 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
135 | 3de388f6 | bellard | if (intno >= 0) { |
136 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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137 | 3de388f6 | bellard | /* XXX: improve that */
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138 | 5fafdf24 | ths | pic_update_irq(isa_pic); |
139 | 3de388f6 | bellard | return intno;
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140 | 3de388f6 | bellard | } |
141 | 3de388f6 | bellard | /* read the irq from the PIC */
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142 | 0e21e12b | ths | if (!apic_accept_pic_intr(env))
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143 | 0e21e12b | ths | return -1; |
144 | 0e21e12b | ths | |
145 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
146 | 3de388f6 | bellard | return intno;
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147 | 3de388f6 | bellard | } |
148 | 3de388f6 | bellard | |
149 | d537cf6c | pbrook | static void pic_irq_request(void *opaque, int irq, int level) |
150 | 3de388f6 | bellard | { |
151 | a5b38b51 | aurel32 | CPUState *env = first_cpu; |
152 | a5b38b51 | aurel32 | |
153 | d5529471 | aurel32 | if (env->apic_state) {
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154 | d5529471 | aurel32 | while (env) {
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155 | d5529471 | aurel32 | if (apic_accept_pic_intr(env))
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156 | 1a7de94a | aurel32 | apic_deliver_pic_intr(env, level); |
157 | d5529471 | aurel32 | env = env->next_cpu; |
158 | d5529471 | aurel32 | } |
159 | d5529471 | aurel32 | } else {
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160 | b614106a | aurel32 | if (level)
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161 | b614106a | aurel32 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
162 | b614106a | aurel32 | else
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163 | b614106a | aurel32 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
164 | a5b38b51 | aurel32 | } |
165 | 3de388f6 | bellard | } |
166 | 3de388f6 | bellard | |
167 | b0a21b53 | bellard | /* PC cmos mappings */
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168 | b0a21b53 | bellard | |
169 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
170 | 80cabfad | bellard | |
171 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
172 | 777428f2 | bellard | { |
173 | 777428f2 | bellard | int val;
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174 | 777428f2 | bellard | |
175 | 777428f2 | bellard | switch (fd0) {
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176 | 777428f2 | bellard | case 0: |
177 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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178 | 777428f2 | bellard | val = 4;
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179 | 777428f2 | bellard | break;
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180 | 777428f2 | bellard | case 1: |
181 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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182 | 777428f2 | bellard | val = 5;
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183 | 777428f2 | bellard | break;
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184 | 777428f2 | bellard | case 2: |
185 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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186 | 777428f2 | bellard | val = 2;
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187 | 777428f2 | bellard | break;
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188 | 777428f2 | bellard | default:
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189 | 777428f2 | bellard | val = 0;
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190 | 777428f2 | bellard | break;
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191 | 777428f2 | bellard | } |
192 | 777428f2 | bellard | return val;
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193 | 777428f2 | bellard | } |
194 | 777428f2 | bellard | |
195 | ec2654fb | Isaku Yamahata | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd, |
196 | 1d914fa0 | Isaku Yamahata | ISADevice *s) |
197 | ba6c2377 | bellard | { |
198 | ba6c2377 | bellard | int cylinders, heads, sectors;
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199 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
200 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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201 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
202 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
203 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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204 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
205 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
206 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
207 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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208 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
209 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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210 | ba6c2377 | bellard | } |
211 | ba6c2377 | bellard | |
212 | 6ac0e82d | balrog | /* convert boot_device letter to something recognizable by the bios */
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213 | 6ac0e82d | balrog | static int boot_device2nibble(char boot_device) |
214 | 6ac0e82d | balrog | { |
215 | 6ac0e82d | balrog | switch(boot_device) {
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216 | 6ac0e82d | balrog | case 'a': |
217 | 6ac0e82d | balrog | case 'b': |
218 | 6ac0e82d | balrog | return 0x01; /* floppy boot */ |
219 | 6ac0e82d | balrog | case 'c': |
220 | 6ac0e82d | balrog | return 0x02; /* hard drive boot */ |
221 | 6ac0e82d | balrog | case 'd': |
222 | 6ac0e82d | balrog | return 0x03; /* CD-ROM boot */ |
223 | 6ac0e82d | balrog | case 'n': |
224 | 6ac0e82d | balrog | return 0x04; /* Network boot */ |
225 | 6ac0e82d | balrog | } |
226 | 6ac0e82d | balrog | return 0; |
227 | 6ac0e82d | balrog | } |
228 | 6ac0e82d | balrog | |
229 | 1d914fa0 | Isaku Yamahata | static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk) |
230 | 0ecdffbb | aurel32 | { |
231 | 0ecdffbb | aurel32 | #define PC_MAX_BOOT_DEVICES 3 |
232 | 0ecdffbb | aurel32 | int nbds, bds[3] = { 0, }; |
233 | 0ecdffbb | aurel32 | int i;
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234 | 0ecdffbb | aurel32 | |
235 | 0ecdffbb | aurel32 | nbds = strlen(boot_device); |
236 | 0ecdffbb | aurel32 | if (nbds > PC_MAX_BOOT_DEVICES) {
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237 | 1ecda02b | Markus Armbruster | error_report("Too many boot devices for PC");
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238 | 0ecdffbb | aurel32 | return(1); |
239 | 0ecdffbb | aurel32 | } |
240 | 0ecdffbb | aurel32 | for (i = 0; i < nbds; i++) { |
241 | 0ecdffbb | aurel32 | bds[i] = boot_device2nibble(boot_device[i]); |
242 | 0ecdffbb | aurel32 | if (bds[i] == 0) { |
243 | 1ecda02b | Markus Armbruster | error_report("Invalid boot device for PC: '%c'",
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244 | 1ecda02b | Markus Armbruster | boot_device[i]); |
245 | 0ecdffbb | aurel32 | return(1); |
246 | 0ecdffbb | aurel32 | } |
247 | 0ecdffbb | aurel32 | } |
248 | 0ecdffbb | aurel32 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
249 | d9346e81 | Markus Armbruster | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
250 | 0ecdffbb | aurel32 | return(0); |
251 | 0ecdffbb | aurel32 | } |
252 | 0ecdffbb | aurel32 | |
253 | d9346e81 | Markus Armbruster | static int pc_boot_set(void *opaque, const char *boot_device) |
254 | d9346e81 | Markus Armbruster | { |
255 | d9346e81 | Markus Armbruster | return set_boot_dev(opaque, boot_device, 0); |
256 | d9346e81 | Markus Armbruster | } |
257 | d9346e81 | Markus Armbruster | |
258 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
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259 | 845773ab | Isaku Yamahata | void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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260 | 845773ab | Isaku Yamahata | const char *boot_device, DriveInfo **hd_table, |
261 | 1d914fa0 | Isaku Yamahata | FDCtrl *floppy_controller, ISADevice *s) |
262 | 80cabfad | bellard | { |
263 | 80cabfad | bellard | int val;
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264 | b41a2cd1 | bellard | int fd0, fd1, nb;
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265 | ba6c2377 | bellard | int i;
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266 | b0a21b53 | bellard | |
267 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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268 | 80cabfad | bellard | |
269 | 80cabfad | bellard | /* memory size */
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270 | 333190eb | bellard | val = 640; /* base memory in K */ |
271 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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272 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
273 | 333190eb | bellard | |
274 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
275 | 80cabfad | bellard | if (val > 65535) |
276 | 80cabfad | bellard | val = 65535;
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277 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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278 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
279 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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280 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
281 | 80cabfad | bellard | |
282 | 00f82b8a | aurel32 | if (above_4g_mem_size) {
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283 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); |
284 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); |
285 | 00f82b8a | aurel32 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); |
286 | 00f82b8a | aurel32 | } |
287 | 00f82b8a | aurel32 | |
288 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
289 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
290 | 9da98861 | bellard | else
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291 | 9da98861 | bellard | val = 0;
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292 | 80cabfad | bellard | if (val > 65535) |
293 | 80cabfad | bellard | val = 65535;
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294 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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295 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
296 | 3b46e624 | ths | |
297 | 298e01b6 | aurel32 | /* set the number of CPU */
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298 | 298e01b6 | aurel32 | rtc_set_memory(s, 0x5f, smp_cpus - 1); |
299 | 298e01b6 | aurel32 | |
300 | 6ac0e82d | balrog | /* set boot devices, and disable floppy signature check if requested */
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301 | d9346e81 | Markus Armbruster | if (set_boot_dev(s, boot_device, fd_bootchk)) {
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302 | 28c5af54 | j_mayer | exit(1);
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303 | 28c5af54 | j_mayer | } |
304 | 80cabfad | bellard | |
305 | b41a2cd1 | bellard | /* floppy type */
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306 | b41a2cd1 | bellard | |
307 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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308 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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309 | 80cabfad | bellard | |
310 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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311 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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312 | 3b46e624 | ths | |
313 | b0a21b53 | bellard | val = 0;
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314 | b41a2cd1 | bellard | nb = 0;
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315 | 80cabfad | bellard | if (fd0 < 3) |
316 | 80cabfad | bellard | nb++; |
317 | 80cabfad | bellard | if (fd1 < 3) |
318 | 80cabfad | bellard | nb++; |
319 | 80cabfad | bellard | switch (nb) {
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320 | 80cabfad | bellard | case 0: |
321 | 80cabfad | bellard | break;
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322 | 80cabfad | bellard | case 1: |
323 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
324 | 80cabfad | bellard | break;
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325 | 80cabfad | bellard | case 2: |
326 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
327 | 80cabfad | bellard | break;
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328 | 80cabfad | bellard | } |
329 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
330 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
331 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
332 | b0a21b53 | bellard | |
333 | ba6c2377 | bellard | /* hard drives */
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334 | ba6c2377 | bellard | |
335 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
336 | ba6c2377 | bellard | if (hd_table[0]) |
337 | ec2654fb | Isaku Yamahata | cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s); |
338 | 5fafdf24 | ths | if (hd_table[1]) |
339 | ec2654fb | Isaku Yamahata | cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s); |
340 | ba6c2377 | bellard | |
341 | ba6c2377 | bellard | val = 0;
|
342 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
343 | ba6c2377 | bellard | if (hd_table[i]) {
|
344 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
|
345 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
|
346 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
|
347 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
348 | 46d4767d | bellard | geometry can be different if a translation is done. */
|
349 | f455e98c | Gerd Hoffmann | translation = bdrv_get_translation_hint(hd_table[i]->bdrv); |
350 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
351 | f455e98c | Gerd Hoffmann | bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, §ors); |
352 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
353 | 46d4767d | bellard | /* No translation. */
|
354 | 46d4767d | bellard | translation = 0;
|
355 | 46d4767d | bellard | } else {
|
356 | 46d4767d | bellard | /* LBA translation. */
|
357 | 46d4767d | bellard | translation = 1;
|
358 | 46d4767d | bellard | } |
359 | 40b6ecc6 | bellard | } else {
|
360 | 46d4767d | bellard | translation--; |
361 | ba6c2377 | bellard | } |
362 | ba6c2377 | bellard | val |= translation << (i * 2);
|
363 | ba6c2377 | bellard | } |
364 | 40b6ecc6 | bellard | } |
365 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
|
366 | 80cabfad | bellard | } |
367 | 80cabfad | bellard | |
368 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
369 | 59b8ad81 | bellard | { |
370 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
|
371 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
372 | 59b8ad81 | bellard | } |
373 | 59b8ad81 | bellard | |
374 | 59b8ad81 | bellard | int ioport_get_a20(void) |
375 | 59b8ad81 | bellard | { |
376 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
377 | 59b8ad81 | bellard | } |
378 | 59b8ad81 | bellard | |
379 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
380 | e1a23744 | bellard | { |
381 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
382 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
|
383 | e1a23744 | bellard | } |
384 | e1a23744 | bellard | |
385 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
386 | e1a23744 | bellard | { |
387 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
388 | e1a23744 | bellard | } |
389 | e1a23744 | bellard | |
390 | 80cabfad | bellard | /***********************************************************/
|
391 | 80cabfad | bellard | /* Bochs BIOS debug ports */
|
392 | 80cabfad | bellard | |
393 | 9596ebb7 | pbrook | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
394 | 80cabfad | bellard | { |
395 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
396 | a2f659ee | bellard | static int shutdown_index = 0; |
397 | 3b46e624 | ths | |
398 | 80cabfad | bellard | switch(addr) {
|
399 | 80cabfad | bellard | /* Bochs BIOS messages */
|
400 | 80cabfad | bellard | case 0x400: |
401 | 80cabfad | bellard | case 0x401: |
402 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
403 | 80cabfad | bellard | exit(1);
|
404 | 80cabfad | bellard | case 0x402: |
405 | 80cabfad | bellard | case 0x403: |
406 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
407 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
408 | 80cabfad | bellard | #endif
|
409 | 80cabfad | bellard | break;
|
410 | a2f659ee | bellard | case 0x8900: |
411 | a2f659ee | bellard | /* same as Bochs power off */
|
412 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
|
413 | a2f659ee | bellard | shutdown_index++; |
414 | a2f659ee | bellard | if (shutdown_index == 8) { |
415 | a2f659ee | bellard | shutdown_index = 0;
|
416 | a2f659ee | bellard | qemu_system_shutdown_request(); |
417 | a2f659ee | bellard | } |
418 | a2f659ee | bellard | } else {
|
419 | a2f659ee | bellard | shutdown_index = 0;
|
420 | a2f659ee | bellard | } |
421 | a2f659ee | bellard | break;
|
422 | 80cabfad | bellard | |
423 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
|
424 | 80cabfad | bellard | case 0x501: |
425 | 80cabfad | bellard | case 0x502: |
426 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
427 | 80cabfad | bellard | exit(1);
|
428 | 80cabfad | bellard | case 0x500: |
429 | 80cabfad | bellard | case 0x503: |
430 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
431 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
432 | 80cabfad | bellard | #endif
|
433 | 80cabfad | bellard | break;
|
434 | 80cabfad | bellard | } |
435 | 80cabfad | bellard | } |
436 | 80cabfad | bellard | |
437 | 4c5b10b7 | Jes Sorensen | int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
|
438 | 4c5b10b7 | Jes Sorensen | { |
439 | 4c5b10b7 | Jes Sorensen | int index = e820_table.count;
|
440 | 4c5b10b7 | Jes Sorensen | struct e820_entry *entry;
|
441 | 4c5b10b7 | Jes Sorensen | |
442 | 4c5b10b7 | Jes Sorensen | if (index >= E820_NR_ENTRIES)
|
443 | 4c5b10b7 | Jes Sorensen | return -EBUSY;
|
444 | 4c5b10b7 | Jes Sorensen | entry = &e820_table.entry[index]; |
445 | 4c5b10b7 | Jes Sorensen | |
446 | 4c5b10b7 | Jes Sorensen | entry->address = address; |
447 | 4c5b10b7 | Jes Sorensen | entry->length = length; |
448 | 4c5b10b7 | Jes Sorensen | entry->type = type; |
449 | 4c5b10b7 | Jes Sorensen | |
450 | 4c5b10b7 | Jes Sorensen | e820_table.count++; |
451 | 4c5b10b7 | Jes Sorensen | return e820_table.count;
|
452 | 4c5b10b7 | Jes Sorensen | } |
453 | 4c5b10b7 | Jes Sorensen | |
454 | bf483392 | Alexander Graf | static void *bochs_bios_init(void) |
455 | 80cabfad | bellard | { |
456 | 3cce6243 | blueswir1 | void *fw_cfg;
|
457 | b6f6e3d3 | aliguori | uint8_t *smbios_table; |
458 | b6f6e3d3 | aliguori | size_t smbios_len; |
459 | 11c2fd3e | aliguori | uint64_t *numa_fw_cfg; |
460 | 11c2fd3e | aliguori | int i, j;
|
461 | 3cce6243 | blueswir1 | |
462 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
463 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
464 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
465 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
466 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
467 | b41a2cd1 | bellard | |
468 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
469 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
470 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
471 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
472 | 3cce6243 | blueswir1 | |
473 | 3cce6243 | blueswir1 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); |
474 | bf483392 | Alexander Graf | |
475 | 3cce6243 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
476 | 905fdcb5 | blueswir1 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
477 | 80deece2 | blueswir1 | fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables, |
478 | 80deece2 | blueswir1 | acpi_tables_len); |
479 | 6b35e7bf | Jes Sorensen | fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
|
480 | b6f6e3d3 | aliguori | |
481 | b6f6e3d3 | aliguori | smbios_table = smbios_get_table(&smbios_len); |
482 | b6f6e3d3 | aliguori | if (smbios_table)
|
483 | b6f6e3d3 | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, |
484 | b6f6e3d3 | aliguori | smbios_table, smbios_len); |
485 | 4c5b10b7 | Jes Sorensen | fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table, |
486 | 4c5b10b7 | Jes Sorensen | sizeof(struct e820_table)); |
487 | 11c2fd3e | aliguori | |
488 | 11c2fd3e | aliguori | /* allocate memory for the NUMA channel: one (64bit) word for the number
|
489 | 11c2fd3e | aliguori | * of nodes, one word for each VCPU->node and one word for each node to
|
490 | 11c2fd3e | aliguori | * hold the amount of memory.
|
491 | 11c2fd3e | aliguori | */
|
492 | 11c2fd3e | aliguori | numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8); |
493 | 11c2fd3e | aliguori | numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
|
494 | 11c2fd3e | aliguori | for (i = 0; i < smp_cpus; i++) { |
495 | 11c2fd3e | aliguori | for (j = 0; j < nb_numa_nodes; j++) { |
496 | 11c2fd3e | aliguori | if (node_cpumask[j] & (1 << i)) { |
497 | 11c2fd3e | aliguori | numa_fw_cfg[i + 1] = cpu_to_le64(j);
|
498 | 11c2fd3e | aliguori | break;
|
499 | 11c2fd3e | aliguori | } |
500 | 11c2fd3e | aliguori | } |
501 | 11c2fd3e | aliguori | } |
502 | 11c2fd3e | aliguori | for (i = 0; i < nb_numa_nodes; i++) { |
503 | 11c2fd3e | aliguori | numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
|
504 | 11c2fd3e | aliguori | } |
505 | 11c2fd3e | aliguori | fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg, |
506 | 11c2fd3e | aliguori | (1 + smp_cpus + nb_numa_nodes) * 8); |
507 | bf483392 | Alexander Graf | |
508 | bf483392 | Alexander Graf | return fw_cfg;
|
509 | 80cabfad | bellard | } |
510 | 80cabfad | bellard | |
511 | 642a4f96 | ths | static long get_file_size(FILE *f) |
512 | 642a4f96 | ths | { |
513 | 642a4f96 | ths | long where, size;
|
514 | 642a4f96 | ths | |
515 | 642a4f96 | ths | /* XXX: on Unix systems, using fstat() probably makes more sense */
|
516 | 642a4f96 | ths | |
517 | 642a4f96 | ths | where = ftell(f); |
518 | 642a4f96 | ths | fseek(f, 0, SEEK_END);
|
519 | 642a4f96 | ths | size = ftell(f); |
520 | 642a4f96 | ths | fseek(f, where, SEEK_SET); |
521 | 642a4f96 | ths | |
522 | 642a4f96 | ths | return size;
|
523 | 642a4f96 | ths | } |
524 | 642a4f96 | ths | |
525 | f16408df | Alexander Graf | static void load_linux(void *fw_cfg, |
526 | 4fc9af53 | aliguori | const char *kernel_filename, |
527 | 642a4f96 | ths | const char *initrd_filename, |
528 | e6ade764 | Glauber Costa | const char *kernel_cmdline, |
529 | 45a50b16 | Gerd Hoffmann | target_phys_addr_t max_ram_size) |
530 | 642a4f96 | ths | { |
531 | 642a4f96 | ths | uint16_t protocol; |
532 | 5cea8590 | Paul Brook | int setup_size, kernel_size, initrd_size = 0, cmdline_size; |
533 | 642a4f96 | ths | uint32_t initrd_max; |
534 | 57a46d05 | Alexander Graf | uint8_t header[8192], *setup, *kernel, *initrd_data;
|
535 | c227f099 | Anthony Liguori | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
|
536 | 45a50b16 | Gerd Hoffmann | FILE *f; |
537 | bf4e5d92 | Pascal Terjan | char *vmode;
|
538 | 642a4f96 | ths | |
539 | 642a4f96 | ths | /* Align to 16 bytes as a paranoia measure */
|
540 | 642a4f96 | ths | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
541 | 642a4f96 | ths | |
542 | 642a4f96 | ths | /* load the kernel header */
|
543 | 642a4f96 | ths | f = fopen(kernel_filename, "rb");
|
544 | 642a4f96 | ths | if (!f || !(kernel_size = get_file_size(f)) ||
|
545 | f16408df | Alexander Graf | fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
|
546 | f16408df | Alexander Graf | MIN(ARRAY_SIZE(header), kernel_size)) { |
547 | 850810d0 | Justin M. Forbes | fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
|
548 | 850810d0 | Justin M. Forbes | kernel_filename, strerror(errno)); |
549 | 642a4f96 | ths | exit(1);
|
550 | 642a4f96 | ths | } |
551 | 642a4f96 | ths | |
552 | 642a4f96 | ths | /* kernel protocol version */
|
553 | bc4edd79 | bellard | #if 0
|
554 | 642a4f96 | ths | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
555 | bc4edd79 | bellard | #endif
|
556 | 642a4f96 | ths | if (ldl_p(header+0x202) == 0x53726448) |
557 | 642a4f96 | ths | protocol = lduw_p(header+0x206);
|
558 | f16408df | Alexander Graf | else {
|
559 | f16408df | Alexander Graf | /* This looks like a multiboot kernel. If it is, let's stop
|
560 | f16408df | Alexander Graf | treating it like a Linux kernel. */
|
561 | 52001445 | Adam Lackorzynski | if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
|
562 | 52001445 | Adam Lackorzynski | kernel_cmdline, kernel_size, header)) |
563 | 82663ee2 | Blue Swirl | return;
|
564 | 642a4f96 | ths | protocol = 0;
|
565 | f16408df | Alexander Graf | } |
566 | 642a4f96 | ths | |
567 | 642a4f96 | ths | if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
568 | 642a4f96 | ths | /* Low kernel */
|
569 | a37af289 | blueswir1 | real_addr = 0x90000;
|
570 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
571 | a37af289 | blueswir1 | prot_addr = 0x10000;
|
572 | 642a4f96 | ths | } else if (protocol < 0x202) { |
573 | 642a4f96 | ths | /* High but ancient kernel */
|
574 | a37af289 | blueswir1 | real_addr = 0x90000;
|
575 | a37af289 | blueswir1 | cmdline_addr = 0x9a000 - cmdline_size;
|
576 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
577 | 642a4f96 | ths | } else {
|
578 | 642a4f96 | ths | /* High and recent kernel */
|
579 | a37af289 | blueswir1 | real_addr = 0x10000;
|
580 | a37af289 | blueswir1 | cmdline_addr = 0x20000;
|
581 | a37af289 | blueswir1 | prot_addr = 0x100000;
|
582 | 642a4f96 | ths | } |
583 | 642a4f96 | ths | |
584 | bc4edd79 | bellard | #if 0
|
585 | 642a4f96 | ths | fprintf(stderr,
|
586 | 526ccb7a | balrog | "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
|
587 | 526ccb7a | balrog | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
|
588 | 526ccb7a | balrog | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
|
589 | a37af289 | blueswir1 | real_addr,
|
590 | a37af289 | blueswir1 | cmdline_addr,
|
591 | a37af289 | blueswir1 | prot_addr);
|
592 | bc4edd79 | bellard | #endif
|
593 | 642a4f96 | ths | |
594 | 642a4f96 | ths | /* highest address for loading the initrd */
|
595 | 642a4f96 | ths | if (protocol >= 0x203) |
596 | 642a4f96 | ths | initrd_max = ldl_p(header+0x22c);
|
597 | 642a4f96 | ths | else
|
598 | 642a4f96 | ths | initrd_max = 0x37ffffff;
|
599 | 642a4f96 | ths | |
600 | e6ade764 | Glauber Costa | if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
|
601 | e6ade764 | Glauber Costa | initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
|
602 | 642a4f96 | ths | |
603 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr); |
604 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
|
605 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA, |
606 | 57a46d05 | Alexander Graf | (uint8_t*)strdup(kernel_cmdline), |
607 | 57a46d05 | Alexander Graf | strlen(kernel_cmdline)+1);
|
608 | 642a4f96 | ths | |
609 | 642a4f96 | ths | if (protocol >= 0x202) { |
610 | a37af289 | blueswir1 | stl_p(header+0x228, cmdline_addr);
|
611 | 642a4f96 | ths | } else {
|
612 | 642a4f96 | ths | stw_p(header+0x20, 0xA33F); |
613 | 642a4f96 | ths | stw_p(header+0x22, cmdline_addr-real_addr);
|
614 | 642a4f96 | ths | } |
615 | 642a4f96 | ths | |
616 | bf4e5d92 | Pascal Terjan | /* handle vga= parameter */
|
617 | bf4e5d92 | Pascal Terjan | vmode = strstr(kernel_cmdline, "vga=");
|
618 | bf4e5d92 | Pascal Terjan | if (vmode) {
|
619 | bf4e5d92 | Pascal Terjan | unsigned int video_mode; |
620 | bf4e5d92 | Pascal Terjan | /* skip "vga=" */
|
621 | bf4e5d92 | Pascal Terjan | vmode += 4;
|
622 | bf4e5d92 | Pascal Terjan | if (!strncmp(vmode, "normal", 6)) { |
623 | bf4e5d92 | Pascal Terjan | video_mode = 0xffff;
|
624 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ext", 3)) { |
625 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffe;
|
626 | bf4e5d92 | Pascal Terjan | } else if (!strncmp(vmode, "ask", 3)) { |
627 | bf4e5d92 | Pascal Terjan | video_mode = 0xfffd;
|
628 | bf4e5d92 | Pascal Terjan | } else {
|
629 | bf4e5d92 | Pascal Terjan | video_mode = strtol(vmode, NULL, 0); |
630 | bf4e5d92 | Pascal Terjan | } |
631 | bf4e5d92 | Pascal Terjan | stw_p(header+0x1fa, video_mode);
|
632 | bf4e5d92 | Pascal Terjan | } |
633 | bf4e5d92 | Pascal Terjan | |
634 | 642a4f96 | ths | /* loader type */
|
635 | 642a4f96 | ths | /* High nybble = B reserved for Qemu; low nybble is revision number.
|
636 | 642a4f96 | ths | If this code is substantially changed, you may want to consider
|
637 | 642a4f96 | ths | incrementing the revision. */
|
638 | 642a4f96 | ths | if (protocol >= 0x200) |
639 | 642a4f96 | ths | header[0x210] = 0xB0; |
640 | 642a4f96 | ths | |
641 | 642a4f96 | ths | /* heap */
|
642 | 642a4f96 | ths | if (protocol >= 0x201) { |
643 | 642a4f96 | ths | header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
644 | 642a4f96 | ths | stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
645 | 642a4f96 | ths | } |
646 | 642a4f96 | ths | |
647 | 642a4f96 | ths | /* load initrd */
|
648 | 642a4f96 | ths | if (initrd_filename) {
|
649 | 642a4f96 | ths | if (protocol < 0x200) { |
650 | 642a4f96 | ths | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
651 | 642a4f96 | ths | exit(1);
|
652 | 642a4f96 | ths | } |
653 | 642a4f96 | ths | |
654 | 45a50b16 | Gerd Hoffmann | initrd_size = get_image_size(initrd_filename); |
655 | d6fa4b77 | M. Mohan Kumar | if (initrd_size < 0) { |
656 | d6fa4b77 | M. Mohan Kumar | fprintf(stderr, "qemu: error reading initrd %s\n",
|
657 | d6fa4b77 | M. Mohan Kumar | initrd_filename); |
658 | d6fa4b77 | M. Mohan Kumar | exit(1);
|
659 | d6fa4b77 | M. Mohan Kumar | } |
660 | d6fa4b77 | M. Mohan Kumar | |
661 | 45a50b16 | Gerd Hoffmann | initrd_addr = (initrd_max-initrd_size) & ~4095;
|
662 | 57a46d05 | Alexander Graf | |
663 | 57a46d05 | Alexander Graf | initrd_data = qemu_malloc(initrd_size); |
664 | 57a46d05 | Alexander Graf | load_image(initrd_filename, initrd_data); |
665 | 57a46d05 | Alexander Graf | |
666 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); |
667 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); |
668 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size); |
669 | 642a4f96 | ths | |
670 | a37af289 | blueswir1 | stl_p(header+0x218, initrd_addr);
|
671 | 642a4f96 | ths | stl_p(header+0x21c, initrd_size);
|
672 | 642a4f96 | ths | } |
673 | 642a4f96 | ths | |
674 | 45a50b16 | Gerd Hoffmann | /* load kernel and setup */
|
675 | 642a4f96 | ths | setup_size = header[0x1f1];
|
676 | 642a4f96 | ths | if (setup_size == 0) |
677 | 642a4f96 | ths | setup_size = 4;
|
678 | 642a4f96 | ths | setup_size = (setup_size+1)*512; |
679 | 45a50b16 | Gerd Hoffmann | kernel_size -= setup_size; |
680 | 642a4f96 | ths | |
681 | 45a50b16 | Gerd Hoffmann | setup = qemu_malloc(setup_size); |
682 | 45a50b16 | Gerd Hoffmann | kernel = qemu_malloc(kernel_size); |
683 | 45a50b16 | Gerd Hoffmann | fseek(f, 0, SEEK_SET);
|
684 | 5a41ecc5 | Kirill A. Shutemov | if (fread(setup, 1, setup_size, f) != setup_size) { |
685 | 5a41ecc5 | Kirill A. Shutemov | fprintf(stderr, "fread() failed\n");
|
686 | 5a41ecc5 | Kirill A. Shutemov | exit(1);
|
687 | 5a41ecc5 | Kirill A. Shutemov | } |
688 | 5a41ecc5 | Kirill A. Shutemov | if (fread(kernel, 1, kernel_size, f) != kernel_size) { |
689 | 5a41ecc5 | Kirill A. Shutemov | fprintf(stderr, "fread() failed\n");
|
690 | 5a41ecc5 | Kirill A. Shutemov | exit(1);
|
691 | 5a41ecc5 | Kirill A. Shutemov | } |
692 | 642a4f96 | ths | fclose(f); |
693 | 45a50b16 | Gerd Hoffmann | memcpy(setup, header, MIN(sizeof(header), setup_size));
|
694 | 57a46d05 | Alexander Graf | |
695 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr); |
696 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); |
697 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size); |
698 | 57a46d05 | Alexander Graf | |
699 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr); |
700 | 57a46d05 | Alexander Graf | fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); |
701 | 57a46d05 | Alexander Graf | fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); |
702 | 57a46d05 | Alexander Graf | |
703 | 57a46d05 | Alexander Graf | option_rom[nb_option_roms] = "linuxboot.bin";
|
704 | 57a46d05 | Alexander Graf | nb_option_roms++; |
705 | 642a4f96 | ths | } |
706 | 642a4f96 | ths | |
707 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
708 | b41a2cd1 | bellard | |
709 | 675d6f82 | Blue Swirl | static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, |
710 | 675d6f82 | Blue Swirl | 0x280, 0x380 }; |
711 | 675d6f82 | Blue Swirl | static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
712 | b41a2cd1 | bellard | |
713 | 675d6f82 | Blue Swirl | static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
714 | 675d6f82 | Blue Swirl | static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
715 | 6508fe59 | bellard | |
716 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
717 | 845773ab | Isaku Yamahata | void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
|
718 | 6a36d84e | bellard | { |
719 | 6a36d84e | bellard | struct soundhw *c;
|
720 | 6a36d84e | bellard | |
721 | 3a8bae3e | malc | for (c = soundhw; c->name; ++c) {
|
722 | 3a8bae3e | malc | if (c->enabled) {
|
723 | 3a8bae3e | malc | if (c->isa) {
|
724 | 3a8bae3e | malc | c->init.init_isa(pic); |
725 | 3a8bae3e | malc | } else {
|
726 | 3a8bae3e | malc | if (pci_bus) {
|
727 | 3a8bae3e | malc | c->init.init_pci(pci_bus); |
728 | 6a36d84e | bellard | } |
729 | 6a36d84e | bellard | } |
730 | 6a36d84e | bellard | } |
731 | 6a36d84e | bellard | } |
732 | 6a36d84e | bellard | } |
733 | 6a36d84e | bellard | #endif
|
734 | 6a36d84e | bellard | |
735 | 845773ab | Isaku Yamahata | void pc_init_ne2k_isa(NICInfo *nd)
|
736 | a41b2ff2 | pbrook | { |
737 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
738 | a41b2ff2 | pbrook | |
739 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
740 | a41b2ff2 | pbrook | return;
|
741 | 3a38d437 | Jes Sorensen | isa_ne2000_init(ne2000_io[nb_ne2k], |
742 | 9453c5bc | Gerd Hoffmann | ne2000_irq[nb_ne2k], nd); |
743 | a41b2ff2 | pbrook | nb_ne2k++; |
744 | a41b2ff2 | pbrook | } |
745 | a41b2ff2 | pbrook | |
746 | 678e12cc | Gleb Natapov | int cpu_is_bsp(CPUState *env)
|
747 | 678e12cc | Gleb Natapov | { |
748 | 6cb2996c | Jan Kiszka | /* We hard-wire the BSP to the first CPU. */
|
749 | 6cb2996c | Jan Kiszka | return env->cpu_index == 0; |
750 | 678e12cc | Gleb Natapov | } |
751 | 678e12cc | Gleb Natapov | |
752 | 53b67b30 | Blue Swirl | /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
|
753 | 53b67b30 | Blue Swirl | BIOS will read it and start S3 resume at POST Entry */
|
754 | 845773ab | Isaku Yamahata | void pc_cmos_set_s3_resume(void *opaque, int irq, int level) |
755 | 53b67b30 | Blue Swirl | { |
756 | 1d914fa0 | Isaku Yamahata | ISADevice *s = opaque; |
757 | 53b67b30 | Blue Swirl | |
758 | 53b67b30 | Blue Swirl | if (level) {
|
759 | 53b67b30 | Blue Swirl | rtc_set_memory(s, 0xF, 0xFE); |
760 | 53b67b30 | Blue Swirl | } |
761 | 53b67b30 | Blue Swirl | } |
762 | 53b67b30 | Blue Swirl | |
763 | 845773ab | Isaku Yamahata | void pc_acpi_smi_interrupt(void *opaque, int irq, int level) |
764 | 53b67b30 | Blue Swirl | { |
765 | 53b67b30 | Blue Swirl | CPUState *s = opaque; |
766 | 53b67b30 | Blue Swirl | |
767 | 53b67b30 | Blue Swirl | if (level) {
|
768 | 53b67b30 | Blue Swirl | cpu_interrupt(s, CPU_INTERRUPT_SMI); |
769 | 53b67b30 | Blue Swirl | } |
770 | 53b67b30 | Blue Swirl | } |
771 | 53b67b30 | Blue Swirl | |
772 | 3a31f36a | Jan Kiszka | static CPUState *pc_new_cpu(const char *cpu_model) |
773 | 3a31f36a | Jan Kiszka | { |
774 | 3a31f36a | Jan Kiszka | CPUState *env; |
775 | 3a31f36a | Jan Kiszka | |
776 | 3a31f36a | Jan Kiszka | env = cpu_init(cpu_model); |
777 | 3a31f36a | Jan Kiszka | if (!env) {
|
778 | 3a31f36a | Jan Kiszka | fprintf(stderr, "Unable to find x86 CPU definition\n");
|
779 | 3a31f36a | Jan Kiszka | exit(1);
|
780 | 3a31f36a | Jan Kiszka | } |
781 | 3a31f36a | Jan Kiszka | if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) { |
782 | 3a31f36a | Jan Kiszka | env->cpuid_apic_id = env->cpu_index; |
783 | 3a31f36a | Jan Kiszka | /* APIC reset callback resets cpu */
|
784 | 3a31f36a | Jan Kiszka | apic_init(env); |
785 | 3a31f36a | Jan Kiszka | } else {
|
786 | 3a31f36a | Jan Kiszka | qemu_register_reset((QEMUResetHandler*)cpu_reset, env); |
787 | 3a31f36a | Jan Kiszka | } |
788 | 3a31f36a | Jan Kiszka | return env;
|
789 | 3a31f36a | Jan Kiszka | } |
790 | 3a31f36a | Jan Kiszka | |
791 | 845773ab | Isaku Yamahata | void pc_cpus_init(const char *cpu_model) |
792 | 70166477 | Isaku Yamahata | { |
793 | 70166477 | Isaku Yamahata | int i;
|
794 | 70166477 | Isaku Yamahata | |
795 | 70166477 | Isaku Yamahata | /* init CPUs */
|
796 | 70166477 | Isaku Yamahata | if (cpu_model == NULL) { |
797 | 70166477 | Isaku Yamahata | #ifdef TARGET_X86_64
|
798 | 70166477 | Isaku Yamahata | cpu_model = "qemu64";
|
799 | 70166477 | Isaku Yamahata | #else
|
800 | 70166477 | Isaku Yamahata | cpu_model = "qemu32";
|
801 | 70166477 | Isaku Yamahata | #endif
|
802 | 70166477 | Isaku Yamahata | } |
803 | 70166477 | Isaku Yamahata | |
804 | 70166477 | Isaku Yamahata | for(i = 0; i < smp_cpus; i++) { |
805 | 70166477 | Isaku Yamahata | pc_new_cpu(cpu_model); |
806 | 70166477 | Isaku Yamahata | } |
807 | 70166477 | Isaku Yamahata | } |
808 | 70166477 | Isaku Yamahata | |
809 | 845773ab | Isaku Yamahata | void pc_memory_init(ram_addr_t ram_size,
|
810 | 845773ab | Isaku Yamahata | const char *kernel_filename, |
811 | 845773ab | Isaku Yamahata | const char *kernel_cmdline, |
812 | 845773ab | Isaku Yamahata | const char *initrd_filename, |
813 | 845773ab | Isaku Yamahata | ram_addr_t *below_4g_mem_size_p, |
814 | 845773ab | Isaku Yamahata | ram_addr_t *above_4g_mem_size_p) |
815 | 80cabfad | bellard | { |
816 | 5cea8590 | Paul Brook | char *filename;
|
817 | 642a4f96 | ths | int ret, linux_boot, i;
|
818 | c227f099 | Anthony Liguori | ram_addr_t ram_addr, bios_offset, option_rom_offset; |
819 | c227f099 | Anthony Liguori | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
820 | 45a50b16 | Gerd Hoffmann | int bios_size, isa_bios_size;
|
821 | 3d53f5c3 | Isaku Yamahata | void **fw_cfg;
|
822 | d592d303 | bellard | |
823 | 00f82b8a | aurel32 | if (ram_size >= 0xe0000000 ) { |
824 | 00f82b8a | aurel32 | above_4g_mem_size = ram_size - 0xe0000000;
|
825 | 00f82b8a | aurel32 | below_4g_mem_size = 0xe0000000;
|
826 | 00f82b8a | aurel32 | } else {
|
827 | 00f82b8a | aurel32 | below_4g_mem_size = ram_size; |
828 | 00f82b8a | aurel32 | } |
829 | 3d53f5c3 | Isaku Yamahata | *above_4g_mem_size_p = above_4g_mem_size; |
830 | 3d53f5c3 | Isaku Yamahata | *below_4g_mem_size_p = below_4g_mem_size; |
831 | 00f82b8a | aurel32 | |
832 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
833 | 80cabfad | bellard | |
834 | 80cabfad | bellard | /* allocate RAM */
|
835 | 60e4c631 | Avi Kivity | ram_addr = qemu_ram_alloc(below_4g_mem_size); |
836 | 82b36dc3 | aliguori | cpu_register_physical_memory(0, 0xa0000, ram_addr); |
837 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000,
|
838 | 82b36dc3 | aliguori | below_4g_mem_size - 0x100000,
|
839 | 60e4c631 | Avi Kivity | ram_addr + 0x100000);
|
840 | 00f82b8a | aurel32 | |
841 | 00f82b8a | aurel32 | /* above 4giga memory allocation */
|
842 | 00f82b8a | aurel32 | if (above_4g_mem_size > 0) { |
843 | 8a637d44 | Paul Brook | #if TARGET_PHYS_ADDR_BITS == 32 |
844 | 8a637d44 | Paul Brook | hw_error("To much RAM for 32-bit physical address");
|
845 | 8a637d44 | Paul Brook | #else
|
846 | 82b36dc3 | aliguori | ram_addr = qemu_ram_alloc(above_4g_mem_size); |
847 | 82b36dc3 | aliguori | cpu_register_physical_memory(0x100000000ULL,
|
848 | 526ccb7a | balrog | above_4g_mem_size, |
849 | 82b36dc3 | aliguori | ram_addr); |
850 | 8a637d44 | Paul Brook | #endif
|
851 | 00f82b8a | aurel32 | } |
852 | 80cabfad | bellard | |
853 | 82b36dc3 | aliguori | |
854 | 970ac5a3 | bellard | /* BIOS load */
|
855 | 1192dad8 | j_mayer | if (bios_name == NULL) |
856 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
857 | 5cea8590 | Paul Brook | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
858 | 5cea8590 | Paul Brook | if (filename) {
|
859 | 5cea8590 | Paul Brook | bios_size = get_image_size(filename); |
860 | 5cea8590 | Paul Brook | } else {
|
861 | 5cea8590 | Paul Brook | bios_size = -1;
|
862 | 5cea8590 | Paul Brook | } |
863 | 5fafdf24 | ths | if (bios_size <= 0 || |
864 | 970ac5a3 | bellard | (bios_size % 65536) != 0) { |
865 | 7587cf44 | bellard | goto bios_error;
|
866 | 7587cf44 | bellard | } |
867 | 970ac5a3 | bellard | bios_offset = qemu_ram_alloc(bios_size); |
868 | 51edd4e6 | Gerd Hoffmann | ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size)); |
869 | 51edd4e6 | Gerd Hoffmann | if (ret != 0) { |
870 | 7587cf44 | bellard | bios_error:
|
871 | 5cea8590 | Paul Brook | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
|
872 | 80cabfad | bellard | exit(1);
|
873 | 80cabfad | bellard | } |
874 | 5cea8590 | Paul Brook | if (filename) {
|
875 | 5cea8590 | Paul Brook | qemu_free(filename); |
876 | 5cea8590 | Paul Brook | } |
877 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
878 | 7587cf44 | bellard | isa_bios_size = bios_size; |
879 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
880 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
881 | 5fafdf24 | ths | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
882 | 5fafdf24 | ths | isa_bios_size, |
883 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
884 | 9ae02555 | ths | |
885 | 45a50b16 | Gerd Hoffmann | option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE); |
886 | 45a50b16 | Gerd Hoffmann | cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset); |
887 | f753ff16 | pbrook | |
888 | 1d108d97 | Alexander Graf | /* map all the bios at the top of memory */
|
889 | 1d108d97 | Alexander Graf | cpu_register_physical_memory((uint32_t)(-bios_size), |
890 | 1d108d97 | Alexander Graf | bios_size, bios_offset | IO_MEM_ROM); |
891 | 1d108d97 | Alexander Graf | |
892 | bf483392 | Alexander Graf | fw_cfg = bochs_bios_init(); |
893 | 8832cb80 | Gerd Hoffmann | rom_set_fw(fw_cfg); |
894 | 1d108d97 | Alexander Graf | |
895 | f753ff16 | pbrook | if (linux_boot) {
|
896 | 3d53f5c3 | Isaku Yamahata | load_linux(*fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size); |
897 | f753ff16 | pbrook | } |
898 | f753ff16 | pbrook | |
899 | f753ff16 | pbrook | for (i = 0; i < nb_option_roms; i++) { |
900 | 45a50b16 | Gerd Hoffmann | rom_add_option(option_rom[i]); |
901 | 406c8df3 | Glauber Costa | } |
902 | 3d53f5c3 | Isaku Yamahata | } |
903 | 3d53f5c3 | Isaku Yamahata | |
904 | 845773ab | Isaku Yamahata | qemu_irq *pc_allocate_cpu_irq(void)
|
905 | 845773ab | Isaku Yamahata | { |
906 | 845773ab | Isaku Yamahata | return qemu_allocate_irqs(pic_irq_request, NULL, 1); |
907 | 845773ab | Isaku Yamahata | } |
908 | 845773ab | Isaku Yamahata | |
909 | 845773ab | Isaku Yamahata | void pc_vga_init(PCIBus *pci_bus)
|
910 | 765d7908 | Isaku Yamahata | { |
911 | 765d7908 | Isaku Yamahata | if (cirrus_vga_enabled) {
|
912 | 765d7908 | Isaku Yamahata | if (pci_bus) {
|
913 | 765d7908 | Isaku Yamahata | pci_cirrus_vga_init(pci_bus); |
914 | 765d7908 | Isaku Yamahata | } else {
|
915 | 765d7908 | Isaku Yamahata | isa_cirrus_vga_init(); |
916 | 765d7908 | Isaku Yamahata | } |
917 | 765d7908 | Isaku Yamahata | } else if (vmsvga_enabled) { |
918 | 765d7908 | Isaku Yamahata | if (pci_bus)
|
919 | 765d7908 | Isaku Yamahata | pci_vmsvga_init(pci_bus); |
920 | 765d7908 | Isaku Yamahata | else
|
921 | 765d7908 | Isaku Yamahata | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
922 | 765d7908 | Isaku Yamahata | } else if (std_vga_enabled) { |
923 | 765d7908 | Isaku Yamahata | if (pci_bus) {
|
924 | 765d7908 | Isaku Yamahata | pci_vga_init(pci_bus, 0, 0); |
925 | 765d7908 | Isaku Yamahata | } else {
|
926 | 765d7908 | Isaku Yamahata | isa_vga_init(); |
927 | 765d7908 | Isaku Yamahata | } |
928 | 765d7908 | Isaku Yamahata | } |
929 | 765d7908 | Isaku Yamahata | } |
930 | 765d7908 | Isaku Yamahata | |
931 | 845773ab | Isaku Yamahata | void pc_basic_device_init(qemu_irq *isa_irq,
|
932 | 845773ab | Isaku Yamahata | FDCtrl **floppy_controller, |
933 | 1d914fa0 | Isaku Yamahata | ISADevice **rtc_state) |
934 | ffe513da | Isaku Yamahata | { |
935 | ffe513da | Isaku Yamahata | int i;
|
936 | ffe513da | Isaku Yamahata | DriveInfo *fd[MAX_FD]; |
937 | ffe513da | Isaku Yamahata | PITState *pit; |
938 | ffe513da | Isaku Yamahata | |
939 | ffe513da | Isaku Yamahata | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
940 | ffe513da | Isaku Yamahata | |
941 | ffe513da | Isaku Yamahata | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
942 | ffe513da | Isaku Yamahata | |
943 | ffe513da | Isaku Yamahata | *rtc_state = rtc_init(2000);
|
944 | ffe513da | Isaku Yamahata | |
945 | ffe513da | Isaku Yamahata | qemu_register_boot_set(pc_boot_set, *rtc_state); |
946 | ffe513da | Isaku Yamahata | |
947 | ffe513da | Isaku Yamahata | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
948 | ffe513da | Isaku Yamahata | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
949 | ffe513da | Isaku Yamahata | |
950 | ffe513da | Isaku Yamahata | pit = pit_init(0x40, isa_reserve_irq(0)); |
951 | ffe513da | Isaku Yamahata | pcspk_init(pit); |
952 | ffe513da | Isaku Yamahata | if (!no_hpet) {
|
953 | ffe513da | Isaku Yamahata | hpet_init(isa_irq); |
954 | ffe513da | Isaku Yamahata | } |
955 | ffe513da | Isaku Yamahata | |
956 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
957 | ffe513da | Isaku Yamahata | if (serial_hds[i]) {
|
958 | ffe513da | Isaku Yamahata | serial_isa_init(i, serial_hds[i]); |
959 | ffe513da | Isaku Yamahata | } |
960 | ffe513da | Isaku Yamahata | } |
961 | ffe513da | Isaku Yamahata | |
962 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
963 | ffe513da | Isaku Yamahata | if (parallel_hds[i]) {
|
964 | ffe513da | Isaku Yamahata | parallel_init(i, parallel_hds[i]); |
965 | ffe513da | Isaku Yamahata | } |
966 | ffe513da | Isaku Yamahata | } |
967 | ffe513da | Isaku Yamahata | |
968 | ffe513da | Isaku Yamahata | isa_create_simple("i8042");
|
969 | ffe513da | Isaku Yamahata | DMA_init(0);
|
970 | ffe513da | Isaku Yamahata | |
971 | ffe513da | Isaku Yamahata | for(i = 0; i < MAX_FD; i++) { |
972 | ffe513da | Isaku Yamahata | fd[i] = drive_get(IF_FLOPPY, 0, i);
|
973 | ffe513da | Isaku Yamahata | } |
974 | ffe513da | Isaku Yamahata | *floppy_controller = fdctrl_init_isa(fd); |
975 | ffe513da | Isaku Yamahata | } |
976 | ffe513da | Isaku Yamahata | |
977 | 845773ab | Isaku Yamahata | void pc_pci_device_init(PCIBus *pci_bus)
|
978 | e3a5cf42 | Isaku Yamahata | { |
979 | e3a5cf42 | Isaku Yamahata | int max_bus;
|
980 | e3a5cf42 | Isaku Yamahata | int bus;
|
981 | e3a5cf42 | Isaku Yamahata | |
982 | e3a5cf42 | Isaku Yamahata | max_bus = drive_get_max_bus(IF_SCSI); |
983 | e3a5cf42 | Isaku Yamahata | for (bus = 0; bus <= max_bus; bus++) { |
984 | e3a5cf42 | Isaku Yamahata | pci_create_simple(pci_bus, -1, "lsi53c895a"); |
985 | e3a5cf42 | Isaku Yamahata | } |
986 | e3a5cf42 | Isaku Yamahata | } |