root / hw / piix_pci.c @ 1de7afc9
History | View | Annotate | Download (17.9 kB)
1 | 502a5395 | pbrook | /*
|
---|---|---|---|
2 | 502a5395 | pbrook | * QEMU i440FX/PIIX3 PCI Bridge Emulation
|
3 | 502a5395 | pbrook | *
|
4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
|
8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
|
9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
|
11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
|
12 | 502a5395 | pbrook | *
|
13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
|
14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
|
15 | 502a5395 | pbrook | *
|
16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 502a5395 | pbrook | * THE SOFTWARE.
|
23 | 502a5395 | pbrook | */
|
24 | 502a5395 | pbrook | |
25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | a2cb15b0 | Michael S. Tsirkin | #include "pci/pci.h" |
28 | a2cb15b0 | Michael S. Tsirkin | #include "pci/pci_host.h" |
29 | f75247f1 | Gerd Hoffmann | #include "isa.h" |
30 | 8a14daa5 | Gerd Hoffmann | #include "sysbus.h" |
31 | 1de7afc9 | Paolo Bonzini | #include "qemu/range.h" |
32 | 41445300 | Anthony PERARD | #include "xen.h" |
33 | 410edd92 | Isaku Yamahata | #include "pam.h" |
34 | 87ecb68b | pbrook | |
35 | 56594fe3 | Isaku Yamahata | /*
|
36 | 56594fe3 | Isaku Yamahata | * I440FX chipset data sheet.
|
37 | 56594fe3 | Isaku Yamahata | * http://download.intel.com/design/chipsets/datashts/29054901.pdf
|
38 | 56594fe3 | Isaku Yamahata | */
|
39 | 56594fe3 | Isaku Yamahata | |
40 | 67c332fd | Andreas Färber | typedef struct I440FXState { |
41 | 67c332fd | Andreas Färber | PCIHostState parent_obj; |
42 | 67c332fd | Andreas Färber | } I440FXState; |
43 | 502a5395 | pbrook | |
44 | ab431c28 | Isaku Yamahata | #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ |
45 | e735b55a | Isaku Yamahata | #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ |
46 | bf09551a | Stefano Stabellini | #define XEN_PIIX_NUM_PIRQS 128ULL |
47 | ab431c28 | Isaku Yamahata | #define PIIX_PIRQC 0x60 |
48 | e735b55a | Isaku Yamahata | |
49 | fd37d881 | Juan Quintela | typedef struct PIIX3State { |
50 | fd37d881 | Juan Quintela | PCIDevice dev; |
51 | ab431c28 | Isaku Yamahata | |
52 | ab431c28 | Isaku Yamahata | /*
|
53 | ab431c28 | Isaku Yamahata | * bitmap to track pic levels.
|
54 | ab431c28 | Isaku Yamahata | * The pic level is the logical OR of all the PCI irqs mapped to it
|
55 | ab431c28 | Isaku Yamahata | * So one PIC level is tracked by PIIX_NUM_PIRQS bits.
|
56 | ab431c28 | Isaku Yamahata | *
|
57 | ab431c28 | Isaku Yamahata | * PIRQ is mapped to PIC pins, we track it by
|
58 | ab431c28 | Isaku Yamahata | * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS = 64 bits with
|
59 | ab431c28 | Isaku Yamahata | * pic_irq * PIIX_NUM_PIRQS + pirq
|
60 | ab431c28 | Isaku Yamahata | */
|
61 | ab431c28 | Isaku Yamahata | #if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 |
62 | ab431c28 | Isaku Yamahata | #error "unable to encode pic state in 64bit in pic_levels." |
63 | ab431c28 | Isaku Yamahata | #endif
|
64 | ab431c28 | Isaku Yamahata | uint64_t pic_levels; |
65 | ab431c28 | Isaku Yamahata | |
66 | bd7dce87 | Juan Quintela | qemu_irq *pic; |
67 | e735b55a | Isaku Yamahata | |
68 | e735b55a | Isaku Yamahata | /* This member isn't used. Just for save/load compatibility */
|
69 | e735b55a | Isaku Yamahata | int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; |
70 | 7cd9eee0 | Gerd Hoffmann | } PIIX3State; |
71 | bd7dce87 | Juan Quintela | |
72 | 0a3bacf3 | Juan Quintela | struct PCII440FXState {
|
73 | 0a3bacf3 | Juan Quintela | PCIDevice dev; |
74 | ae0a5466 | Avi Kivity | MemoryRegion *system_memory; |
75 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space; |
76 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory; |
77 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole; |
78 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole_64bit; |
79 | ae0a5466 | Avi Kivity | PAMMemoryRegion pam_regions[13];
|
80 | ae0a5466 | Avi Kivity | MemoryRegion smram_region; |
81 | 6c009fa4 | Juan Quintela | uint8_t smm_enabled; |
82 | 0a3bacf3 | Juan Quintela | }; |
83 | 0a3bacf3 | Juan Quintela | |
84 | f2c688bb | Isaku Yamahata | |
85 | f2c688bb | Isaku Yamahata | #define I440FX_PAM 0x59 |
86 | f2c688bb | Isaku Yamahata | #define I440FX_PAM_SIZE 7 |
87 | f2c688bb | Isaku Yamahata | #define I440FX_SMRAM 0x72 |
88 | f2c688bb | Isaku Yamahata | |
89 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level); |
90 | 3afa9bb4 | Michael S. Tsirkin | static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pci_intx); |
91 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
92 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len);
|
93 | d2b59317 | pbrook | |
94 | d2b59317 | pbrook | /* return the global irq number corresponding to a given device irq
|
95 | d2b59317 | pbrook | pin. We could also use the bus number to have a more precise
|
96 | d2b59317 | pbrook | mapping. */
|
97 | ab431c28 | Isaku Yamahata | static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) |
98 | d2b59317 | pbrook | { |
99 | d2b59317 | pbrook | int slot_addend;
|
100 | d2b59317 | pbrook | slot_addend = (pci_dev->devfn >> 3) - 1; |
101 | ab431c28 | Isaku Yamahata | return (pci_intx + slot_addend) & 3; |
102 | d2b59317 | pbrook | } |
103 | 502a5395 | pbrook | |
104 | 0a3bacf3 | Juan Quintela | static void i440fx_update_memory_mappings(PCII440FXState *d) |
105 | ee0ea1d0 | bellard | { |
106 | 410edd92 | Isaku Yamahata | int i;
|
107 | 84631fd7 | bellard | |
108 | 72124c01 | Avi Kivity | memory_region_transaction_begin(); |
109 | 410edd92 | Isaku Yamahata | for (i = 0; i < 13; i++) { |
110 | 410edd92 | Isaku Yamahata | pam_update(&d->pam_regions[i], i, |
111 | 410edd92 | Isaku Yamahata | d->dev.config[I440FX_PAM + ((i + 1) / 2)]); |
112 | ee0ea1d0 | bellard | } |
113 | 410edd92 | Isaku Yamahata | smram_update(&d->smram_region, d->dev.config[I440FX_SMRAM], d->smm_enabled); |
114 | 72124c01 | Avi Kivity | memory_region_transaction_commit(); |
115 | ee0ea1d0 | bellard | } |
116 | ee0ea1d0 | bellard | |
117 | f885f1ea | Isaku Yamahata | static void i440fx_set_smm(int val, void *arg) |
118 | ee0ea1d0 | bellard | { |
119 | f885f1ea | Isaku Yamahata | PCII440FXState *d = arg; |
120 | f885f1ea | Isaku Yamahata | |
121 | 410edd92 | Isaku Yamahata | memory_region_transaction_begin(); |
122 | 410edd92 | Isaku Yamahata | smram_set_smm(&d->smm_enabled, val, d->dev.config[I440FX_SMRAM], |
123 | 410edd92 | Isaku Yamahata | &d->smram_region); |
124 | 410edd92 | Isaku Yamahata | memory_region_transaction_commit(); |
125 | ee0ea1d0 | bellard | } |
126 | ee0ea1d0 | bellard | |
127 | ee0ea1d0 | bellard | |
128 | 0a3bacf3 | Juan Quintela | static void i440fx_write_config(PCIDevice *dev, |
129 | ee0ea1d0 | bellard | uint32_t address, uint32_t val, int len)
|
130 | ee0ea1d0 | bellard | { |
131 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
132 | 0a3bacf3 | Juan Quintela | |
133 | ee0ea1d0 | bellard | /* XXX: implement SMRAM.D_LOCK */
|
134 | 0a3bacf3 | Juan Quintela | pci_default_write_config(dev, address, val, len); |
135 | 4da5fcd3 | Isaku Yamahata | if (ranges_overlap(address, len, I440FX_PAM, I440FX_PAM_SIZE) ||
|
136 | 4da5fcd3 | Isaku Yamahata | range_covers_byte(address, len, I440FX_SMRAM)) { |
137 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
138 | 4da5fcd3 | Isaku Yamahata | } |
139 | ee0ea1d0 | bellard | } |
140 | ee0ea1d0 | bellard | |
141 | 0c7d19e5 | Juan Quintela | static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id) |
142 | ee0ea1d0 | bellard | { |
143 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = opaque; |
144 | 52fc1d83 | balrog | int ret, i;
|
145 | ee0ea1d0 | bellard | |
146 | 0a3bacf3 | Juan Quintela | ret = pci_device_load(&d->dev, f); |
147 | ee0ea1d0 | bellard | if (ret < 0) |
148 | ee0ea1d0 | bellard | return ret;
|
149 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
150 | 6c009fa4 | Juan Quintela | qemu_get_8s(f, &d->smm_enabled); |
151 | 52fc1d83 | balrog | |
152 | e735b55a | Isaku Yamahata | if (version_id == 2) { |
153 | e735b55a | Isaku Yamahata | for (i = 0; i < PIIX_NUM_PIRQS; i++) { |
154 | e735b55a | Isaku Yamahata | qemu_get_be32(f); /* dummy load for compatibility */
|
155 | e735b55a | Isaku Yamahata | } |
156 | e735b55a | Isaku Yamahata | } |
157 | 52fc1d83 | balrog | |
158 | ee0ea1d0 | bellard | return 0; |
159 | ee0ea1d0 | bellard | } |
160 | ee0ea1d0 | bellard | |
161 | e59fb374 | Juan Quintela | static int i440fx_post_load(void *opaque, int version_id) |
162 | 0c7d19e5 | Juan Quintela | { |
163 | 0c7d19e5 | Juan Quintela | PCII440FXState *d = opaque; |
164 | 0c7d19e5 | Juan Quintela | |
165 | 0c7d19e5 | Juan Quintela | i440fx_update_memory_mappings(d); |
166 | 0c7d19e5 | Juan Quintela | return 0; |
167 | 0c7d19e5 | Juan Quintela | } |
168 | 0c7d19e5 | Juan Quintela | |
169 | 0c7d19e5 | Juan Quintela | static const VMStateDescription vmstate_i440fx = { |
170 | 0c7d19e5 | Juan Quintela | .name = "I440FX",
|
171 | 0c7d19e5 | Juan Quintela | .version_id = 3,
|
172 | 0c7d19e5 | Juan Quintela | .minimum_version_id = 3,
|
173 | 0c7d19e5 | Juan Quintela | .minimum_version_id_old = 1,
|
174 | 0c7d19e5 | Juan Quintela | .load_state_old = i440fx_load_old, |
175 | 752ff2fa | Juan Quintela | .post_load = i440fx_post_load, |
176 | 0c7d19e5 | Juan Quintela | .fields = (VMStateField []) { |
177 | 0c7d19e5 | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PCII440FXState), |
178 | 0c7d19e5 | Juan Quintela | VMSTATE_UINT8(smm_enabled, PCII440FXState), |
179 | 0c7d19e5 | Juan Quintela | VMSTATE_END_OF_LIST() |
180 | 0c7d19e5 | Juan Quintela | } |
181 | 0c7d19e5 | Juan Quintela | }; |
182 | 0c7d19e5 | Juan Quintela | |
183 | 81a322d4 | Gerd Hoffmann | static int i440fx_pcihost_initfn(SysBusDevice *dev) |
184 | 502a5395 | pbrook | { |
185 | 8558d942 | Andreas Färber | PCIHostState *s = PCI_HOST_BRIDGE(dev); |
186 | 502a5395 | pbrook | |
187 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s, |
188 | d0ed8076 | Avi Kivity | "pci-conf-idx", 4); |
189 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcf8, &s->conf_mem);
|
190 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcf8, 4); |
191 | d0ed8076 | Avi Kivity | |
192 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s, |
193 | d0ed8076 | Avi Kivity | "pci-conf-data", 4); |
194 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcfc, &s->data_mem);
|
195 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcfc, 4); |
196 | 502a5395 | pbrook | |
197 | 81a322d4 | Gerd Hoffmann | return 0; |
198 | 8a14daa5 | Gerd Hoffmann | } |
199 | 502a5395 | pbrook | |
200 | 0a3bacf3 | Juan Quintela | static int i440fx_initfn(PCIDevice *dev) |
201 | 8a14daa5 | Gerd Hoffmann | { |
202 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
203 | ee0ea1d0 | bellard | |
204 | f2c688bb | Isaku Yamahata | d->dev.config[I440FX_SMRAM] = 0x02;
|
205 | ee0ea1d0 | bellard | |
206 | f885f1ea | Isaku Yamahata | cpu_smm_register(&i440fx_set_smm, d); |
207 | 81a322d4 | Gerd Hoffmann | return 0; |
208 | 8a14daa5 | Gerd Hoffmann | } |
209 | 8a14daa5 | Gerd Hoffmann | |
210 | 41445300 | Anthony PERARD | static PCIBus *i440fx_common_init(const char *device_name, |
211 | 41445300 | Anthony PERARD | PCII440FXState **pi440fx_state, |
212 | 41445300 | Anthony PERARD | int *piix3_devfn,
|
213 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
214 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
215 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
216 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
217 | a8170e5e | Avi Kivity | hwaddr pci_hole_start, |
218 | a8170e5e | Avi Kivity | hwaddr pci_hole_size, |
219 | a8170e5e | Avi Kivity | hwaddr pci_hole64_start, |
220 | a8170e5e | Avi Kivity | hwaddr pci_hole64_size, |
221 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space, |
222 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory) |
223 | 8a14daa5 | Gerd Hoffmann | { |
224 | 8a14daa5 | Gerd Hoffmann | DeviceState *dev; |
225 | 8a14daa5 | Gerd Hoffmann | PCIBus *b; |
226 | 8a14daa5 | Gerd Hoffmann | PCIDevice *d; |
227 | 8558d942 | Andreas Färber | PCIHostState *s; |
228 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3; |
229 | ae0a5466 | Avi Kivity | PCII440FXState *f; |
230 | 2725aec7 | Avi Kivity | unsigned i;
|
231 | 8a14daa5 | Gerd Hoffmann | |
232 | 8a14daa5 | Gerd Hoffmann | dev = qdev_create(NULL, "i440FX-pcihost"); |
233 | 8558d942 | Andreas Färber | s = PCI_HOST_BRIDGE(dev); |
234 | aee97b84 | Avi Kivity | s->address_space = address_space_mem; |
235 | 67c332fd | Andreas Färber | b = pci_bus_new(dev, NULL, pci_address_space,
|
236 | aee97b84 | Avi Kivity | address_space_io, 0);
|
237 | 8a14daa5 | Gerd Hoffmann | s->bus = b; |
238 | f05f6b4a | Paolo Bonzini | object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL); |
239 | f424d5c4 | Paolo Bonzini | qdev_init_nofail(dev); |
240 | 8a14daa5 | Gerd Hoffmann | |
241 | 41445300 | Anthony PERARD | d = pci_create_simple(b, 0, device_name);
|
242 | 0a3bacf3 | Juan Quintela | *pi440fx_state = DO_UPCAST(PCII440FXState, dev, d); |
243 | ae0a5466 | Avi Kivity | f = *pi440fx_state; |
244 | ae0a5466 | Avi Kivity | f->system_memory = address_space_mem; |
245 | ae0a5466 | Avi Kivity | f->pci_address_space = pci_address_space; |
246 | ae0a5466 | Avi Kivity | f->ram_memory = ram_memory; |
247 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
|
248 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size); |
249 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole); |
250 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole_64bit, "pci-hole64",
|
251 | ae0a5466 | Avi Kivity | f->pci_address_space, |
252 | ae0a5466 | Avi Kivity | pci_hole64_start, pci_hole64_size); |
253 | ae0a5466 | Avi Kivity | if (pci_hole64_size) {
|
254 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole64_start, |
255 | ae0a5466 | Avi Kivity | &f->pci_hole_64bit); |
256 | ae0a5466 | Avi Kivity | } |
257 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->smram_region, "smram-region",
|
258 | ae0a5466 | Avi Kivity | f->pci_address_space, 0xa0000, 0x20000); |
259 | b41e1ed4 | Avi Kivity | memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
|
260 | b41e1ed4 | Avi Kivity | &f->smram_region, 1);
|
261 | b41e1ed4 | Avi Kivity | memory_region_set_enabled(&f->smram_region, false);
|
262 | 410edd92 | Isaku Yamahata | init_pam(f->ram_memory, f->system_memory, f->pci_address_space, |
263 | 410edd92 | Isaku Yamahata | &f->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
|
264 | 2725aec7 | Avi Kivity | for (i = 0; i < 12; ++i) { |
265 | 410edd92 | Isaku Yamahata | init_pam(f->ram_memory, f->system_memory, f->pci_address_space, |
266 | 410edd92 | Isaku Yamahata | &f->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,
|
267 | 410edd92 | Isaku Yamahata | PAM_EXPAN_SIZE); |
268 | 2725aec7 | Avi Kivity | } |
269 | 8a14daa5 | Gerd Hoffmann | |
270 | bf09551a | Stefano Stabellini | /* Xen supports additional interrupt routes from the PCI devices to
|
271 | bf09551a | Stefano Stabellini | * the IOAPIC: the four pins of each PCI device on the bus are also
|
272 | bf09551a | Stefano Stabellini | * connected to the IOAPIC directly.
|
273 | bf09551a | Stefano Stabellini | * These additional routes can be discovered through ACPI. */
|
274 | bf09551a | Stefano Stabellini | if (xen_enabled()) {
|
275 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
276 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3-xen")); |
277 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq, |
278 | bf09551a | Stefano Stabellini | piix3, XEN_PIIX_NUM_PIRQS); |
279 | bf09551a | Stefano Stabellini | } else {
|
280 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
281 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3")); |
282 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, |
283 | bf09551a | Stefano Stabellini | PIIX_NUM_PIRQS); |
284 | 3afa9bb4 | Michael S. Tsirkin | pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq); |
285 | bf09551a | Stefano Stabellini | } |
286 | 7cd9eee0 | Gerd Hoffmann | piix3->pic = pic; |
287 | 60573079 | Hervé Poussineau | *isa_bus = DO_UPCAST(ISABus, qbus, |
288 | 60573079 | Hervé Poussineau | qdev_get_child_bus(&piix3->dev.qdev, "isa.0"));
|
289 | 41445300 | Anthony PERARD | |
290 | 7cd9eee0 | Gerd Hoffmann | *piix3_devfn = piix3->dev.devfn; |
291 | 85a750ca | Juan Quintela | |
292 | ec5f92ce | Bernhard M. Wiedemann | ram_size = ram_size / 8 / 1024 / 1024; |
293 | ec5f92ce | Bernhard M. Wiedemann | if (ram_size > 255) |
294 | ec5f92ce | Bernhard M. Wiedemann | ram_size = 255;
|
295 | ec5f92ce | Bernhard M. Wiedemann | (*pi440fx_state)->dev.config[0x57]=ram_size;
|
296 | ec5f92ce | Bernhard M. Wiedemann | |
297 | ae0a5466 | Avi Kivity | i440fx_update_memory_mappings(f); |
298 | ae0a5466 | Avi Kivity | |
299 | 502a5395 | pbrook | return b;
|
300 | 502a5395 | pbrook | } |
301 | 502a5395 | pbrook | |
302 | 41445300 | Anthony PERARD | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
|
303 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
304 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
305 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
306 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
307 | a8170e5e | Avi Kivity | hwaddr pci_hole_start, |
308 | a8170e5e | Avi Kivity | hwaddr pci_hole_size, |
309 | a8170e5e | Avi Kivity | hwaddr pci_hole64_start, |
310 | a8170e5e | Avi Kivity | hwaddr pci_hole64_size, |
311 | ae0a5466 | Avi Kivity | MemoryRegion *pci_memory, MemoryRegion *ram_memory) |
312 | ae0a5466 | Avi Kivity | |
313 | 41445300 | Anthony PERARD | { |
314 | 41445300 | Anthony PERARD | PCIBus *b; |
315 | 41445300 | Anthony PERARD | |
316 | 60573079 | Hervé Poussineau | b = i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, isa_bus, pic,
|
317 | ae0a5466 | Avi Kivity | address_space_mem, address_space_io, ram_size, |
318 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size, |
319 | d50c6c8b | Alexey Korolev | pci_hole64_start, pci_hole64_size, |
320 | ae0a5466 | Avi Kivity | pci_memory, ram_memory); |
321 | 41445300 | Anthony PERARD | return b;
|
322 | 41445300 | Anthony PERARD | } |
323 | 41445300 | Anthony PERARD | |
324 | 502a5395 | pbrook | /* PIIX3 PCI to ISA bridge */
|
325 | ab431c28 | Isaku Yamahata | static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) |
326 | ab431c28 | Isaku Yamahata | { |
327 | ab431c28 | Isaku Yamahata | qemu_set_irq(piix3->pic[pic_irq], |
328 | ab431c28 | Isaku Yamahata | !!(piix3->pic_levels & |
329 | 09de0f46 | TeLeMan | (((1ULL << PIIX_NUM_PIRQS) - 1) << |
330 | ab431c28 | Isaku Yamahata | (pic_irq * PIIX_NUM_PIRQS)))); |
331 | ab431c28 | Isaku Yamahata | } |
332 | 502a5395 | pbrook | |
333 | afe3ef1d | Isaku Yamahata | static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) |
334 | ab431c28 | Isaku Yamahata | { |
335 | ab431c28 | Isaku Yamahata | int pic_irq;
|
336 | ab431c28 | Isaku Yamahata | uint64_t mask; |
337 | ab431c28 | Isaku Yamahata | |
338 | ab431c28 | Isaku Yamahata | pic_irq = piix3->dev.config[PIIX_PIRQC + pirq]; |
339 | ab431c28 | Isaku Yamahata | if (pic_irq >= PIIX_NUM_PIC_IRQS) {
|
340 | ab431c28 | Isaku Yamahata | return;
|
341 | ab431c28 | Isaku Yamahata | } |
342 | ab431c28 | Isaku Yamahata | |
343 | ab431c28 | Isaku Yamahata | mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq);
|
344 | ab431c28 | Isaku Yamahata | piix3->pic_levels &= ~mask; |
345 | ab431c28 | Isaku Yamahata | piix3->pic_levels |= mask * !!level; |
346 | ab431c28 | Isaku Yamahata | |
347 | afe3ef1d | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
348 | ab431c28 | Isaku Yamahata | } |
349 | ab431c28 | Isaku Yamahata | |
350 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level) |
351 | 502a5395 | pbrook | { |
352 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3 = opaque; |
353 | afe3ef1d | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, level); |
354 | ab431c28 | Isaku Yamahata | } |
355 | 502a5395 | pbrook | |
356 | 3afa9bb4 | Michael S. Tsirkin | static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) |
357 | 3afa9bb4 | Michael S. Tsirkin | { |
358 | 3afa9bb4 | Michael S. Tsirkin | PIIX3State *piix3 = opaque; |
359 | 3afa9bb4 | Michael S. Tsirkin | int irq = piix3->dev.config[PIIX_PIRQC + pin];
|
360 | 3afa9bb4 | Michael S. Tsirkin | PCIINTxRoute route; |
361 | 3afa9bb4 | Michael S. Tsirkin | |
362 | 3afa9bb4 | Michael S. Tsirkin | if (irq < PIIX_NUM_PIC_IRQS) {
|
363 | 3afa9bb4 | Michael S. Tsirkin | route.mode = PCI_INTX_ENABLED; |
364 | 3afa9bb4 | Michael S. Tsirkin | route.irq = irq; |
365 | 3afa9bb4 | Michael S. Tsirkin | } else {
|
366 | 3afa9bb4 | Michael S. Tsirkin | route.mode = PCI_INTX_DISABLED; |
367 | 3afa9bb4 | Michael S. Tsirkin | route.irq = -1;
|
368 | 3afa9bb4 | Michael S. Tsirkin | } |
369 | 3afa9bb4 | Michael S. Tsirkin | return route;
|
370 | 3afa9bb4 | Michael S. Tsirkin | } |
371 | 3afa9bb4 | Michael S. Tsirkin | |
372 | ab431c28 | Isaku Yamahata | /* irq routing is changed. so rebuild bitmap */
|
373 | ab431c28 | Isaku Yamahata | static void piix3_update_irq_levels(PIIX3State *piix3) |
374 | ab431c28 | Isaku Yamahata | { |
375 | ab431c28 | Isaku Yamahata | int pirq;
|
376 | ab431c28 | Isaku Yamahata | |
377 | ab431c28 | Isaku Yamahata | piix3->pic_levels = 0;
|
378 | ab431c28 | Isaku Yamahata | for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { |
379 | ab431c28 | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, |
380 | afe3ef1d | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, pirq)); |
381 | ab431c28 | Isaku Yamahata | } |
382 | ab431c28 | Isaku Yamahata | } |
383 | ab431c28 | Isaku Yamahata | |
384 | ab431c28 | Isaku Yamahata | static void piix3_write_config(PCIDevice *dev, |
385 | ab431c28 | Isaku Yamahata | uint32_t address, uint32_t val, int len)
|
386 | ab431c28 | Isaku Yamahata | { |
387 | ab431c28 | Isaku Yamahata | pci_default_write_config(dev, address, val, len); |
388 | ab431c28 | Isaku Yamahata | if (ranges_overlap(address, len, PIIX_PIRQC, 4)) { |
389 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = DO_UPCAST(PIIX3State, dev, dev); |
390 | ab431c28 | Isaku Yamahata | int pic_irq;
|
391 | 0ae16251 | Jan Kiszka | |
392 | 0ae16251 | Jan Kiszka | pci_bus_fire_intx_routing_notifier(piix3->dev.bus); |
393 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
394 | ab431c28 | Isaku Yamahata | for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { |
395 | ab431c28 | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
396 | d2b59317 | pbrook | } |
397 | 502a5395 | pbrook | } |
398 | 502a5395 | pbrook | } |
399 | 502a5395 | pbrook | |
400 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
401 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len)
|
402 | bf09551a | Stefano Stabellini | { |
403 | bf09551a | Stefano Stabellini | xen_piix_pci_write_config_client(address, val, len); |
404 | bf09551a | Stefano Stabellini | piix3_write_config(dev, address, val, len); |
405 | bf09551a | Stefano Stabellini | } |
406 | bf09551a | Stefano Stabellini | |
407 | 15a1956a | Gleb Natapov | static void piix3_reset(void *opaque) |
408 | 502a5395 | pbrook | { |
409 | fd37d881 | Juan Quintela | PIIX3State *d = opaque; |
410 | fd37d881 | Juan Quintela | uint8_t *pci_conf = d->dev.config; |
411 | 502a5395 | pbrook | |
412 | 502a5395 | pbrook | pci_conf[0x04] = 0x07; // master, memory and I/O |
413 | 502a5395 | pbrook | pci_conf[0x05] = 0x00; |
414 | 502a5395 | pbrook | pci_conf[0x06] = 0x00; |
415 | 502a5395 | pbrook | pci_conf[0x07] = 0x02; // PCI_status_devsel_medium |
416 | 502a5395 | pbrook | pci_conf[0x4c] = 0x4d; |
417 | 502a5395 | pbrook | pci_conf[0x4e] = 0x03; |
418 | 502a5395 | pbrook | pci_conf[0x4f] = 0x00; |
419 | 502a5395 | pbrook | pci_conf[0x60] = 0x80; |
420 | 477afee3 | aurel32 | pci_conf[0x61] = 0x80; |
421 | 477afee3 | aurel32 | pci_conf[0x62] = 0x80; |
422 | 477afee3 | aurel32 | pci_conf[0x63] = 0x80; |
423 | 502a5395 | pbrook | pci_conf[0x69] = 0x02; |
424 | 502a5395 | pbrook | pci_conf[0x70] = 0x80; |
425 | 502a5395 | pbrook | pci_conf[0x76] = 0x0c; |
426 | 502a5395 | pbrook | pci_conf[0x77] = 0x0c; |
427 | 502a5395 | pbrook | pci_conf[0x78] = 0x02; |
428 | 502a5395 | pbrook | pci_conf[0x79] = 0x00; |
429 | 502a5395 | pbrook | pci_conf[0x80] = 0x00; |
430 | 502a5395 | pbrook | pci_conf[0x82] = 0x00; |
431 | 502a5395 | pbrook | pci_conf[0xa0] = 0x08; |
432 | 502a5395 | pbrook | pci_conf[0xa2] = 0x00; |
433 | 502a5395 | pbrook | pci_conf[0xa3] = 0x00; |
434 | 502a5395 | pbrook | pci_conf[0xa4] = 0x00; |
435 | 502a5395 | pbrook | pci_conf[0xa5] = 0x00; |
436 | 502a5395 | pbrook | pci_conf[0xa6] = 0x00; |
437 | 502a5395 | pbrook | pci_conf[0xa7] = 0x00; |
438 | 502a5395 | pbrook | pci_conf[0xa8] = 0x0f; |
439 | 502a5395 | pbrook | pci_conf[0xaa] = 0x00; |
440 | 502a5395 | pbrook | pci_conf[0xab] = 0x00; |
441 | 502a5395 | pbrook | pci_conf[0xac] = 0x00; |
442 | 502a5395 | pbrook | pci_conf[0xae] = 0x00; |
443 | ab431c28 | Isaku Yamahata | |
444 | ab431c28 | Isaku Yamahata | d->pic_levels = 0;
|
445 | ab431c28 | Isaku Yamahata | } |
446 | ab431c28 | Isaku Yamahata | |
447 | ab431c28 | Isaku Yamahata | static int piix3_post_load(void *opaque, int version_id) |
448 | ab431c28 | Isaku Yamahata | { |
449 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = opaque; |
450 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
451 | ab431c28 | Isaku Yamahata | return 0; |
452 | e735b55a | Isaku Yamahata | } |
453 | 15a1956a | Gleb Natapov | |
454 | e735b55a | Isaku Yamahata | static void piix3_pre_save(void *opaque) |
455 | e735b55a | Isaku Yamahata | { |
456 | e735b55a | Isaku Yamahata | int i;
|
457 | e735b55a | Isaku Yamahata | PIIX3State *piix3 = opaque; |
458 | e735b55a | Isaku Yamahata | |
459 | e735b55a | Isaku Yamahata | for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { |
460 | e735b55a | Isaku Yamahata | piix3->pci_irq_levels_vmstate[i] = |
461 | e735b55a | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, i); |
462 | e735b55a | Isaku Yamahata | } |
463 | 502a5395 | pbrook | } |
464 | 502a5395 | pbrook | |
465 | d1f171bd | Juan Quintela | static const VMStateDescription vmstate_piix3 = { |
466 | d1f171bd | Juan Quintela | .name = "PIIX3",
|
467 | d1f171bd | Juan Quintela | .version_id = 3,
|
468 | d1f171bd | Juan Quintela | .minimum_version_id = 2,
|
469 | d1f171bd | Juan Quintela | .minimum_version_id_old = 2,
|
470 | ab431c28 | Isaku Yamahata | .post_load = piix3_post_load, |
471 | e735b55a | Isaku Yamahata | .pre_save = piix3_pre_save, |
472 | d1f171bd | Juan Quintela | .fields = (VMStateField []) { |
473 | d1f171bd | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PIIX3State), |
474 | e735b55a | Isaku Yamahata | VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, |
475 | e735b55a | Isaku Yamahata | PIIX_NUM_PIRQS, 3),
|
476 | d1f171bd | Juan Quintela | VMSTATE_END_OF_LIST() |
477 | da64182c | Juan Quintela | } |
478 | d1f171bd | Juan Quintela | }; |
479 | 1941d19c | bellard | |
480 | fd37d881 | Juan Quintela | static int piix3_initfn(PCIDevice *dev) |
481 | 502a5395 | pbrook | { |
482 | fd37d881 | Juan Quintela | PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev); |
483 | 502a5395 | pbrook | |
484 | c2d0d012 | Richard Henderson | isa_bus_new(&d->dev.qdev, pci_address_space_io(dev)); |
485 | a08d4367 | Jan Kiszka | qemu_register_reset(piix3_reset, d); |
486 | 81a322d4 | Gerd Hoffmann | return 0; |
487 | 502a5395 | pbrook | } |
488 | 5c2b87e3 | ths | |
489 | 40021f08 | Anthony Liguori | static void piix3_class_init(ObjectClass *klass, void *data) |
490 | 40021f08 | Anthony Liguori | { |
491 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
492 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
493 | 40021f08 | Anthony Liguori | |
494 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
495 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
496 | 39bffca2 | Anthony Liguori | dc->no_user = 1,
|
497 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
498 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
499 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config; |
500 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
501 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
502 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
503 | 40021f08 | Anthony Liguori | } |
504 | 40021f08 | Anthony Liguori | |
505 | 4240abff | Andreas Färber | static const TypeInfo piix3_info = { |
506 | 39bffca2 | Anthony Liguori | .name = "PIIX3",
|
507 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
508 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
509 | 39bffca2 | Anthony Liguori | .class_init = piix3_class_init, |
510 | e855761c | Anthony Liguori | }; |
511 | e855761c | Anthony Liguori | |
512 | 40021f08 | Anthony Liguori | static void piix3_xen_class_init(ObjectClass *klass, void *data) |
513 | 40021f08 | Anthony Liguori | { |
514 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
515 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
516 | 40021f08 | Anthony Liguori | |
517 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
518 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
519 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
520 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
521 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
522 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config_xen; |
523 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
524 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
525 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
526 | e855761c | Anthony Liguori | }; |
527 | e855761c | Anthony Liguori | |
528 | 4240abff | Andreas Färber | static const TypeInfo piix3_xen_info = { |
529 | 39bffca2 | Anthony Liguori | .name = "PIIX3-xen",
|
530 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
531 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
532 | 39bffca2 | Anthony Liguori | .class_init = piix3_xen_class_init, |
533 | 40021f08 | Anthony Liguori | }; |
534 | 40021f08 | Anthony Liguori | |
535 | 40021f08 | Anthony Liguori | static void i440fx_class_init(ObjectClass *klass, void *data) |
536 | 40021f08 | Anthony Liguori | { |
537 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
538 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
539 | 40021f08 | Anthony Liguori | |
540 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
541 | 40021f08 | Anthony Liguori | k->init = i440fx_initfn; |
542 | 40021f08 | Anthony Liguori | k->config_write = i440fx_write_config; |
543 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
544 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82441; |
545 | 40021f08 | Anthony Liguori | k->revision = 0x02;
|
546 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_HOST; |
547 | 39bffca2 | Anthony Liguori | dc->desc = "Host bridge";
|
548 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
549 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_i440fx; |
550 | 40021f08 | Anthony Liguori | } |
551 | 40021f08 | Anthony Liguori | |
552 | 4240abff | Andreas Färber | static const TypeInfo i440fx_info = { |
553 | 39bffca2 | Anthony Liguori | .name = "i440FX",
|
554 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
555 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PCII440FXState),
|
556 | 39bffca2 | Anthony Liguori | .class_init = i440fx_class_init, |
557 | 8a14daa5 | Gerd Hoffmann | }; |
558 | 8a14daa5 | Gerd Hoffmann | |
559 | 999e12bb | Anthony Liguori | static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) |
560 | 999e12bb | Anthony Liguori | { |
561 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
562 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
563 | 999e12bb | Anthony Liguori | |
564 | 999e12bb | Anthony Liguori | k->init = i440fx_pcihost_initfn; |
565 | 39bffca2 | Anthony Liguori | dc->fw_name = "pci";
|
566 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
567 | 999e12bb | Anthony Liguori | } |
568 | 999e12bb | Anthony Liguori | |
569 | 4240abff | Andreas Färber | static const TypeInfo i440fx_pcihost_info = { |
570 | 39bffca2 | Anthony Liguori | .name = "i440FX-pcihost",
|
571 | 8558d942 | Andreas Färber | .parent = TYPE_PCI_HOST_BRIDGE, |
572 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(I440FXState),
|
573 | 39bffca2 | Anthony Liguori | .class_init = i440fx_pcihost_class_init, |
574 | 8a14daa5 | Gerd Hoffmann | }; |
575 | 8a14daa5 | Gerd Hoffmann | |
576 | 83f7d43a | Andreas Färber | static void i440fx_register_types(void) |
577 | 8a14daa5 | Gerd Hoffmann | { |
578 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_info); |
579 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_info); |
580 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_xen_info); |
581 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_pcihost_info); |
582 | 8a14daa5 | Gerd Hoffmann | } |
583 | 83f7d43a | Andreas Färber | |
584 | 83f7d43a | Andreas Färber | type_init(i440fx_register_types) |