Revision 1e3debf0 hw/ppce500_mpc8544ds.c

b/hw/ppce500_mpc8544ds.c
123 123
                             hypercall, sizeof(hypercall));
124 124
    }
125 125

  
126
    for (i = 0; i < smp_cpus; i++) {
126
    /* We need to generate the cpu nodes in reverse order, so Linux can pick
127
       the first node as boot node and be happy */
128
    for (i = smp_cpus - 1; i >= 0; i--) {
127 129
        char cpu_name[128];
128
        uint64_t cpu_release_addr[] = {
129
            cpu_to_be64(MPC8544_SPIN_BASE + (i * 0x20))
130
        };
130
        uint64_t cpu_release_addr = cpu_to_be64(MPC8544_SPIN_BASE + (i * 0x20));
131

  
132
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
133
            if (env->cpu_index == i) {
134
                break;
135
            }
136
        }
137

  
138
        if (!env) {
139
            continue;
140
        }
131 141

  
132
        snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", i);
142
        snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", env->cpu_index);
143
        qemu_devtree_add_subnode(fdt, cpu_name);
133 144
        qemu_devtree_setprop_cell(fdt, cpu_name, "clock-frequency", clock_freq);
134 145
        qemu_devtree_setprop_cell(fdt, cpu_name, "timebase-frequency", tb_freq);
135
        qemu_devtree_setprop(fdt, cpu_name, "cpu-release-addr",
136
                             cpu_release_addr, sizeof(cpu_release_addr));
137
    }
138

  
139
    for (i = smp_cpus; i < 32; i++) {
140
        char cpu_name[128];
141
        snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", i);
142
        qemu_devtree_nop_node(fdt, cpu_name);
146
        qemu_devtree_setprop_string(fdt, cpu_name, "device_type", "cpu");
147
        qemu_devtree_setprop_cell(fdt, cpu_name, "reg", env->cpu_index);
148
        qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-line-size",
149
                                  env->dcache_line_size);
150
        qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-line-size",
151
                                  env->icache_line_size);
152
        qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
153
        qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
154
        qemu_devtree_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
155
        if (env->cpu_index) {
156
            qemu_devtree_setprop_string(fdt, cpu_name, "status", "disabled");
157
            qemu_devtree_setprop_string(fdt, cpu_name, "enable-method", "spin-table");
158
            qemu_devtree_setprop(fdt, cpu_name, "cpu-release-addr",
159
                                 &cpu_release_addr, sizeof(cpu_release_addr));
160
        } else {
161
            qemu_devtree_setprop_string(fdt, cpu_name, "status", "okay");
162
        }
143 163
    }
144 164

  
145 165
    ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);

Also available in: Unified diff