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1 | fc01f7e7 | bellard | /*
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2 | fc01f7e7 | bellard | * QEMU System Emulator header
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3 | fc01f7e7 | bellard | *
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4 | fc01f7e7 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | fc01f7e7 | bellard | *
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6 | fc01f7e7 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | fc01f7e7 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | fc01f7e7 | bellard | * in the Software without restriction, including without limitation the rights
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9 | fc01f7e7 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | fc01f7e7 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | fc01f7e7 | bellard | * furnished to do so, subject to the following conditions:
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12 | fc01f7e7 | bellard | *
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13 | fc01f7e7 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | fc01f7e7 | bellard | * all copies or substantial portions of the Software.
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15 | fc01f7e7 | bellard | *
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16 | fc01f7e7 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | fc01f7e7 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | fc01f7e7 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | fc01f7e7 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | fc01f7e7 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | fc01f7e7 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | fc01f7e7 | bellard | * THE SOFTWARE.
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23 | fc01f7e7 | bellard | */
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24 | fc01f7e7 | bellard | #ifndef VL_H
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25 | fc01f7e7 | bellard | #define VL_H
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26 | fc01f7e7 | bellard | |
27 | 67b915a5 | bellard | /* we put basic includes here to avoid repeating them in device drivers */
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28 | 67b915a5 | bellard | #include <stdlib.h> |
29 | 67b915a5 | bellard | #include <stdio.h> |
30 | 67b915a5 | bellard | #include <stdarg.h> |
31 | 67b915a5 | bellard | #include <string.h> |
32 | 67b915a5 | bellard | #include <inttypes.h> |
33 | 85571bc7 | bellard | #include <limits.h> |
34 | 8a7ddc38 | bellard | #include <time.h> |
35 | 67b915a5 | bellard | #include <ctype.h> |
36 | 67b915a5 | bellard | #include <errno.h> |
37 | 67b915a5 | bellard | #include <unistd.h> |
38 | 67b915a5 | bellard | #include <fcntl.h> |
39 | 7d3505c5 | bellard | #include <sys/stat.h> |
40 | fb065187 | bellard | #include "audio/audio.h" |
41 | 67b915a5 | bellard | |
42 | 67b915a5 | bellard | #ifndef O_LARGEFILE
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43 | 67b915a5 | bellard | #define O_LARGEFILE 0 |
44 | 67b915a5 | bellard | #endif
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45 | 40c3bac3 | bellard | #ifndef O_BINARY
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46 | 40c3bac3 | bellard | #define O_BINARY 0 |
47 | 40c3bac3 | bellard | #endif
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48 | 67b915a5 | bellard | |
49 | 67b915a5 | bellard | #ifdef _WIN32
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50 | 57d1a2b6 | bellard | #define lseek _lseeki64
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51 | 57d1a2b6 | bellard | #define ENOTSUP 4096 |
52 | 57d1a2b6 | bellard | /* XXX: find 64 bit version */
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53 | 57d1a2b6 | bellard | #define ftruncate chsize
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54 | 57d1a2b6 | bellard | |
55 | 57d1a2b6 | bellard | static inline char *realpath(const char *path, char *resolved_path) |
56 | 57d1a2b6 | bellard | { |
57 | 57d1a2b6 | bellard | _fullpath(resolved_path, path, _MAX_PATH); |
58 | 57d1a2b6 | bellard | return resolved_path;
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59 | 57d1a2b6 | bellard | } |
60 | 67b915a5 | bellard | #endif
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61 | 8a7ddc38 | bellard | |
62 | ea2384d3 | bellard | #ifdef QEMU_TOOL
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63 | ea2384d3 | bellard | |
64 | ea2384d3 | bellard | /* we use QEMU_TOOL in the command line tools which do not depend on
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65 | ea2384d3 | bellard | the target CPU type */
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66 | ea2384d3 | bellard | #include "config-host.h" |
67 | ea2384d3 | bellard | #include <setjmp.h> |
68 | ea2384d3 | bellard | #include "osdep.h" |
69 | ea2384d3 | bellard | #include "bswap.h" |
70 | ea2384d3 | bellard | |
71 | ea2384d3 | bellard | #else
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72 | ea2384d3 | bellard | |
73 | 16f62432 | bellard | #include "cpu.h" |
74 | 1fddef4b | bellard | #include "gdbstub.h" |
75 | 16f62432 | bellard | |
76 | ea2384d3 | bellard | #endif /* !defined(QEMU_TOOL) */ |
77 | ea2384d3 | bellard | |
78 | 67b915a5 | bellard | #ifndef glue
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79 | 67b915a5 | bellard | #define xglue(x, y) x ## y |
80 | 67b915a5 | bellard | #define glue(x, y) xglue(x, y)
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81 | 67b915a5 | bellard | #define stringify(s) tostring(s)
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82 | 67b915a5 | bellard | #define tostring(s) #s |
83 | 67b915a5 | bellard | #endif
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84 | 67b915a5 | bellard | |
85 | 33e3963e | bellard | /* vl.c */
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86 | 80cabfad | bellard | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
87 | 313aa567 | bellard | |
88 | 80cabfad | bellard | void hw_error(const char *fmt, ...); |
89 | 80cabfad | bellard | |
90 | 7587cf44 | bellard | int get_image_size(const char *filename); |
91 | 80cabfad | bellard | int load_image(const char *filename, uint8_t *addr); |
92 | 80cabfad | bellard | extern const char *bios_dir; |
93 | 80cabfad | bellard | |
94 | 80cabfad | bellard | void pstrcpy(char *buf, int buf_size, const char *str); |
95 | 80cabfad | bellard | char *pstrcat(char *buf, int buf_size, const char *s); |
96 | 82c643ff | bellard | int strstart(const char *str, const char *val, const char **ptr); |
97 | c4b1fcc0 | bellard | |
98 | 8a7ddc38 | bellard | extern int vm_running; |
99 | 8a7ddc38 | bellard | |
100 | 8a7ddc38 | bellard | typedef void VMStopHandler(void *opaque, int reason); |
101 | 8a7ddc38 | bellard | |
102 | 8a7ddc38 | bellard | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
103 | 8a7ddc38 | bellard | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
104 | 8a7ddc38 | bellard | |
105 | 8a7ddc38 | bellard | void vm_start(void); |
106 | 8a7ddc38 | bellard | void vm_stop(int reason); |
107 | 8a7ddc38 | bellard | |
108 | bb0c6722 | bellard | typedef void QEMUResetHandler(void *opaque); |
109 | bb0c6722 | bellard | |
110 | bb0c6722 | bellard | void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
111 | bb0c6722 | bellard | void qemu_system_reset_request(void); |
112 | bb0c6722 | bellard | void qemu_system_shutdown_request(void); |
113 | 3475187d | bellard | void qemu_system_powerdown_request(void); |
114 | 3475187d | bellard | #if !defined(TARGET_SPARC)
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115 | 3475187d | bellard | // Please implement a power failure function to signal the OS
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116 | 3475187d | bellard | #define qemu_system_powerdown() do{}while(0) |
117 | 3475187d | bellard | #else
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118 | 3475187d | bellard | void qemu_system_powerdown(void); |
119 | 3475187d | bellard | #endif
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120 | bb0c6722 | bellard | |
121 | ea2384d3 | bellard | void main_loop_wait(int timeout); |
122 | ea2384d3 | bellard | |
123 | aaaa7df6 | bellard | extern int audio_enabled; |
124 | fb065187 | bellard | extern int sb16_enabled; |
125 | fb065187 | bellard | extern int adlib_enabled; |
126 | fb065187 | bellard | extern int gus_enabled; |
127 | 0ced6589 | bellard | extern int ram_size; |
128 | 0ced6589 | bellard | extern int bios_size; |
129 | ee22c2f7 | bellard | extern int rtc_utc; |
130 | 1f04275e | bellard | extern int cirrus_vga_enabled; |
131 | 28b9b5af | bellard | extern int graphic_width; |
132 | 28b9b5af | bellard | extern int graphic_height; |
133 | 28b9b5af | bellard | extern int graphic_depth; |
134 | 3d11d0eb | bellard | extern const char *keyboard_layout; |
135 | d993e026 | bellard | extern int kqemu_allowed; |
136 | a09db21f | bellard | extern int win2k_install_hack; |
137 | 0ced6589 | bellard | |
138 | 0ced6589 | bellard | /* XXX: make it dynamic */
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139 | 0ced6589 | bellard | #if defined (TARGET_PPC)
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140 | d5295253 | bellard | #define BIOS_SIZE ((512 + 32) * 1024) |
141 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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142 | 6af0bf9c | bellard | #define BIOS_SIZE (128 * 1024) |
143 | 0ced6589 | bellard | #else
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144 | 7587cf44 | bellard | #define BIOS_SIZE ((256 + 64) * 1024) |
145 | 0ced6589 | bellard | #endif
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146 | aaaa7df6 | bellard | |
147 | 63066f4f | bellard | /* keyboard/mouse support */
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148 | 63066f4f | bellard | |
149 | 63066f4f | bellard | #define MOUSE_EVENT_LBUTTON 0x01 |
150 | 63066f4f | bellard | #define MOUSE_EVENT_RBUTTON 0x02 |
151 | 63066f4f | bellard | #define MOUSE_EVENT_MBUTTON 0x04 |
152 | 63066f4f | bellard | |
153 | 63066f4f | bellard | typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
154 | 63066f4f | bellard | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
155 | 63066f4f | bellard | |
156 | 63066f4f | bellard | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
157 | 63066f4f | bellard | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); |
158 | 63066f4f | bellard | |
159 | 63066f4f | bellard | void kbd_put_keycode(int keycode); |
160 | 63066f4f | bellard | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
161 | 63066f4f | bellard | |
162 | 82c643ff | bellard | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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163 | 82c643ff | bellard | constants) */
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164 | 82c643ff | bellard | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
165 | 82c643ff | bellard | #define QEMU_KEY_BACKSPACE 0x007f |
166 | 82c643ff | bellard | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
167 | 82c643ff | bellard | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
168 | 82c643ff | bellard | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
169 | 82c643ff | bellard | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
170 | 82c643ff | bellard | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
171 | 82c643ff | bellard | #define QEMU_KEY_END QEMU_KEY_ESC1(4) |
172 | 82c643ff | bellard | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
173 | 82c643ff | bellard | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
174 | 82c643ff | bellard | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
175 | 82c643ff | bellard | |
176 | 82c643ff | bellard | #define QEMU_KEY_CTRL_UP 0xe400 |
177 | 82c643ff | bellard | #define QEMU_KEY_CTRL_DOWN 0xe401 |
178 | 82c643ff | bellard | #define QEMU_KEY_CTRL_LEFT 0xe402 |
179 | 82c643ff | bellard | #define QEMU_KEY_CTRL_RIGHT 0xe403 |
180 | 82c643ff | bellard | #define QEMU_KEY_CTRL_HOME 0xe404 |
181 | 82c643ff | bellard | #define QEMU_KEY_CTRL_END 0xe405 |
182 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEUP 0xe406 |
183 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
184 | 82c643ff | bellard | |
185 | 82c643ff | bellard | void kbd_put_keysym(int keysym); |
186 | 82c643ff | bellard | |
187 | c20709aa | bellard | /* async I/O support */
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188 | c20709aa | bellard | |
189 | c20709aa | bellard | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
190 | c20709aa | bellard | typedef int IOCanRWHandler(void *opaque); |
191 | c20709aa | bellard | |
192 | c20709aa | bellard | int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, |
193 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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194 | c20709aa | bellard | void qemu_del_fd_read_handler(int fd); |
195 | c20709aa | bellard | |
196 | 82c643ff | bellard | /* character device */
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197 | 82c643ff | bellard | |
198 | 82c643ff | bellard | #define CHR_EVENT_BREAK 0 /* serial break char */ |
199 | ea2384d3 | bellard | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
200 | 82c643ff | bellard | |
201 | 82c643ff | bellard | typedef void IOEventHandler(void *opaque, int event); |
202 | 82c643ff | bellard | |
203 | 82c643ff | bellard | typedef struct CharDriverState { |
204 | 82c643ff | bellard | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
205 | 82c643ff | bellard | void (*chr_add_read_handler)(struct CharDriverState *s, |
206 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
207 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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208 | 82c643ff | bellard | IOEventHandler *chr_event; |
209 | eb45f5fe | bellard | void (*chr_send_event)(struct CharDriverState *chr, int event); |
210 | 82c643ff | bellard | void *opaque;
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211 | 82c643ff | bellard | } CharDriverState; |
212 | 82c643ff | bellard | |
213 | 82c643ff | bellard | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
214 | 82c643ff | bellard | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
215 | ea2384d3 | bellard | void qemu_chr_send_event(CharDriverState *s, int event); |
216 | 82c643ff | bellard | void qemu_chr_add_read_handler(CharDriverState *s,
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217 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
218 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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219 | 82c643ff | bellard | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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220 | 82c643ff | bellard | |
221 | 82c643ff | bellard | /* consoles */
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222 | 82c643ff | bellard | |
223 | 82c643ff | bellard | typedef struct DisplayState DisplayState; |
224 | 82c643ff | bellard | typedef struct TextConsole TextConsole; |
225 | 82c643ff | bellard | |
226 | 82c643ff | bellard | extern TextConsole *vga_console;
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227 | 82c643ff | bellard | |
228 | 82c643ff | bellard | TextConsole *graphic_console_init(DisplayState *ds); |
229 | 82c643ff | bellard | int is_active_console(TextConsole *s);
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230 | 82c643ff | bellard | CharDriverState *text_console_init(DisplayState *ds); |
231 | 82c643ff | bellard | void console_select(unsigned int index); |
232 | 82c643ff | bellard | |
233 | 8d11df9e | bellard | /* serial ports */
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234 | 8d11df9e | bellard | |
235 | 8d11df9e | bellard | #define MAX_SERIAL_PORTS 4 |
236 | 8d11df9e | bellard | |
237 | 8d11df9e | bellard | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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238 | 8d11df9e | bellard | |
239 | 6508fe59 | bellard | /* parallel ports */
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240 | 6508fe59 | bellard | |
241 | 6508fe59 | bellard | #define MAX_PARALLEL_PORTS 3 |
242 | 6508fe59 | bellard | |
243 | 6508fe59 | bellard | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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244 | 6508fe59 | bellard | |
245 | c4b1fcc0 | bellard | /* network redirectors support */
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246 | c4b1fcc0 | bellard | |
247 | c4b1fcc0 | bellard | #define MAX_NICS 8 |
248 | c4b1fcc0 | bellard | |
249 | c4b1fcc0 | bellard | typedef struct NetDriverState { |
250 | c20709aa | bellard | int index; /* index number in QEMU */ |
251 | c4b1fcc0 | bellard | uint8_t macaddr[6];
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252 | c4b1fcc0 | bellard | char ifname[16]; |
253 | c20709aa | bellard | void (*send_packet)(struct NetDriverState *nd, |
254 | c20709aa | bellard | const uint8_t *buf, int size); |
255 | c20709aa | bellard | void (*add_read_packet)(struct NetDriverState *nd, |
256 | c20709aa | bellard | IOCanRWHandler *fd_can_read, |
257 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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258 | c20709aa | bellard | /* tun specific data */
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259 | c20709aa | bellard | int fd;
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260 | c20709aa | bellard | /* slirp specific data */
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261 | c4b1fcc0 | bellard | } NetDriverState; |
262 | c4b1fcc0 | bellard | |
263 | c4b1fcc0 | bellard | extern int nb_nics; |
264 | c4b1fcc0 | bellard | extern NetDriverState nd_table[MAX_NICS];
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265 | c4b1fcc0 | bellard | |
266 | c20709aa | bellard | void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size); |
267 | c20709aa | bellard | void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
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268 | c20709aa | bellard | IOReadHandler *fd_read, void *opaque);
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269 | 8a7ddc38 | bellard | |
270 | 8a7ddc38 | bellard | /* timers */
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271 | 8a7ddc38 | bellard | |
272 | 8a7ddc38 | bellard | typedef struct QEMUClock QEMUClock; |
273 | 8a7ddc38 | bellard | typedef struct QEMUTimer QEMUTimer; |
274 | 8a7ddc38 | bellard | typedef void QEMUTimerCB(void *opaque); |
275 | 8a7ddc38 | bellard | |
276 | 8a7ddc38 | bellard | /* The real time clock should be used only for stuff which does not
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277 | 8a7ddc38 | bellard | change the virtual machine state, as it is run even if the virtual
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278 | 69b91039 | bellard | machine is stopped. The real time clock has a frequency of 1000
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279 | 8a7ddc38 | bellard | Hz. */
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280 | 8a7ddc38 | bellard | extern QEMUClock *rt_clock;
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281 | 8a7ddc38 | bellard | |
282 | e80cfcfc | bellard | /* The virtual clock is only run during the emulation. It is stopped
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283 | 8a7ddc38 | bellard | when the virtual machine is stopped. Virtual timers use a high
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284 | 8a7ddc38 | bellard | precision clock, usually cpu cycles (use ticks_per_sec). */
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285 | 8a7ddc38 | bellard | extern QEMUClock *vm_clock;
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286 | 8a7ddc38 | bellard | |
287 | 8a7ddc38 | bellard | int64_t qemu_get_clock(QEMUClock *clock); |
288 | 8a7ddc38 | bellard | |
289 | 8a7ddc38 | bellard | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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290 | 8a7ddc38 | bellard | void qemu_free_timer(QEMUTimer *ts);
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291 | 8a7ddc38 | bellard | void qemu_del_timer(QEMUTimer *ts);
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292 | 8a7ddc38 | bellard | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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293 | 8a7ddc38 | bellard | int qemu_timer_pending(QEMUTimer *ts);
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294 | 8a7ddc38 | bellard | |
295 | 8a7ddc38 | bellard | extern int64_t ticks_per_sec;
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296 | 8a7ddc38 | bellard | extern int pit_min_timer_count; |
297 | 8a7ddc38 | bellard | |
298 | 8a7ddc38 | bellard | void cpu_enable_ticks(void); |
299 | 8a7ddc38 | bellard | void cpu_disable_ticks(void); |
300 | 8a7ddc38 | bellard | |
301 | 8a7ddc38 | bellard | /* VM Load/Save */
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302 | 8a7ddc38 | bellard | |
303 | 8a7ddc38 | bellard | typedef FILE QEMUFile;
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304 | 8a7ddc38 | bellard | |
305 | 8a7ddc38 | bellard | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
306 | 8a7ddc38 | bellard | void qemu_put_byte(QEMUFile *f, int v); |
307 | 8a7ddc38 | bellard | void qemu_put_be16(QEMUFile *f, unsigned int v); |
308 | 8a7ddc38 | bellard | void qemu_put_be32(QEMUFile *f, unsigned int v); |
309 | 8a7ddc38 | bellard | void qemu_put_be64(QEMUFile *f, uint64_t v);
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310 | 8a7ddc38 | bellard | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
311 | 8a7ddc38 | bellard | int qemu_get_byte(QEMUFile *f);
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312 | 8a7ddc38 | bellard | unsigned int qemu_get_be16(QEMUFile *f); |
313 | 8a7ddc38 | bellard | unsigned int qemu_get_be32(QEMUFile *f); |
314 | 8a7ddc38 | bellard | uint64_t qemu_get_be64(QEMUFile *f); |
315 | 8a7ddc38 | bellard | |
316 | 8a7ddc38 | bellard | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
317 | 8a7ddc38 | bellard | { |
318 | 8a7ddc38 | bellard | qemu_put_be64(f, *pv); |
319 | 8a7ddc38 | bellard | } |
320 | 8a7ddc38 | bellard | |
321 | 8a7ddc38 | bellard | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
322 | 8a7ddc38 | bellard | { |
323 | 8a7ddc38 | bellard | qemu_put_be32(f, *pv); |
324 | 8a7ddc38 | bellard | } |
325 | 8a7ddc38 | bellard | |
326 | 8a7ddc38 | bellard | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
327 | 8a7ddc38 | bellard | { |
328 | 8a7ddc38 | bellard | qemu_put_be16(f, *pv); |
329 | 8a7ddc38 | bellard | } |
330 | 8a7ddc38 | bellard | |
331 | 8a7ddc38 | bellard | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
332 | 8a7ddc38 | bellard | { |
333 | 8a7ddc38 | bellard | qemu_put_byte(f, *pv); |
334 | 8a7ddc38 | bellard | } |
335 | 8a7ddc38 | bellard | |
336 | 8a7ddc38 | bellard | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
337 | 8a7ddc38 | bellard | { |
338 | 8a7ddc38 | bellard | *pv = qemu_get_be64(f); |
339 | 8a7ddc38 | bellard | } |
340 | 8a7ddc38 | bellard | |
341 | 8a7ddc38 | bellard | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
342 | 8a7ddc38 | bellard | { |
343 | 8a7ddc38 | bellard | *pv = qemu_get_be32(f); |
344 | 8a7ddc38 | bellard | } |
345 | 8a7ddc38 | bellard | |
346 | 8a7ddc38 | bellard | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
347 | 8a7ddc38 | bellard | { |
348 | 8a7ddc38 | bellard | *pv = qemu_get_be16(f); |
349 | 8a7ddc38 | bellard | } |
350 | 8a7ddc38 | bellard | |
351 | 8a7ddc38 | bellard | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
352 | 8a7ddc38 | bellard | { |
353 | 8a7ddc38 | bellard | *pv = qemu_get_byte(f); |
354 | 8a7ddc38 | bellard | } |
355 | 8a7ddc38 | bellard | |
356 | c27004ec | bellard | #if TARGET_LONG_BITS == 64 |
357 | c27004ec | bellard | #define qemu_put_betl qemu_put_be64
|
358 | c27004ec | bellard | #define qemu_get_betl qemu_get_be64
|
359 | c27004ec | bellard | #define qemu_put_betls qemu_put_be64s
|
360 | c27004ec | bellard | #define qemu_get_betls qemu_get_be64s
|
361 | c27004ec | bellard | #else
|
362 | c27004ec | bellard | #define qemu_put_betl qemu_put_be32
|
363 | c27004ec | bellard | #define qemu_get_betl qemu_get_be32
|
364 | c27004ec | bellard | #define qemu_put_betls qemu_put_be32s
|
365 | c27004ec | bellard | #define qemu_get_betls qemu_get_be32s
|
366 | c27004ec | bellard | #endif
|
367 | c27004ec | bellard | |
368 | 8a7ddc38 | bellard | int64_t qemu_ftell(QEMUFile *f); |
369 | 8a7ddc38 | bellard | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
370 | 8a7ddc38 | bellard | |
371 | 8a7ddc38 | bellard | typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
372 | 8a7ddc38 | bellard | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
373 | 8a7ddc38 | bellard | |
374 | 8a7ddc38 | bellard | int qemu_loadvm(const char *filename); |
375 | 8a7ddc38 | bellard | int qemu_savevm(const char *filename); |
376 | 8a7ddc38 | bellard | int register_savevm(const char *idstr, |
377 | 8a7ddc38 | bellard | int instance_id,
|
378 | 8a7ddc38 | bellard | int version_id,
|
379 | 8a7ddc38 | bellard | SaveStateHandler *save_state, |
380 | 8a7ddc38 | bellard | LoadStateHandler *load_state, |
381 | 8a7ddc38 | bellard | void *opaque);
|
382 | 8a7ddc38 | bellard | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
383 | 8a7ddc38 | bellard | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
384 | c4b1fcc0 | bellard | |
385 | fc01f7e7 | bellard | /* block.c */
|
386 | fc01f7e7 | bellard | typedef struct BlockDriverState BlockDriverState; |
387 | ea2384d3 | bellard | typedef struct BlockDriver BlockDriver; |
388 | ea2384d3 | bellard | |
389 | ea2384d3 | bellard | extern BlockDriver bdrv_raw;
|
390 | ea2384d3 | bellard | extern BlockDriver bdrv_cow;
|
391 | ea2384d3 | bellard | extern BlockDriver bdrv_qcow;
|
392 | ea2384d3 | bellard | extern BlockDriver bdrv_vmdk;
|
393 | 3c56521b | bellard | extern BlockDriver bdrv_cloop;
|
394 | 585d0ed9 | bellard | extern BlockDriver bdrv_dmg;
|
395 | a8753c34 | bellard | extern BlockDriver bdrv_bochs;
|
396 | 6a0f9e82 | bellard | extern BlockDriver bdrv_vpc;
|
397 | de167e41 | bellard | extern BlockDriver bdrv_vvfat;
|
398 | ea2384d3 | bellard | |
399 | ea2384d3 | bellard | void bdrv_init(void); |
400 | ea2384d3 | bellard | BlockDriver *bdrv_find_format(const char *format_name); |
401 | ea2384d3 | bellard | int bdrv_create(BlockDriver *drv,
|
402 | ea2384d3 | bellard | const char *filename, int64_t size_in_sectors, |
403 | ea2384d3 | bellard | const char *backing_file, int flags); |
404 | c4b1fcc0 | bellard | BlockDriverState *bdrv_new(const char *device_name); |
405 | c4b1fcc0 | bellard | void bdrv_delete(BlockDriverState *bs);
|
406 | c4b1fcc0 | bellard | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); |
407 | ea2384d3 | bellard | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
408 | ea2384d3 | bellard | BlockDriver *drv); |
409 | fc01f7e7 | bellard | void bdrv_close(BlockDriverState *bs);
|
410 | fc01f7e7 | bellard | int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
411 | fc01f7e7 | bellard | uint8_t *buf, int nb_sectors);
|
412 | fc01f7e7 | bellard | int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
413 | fc01f7e7 | bellard | const uint8_t *buf, int nb_sectors); |
414 | fc01f7e7 | bellard | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
415 | 33e3963e | bellard | int bdrv_commit(BlockDriverState *bs);
|
416 | 77fef8c1 | bellard | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
417 | 33e3963e | bellard | |
418 | c4b1fcc0 | bellard | #define BDRV_TYPE_HD 0 |
419 | c4b1fcc0 | bellard | #define BDRV_TYPE_CDROM 1 |
420 | c4b1fcc0 | bellard | #define BDRV_TYPE_FLOPPY 2 |
421 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_AUTO 0 |
422 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_NONE 1 |
423 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_LBA 2 |
424 | c4b1fcc0 | bellard | |
425 | c4b1fcc0 | bellard | void bdrv_set_geometry_hint(BlockDriverState *bs,
|
426 | c4b1fcc0 | bellard | int cyls, int heads, int secs); |
427 | c4b1fcc0 | bellard | void bdrv_set_type_hint(BlockDriverState *bs, int type); |
428 | 46d4767d | bellard | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
429 | c4b1fcc0 | bellard | void bdrv_get_geometry_hint(BlockDriverState *bs,
|
430 | c4b1fcc0 | bellard | int *pcyls, int *pheads, int *psecs); |
431 | c4b1fcc0 | bellard | int bdrv_get_type_hint(BlockDriverState *bs);
|
432 | 46d4767d | bellard | int bdrv_get_translation_hint(BlockDriverState *bs);
|
433 | c4b1fcc0 | bellard | int bdrv_is_removable(BlockDriverState *bs);
|
434 | c4b1fcc0 | bellard | int bdrv_is_read_only(BlockDriverState *bs);
|
435 | c4b1fcc0 | bellard | int bdrv_is_inserted(BlockDriverState *bs);
|
436 | c4b1fcc0 | bellard | int bdrv_is_locked(BlockDriverState *bs);
|
437 | c4b1fcc0 | bellard | void bdrv_set_locked(BlockDriverState *bs, int locked); |
438 | c4b1fcc0 | bellard | void bdrv_set_change_cb(BlockDriverState *bs,
|
439 | c4b1fcc0 | bellard | void (*change_cb)(void *opaque), void *opaque); |
440 | ea2384d3 | bellard | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
441 | c4b1fcc0 | bellard | void bdrv_info(void); |
442 | c4b1fcc0 | bellard | BlockDriverState *bdrv_find(const char *name); |
443 | 82c643ff | bellard | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
444 | ea2384d3 | bellard | int bdrv_is_encrypted(BlockDriverState *bs);
|
445 | ea2384d3 | bellard | int bdrv_set_key(BlockDriverState *bs, const char *key); |
446 | ea2384d3 | bellard | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
447 | ea2384d3 | bellard | void *opaque);
|
448 | ea2384d3 | bellard | const char *bdrv_get_device_name(BlockDriverState *bs); |
449 | c4b1fcc0 | bellard | |
450 | ea2384d3 | bellard | int qcow_get_cluster_size(BlockDriverState *bs);
|
451 | ea2384d3 | bellard | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
|
452 | ea2384d3 | bellard | const uint8_t *buf);
|
453 | ea2384d3 | bellard | |
454 | ea2384d3 | bellard | #ifndef QEMU_TOOL
|
455 | 54fa5af5 | bellard | |
456 | 54fa5af5 | bellard | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
457 | 54fa5af5 | bellard | int boot_device,
|
458 | 54fa5af5 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
459 | 54fa5af5 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
460 | 54fa5af5 | bellard | const char *initrd_filename); |
461 | 54fa5af5 | bellard | |
462 | 54fa5af5 | bellard | typedef struct QEMUMachine { |
463 | 54fa5af5 | bellard | const char *name; |
464 | 54fa5af5 | bellard | const char *desc; |
465 | 54fa5af5 | bellard | QEMUMachineInitFunc *init; |
466 | 54fa5af5 | bellard | struct QEMUMachine *next;
|
467 | 54fa5af5 | bellard | } QEMUMachine; |
468 | 54fa5af5 | bellard | |
469 | 54fa5af5 | bellard | int qemu_register_machine(QEMUMachine *m);
|
470 | 54fa5af5 | bellard | |
471 | 54fa5af5 | bellard | typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
472 | 3de388f6 | bellard | typedef void IRQRequestFunc(void *opaque, int level); |
473 | 54fa5af5 | bellard | |
474 | 26aa7d72 | bellard | /* ISA bus */
|
475 | 26aa7d72 | bellard | |
476 | 26aa7d72 | bellard | extern target_phys_addr_t isa_mem_base;
|
477 | 26aa7d72 | bellard | |
478 | 26aa7d72 | bellard | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
479 | 26aa7d72 | bellard | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
480 | 26aa7d72 | bellard | |
481 | 26aa7d72 | bellard | int register_ioport_read(int start, int length, int size, |
482 | 26aa7d72 | bellard | IOPortReadFunc *func, void *opaque);
|
483 | 26aa7d72 | bellard | int register_ioport_write(int start, int length, int size, |
484 | 26aa7d72 | bellard | IOPortWriteFunc *func, void *opaque);
|
485 | 69b91039 | bellard | void isa_unassign_ioport(int start, int length); |
486 | 69b91039 | bellard | |
487 | 69b91039 | bellard | /* PCI bus */
|
488 | 69b91039 | bellard | |
489 | 69b91039 | bellard | extern int pci_enabled; |
490 | 69b91039 | bellard | |
491 | 69b91039 | bellard | extern target_phys_addr_t pci_mem_base;
|
492 | 69b91039 | bellard | |
493 | 46e50e9d | bellard | typedef struct PCIBus PCIBus; |
494 | 69b91039 | bellard | typedef struct PCIDevice PCIDevice; |
495 | 69b91039 | bellard | |
496 | 69b91039 | bellard | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
497 | 69b91039 | bellard | uint32_t address, uint32_t data, int len);
|
498 | 69b91039 | bellard | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
499 | 69b91039 | bellard | uint32_t address, int len);
|
500 | 69b91039 | bellard | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
501 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type);
|
502 | 69b91039 | bellard | |
503 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM 0x00 |
504 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_IO 0x01 |
505 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
506 | 69b91039 | bellard | |
507 | 69b91039 | bellard | typedef struct PCIIORegion { |
508 | 5768f5ac | bellard | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
509 | 69b91039 | bellard | uint32_t size; |
510 | 69b91039 | bellard | uint8_t type; |
511 | 69b91039 | bellard | PCIMapIORegionFunc *map_func; |
512 | 69b91039 | bellard | } PCIIORegion; |
513 | 69b91039 | bellard | |
514 | 8a8696a3 | bellard | #define PCI_ROM_SLOT 6 |
515 | 8a8696a3 | bellard | #define PCI_NUM_REGIONS 7 |
516 | 69b91039 | bellard | struct PCIDevice {
|
517 | 69b91039 | bellard | /* PCI config space */
|
518 | 69b91039 | bellard | uint8_t config[256];
|
519 | 69b91039 | bellard | |
520 | 69b91039 | bellard | /* the following fields are read only */
|
521 | 46e50e9d | bellard | PCIBus *bus; |
522 | 69b91039 | bellard | int devfn;
|
523 | 69b91039 | bellard | char name[64]; |
524 | 8a8696a3 | bellard | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
525 | 69b91039 | bellard | |
526 | 69b91039 | bellard | /* do not access the following fields */
|
527 | 69b91039 | bellard | PCIConfigReadFunc *config_read; |
528 | 69b91039 | bellard | PCIConfigWriteFunc *config_write; |
529 | 5768f5ac | bellard | int irq_index;
|
530 | 69b91039 | bellard | }; |
531 | 69b91039 | bellard | |
532 | 46e50e9d | bellard | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
533 | 46e50e9d | bellard | int instance_size, int devfn, |
534 | 69b91039 | bellard | PCIConfigReadFunc *config_read, |
535 | 69b91039 | bellard | PCIConfigWriteFunc *config_write); |
536 | 69b91039 | bellard | |
537 | 69b91039 | bellard | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
538 | 69b91039 | bellard | uint32_t size, int type,
|
539 | 69b91039 | bellard | PCIMapIORegionFunc *map_func); |
540 | 69b91039 | bellard | |
541 | 5768f5ac | bellard | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
542 | 5768f5ac | bellard | |
543 | 5768f5ac | bellard | uint32_t pci_default_read_config(PCIDevice *d, |
544 | 5768f5ac | bellard | uint32_t address, int len);
|
545 | 5768f5ac | bellard | void pci_default_write_config(PCIDevice *d,
|
546 | 5768f5ac | bellard | uint32_t address, uint32_t val, int len);
|
547 | 30ca2aab | bellard | void generic_pci_save(QEMUFile* f, void *opaque); |
548 | 30ca2aab | bellard | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); |
549 | 5768f5ac | bellard | |
550 | 9995c51f | bellard | extern struct PIIX3State *piix3_state; |
551 | 9995c51f | bellard | |
552 | 46e50e9d | bellard | PCIBus *i440fx_init(void);
|
553 | 46e50e9d | bellard | void piix3_init(PCIBus *bus);
|
554 | 69b91039 | bellard | void pci_bios_init(void); |
555 | 5768f5ac | bellard | void pci_info(void); |
556 | 26aa7d72 | bellard | |
557 | 77d4bc34 | bellard | /* temporary: will be moved in platform specific file */
|
558 | 54fa5af5 | bellard | void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
559 | 46e50e9d | bellard | PCIBus *pci_prep_init(void);
|
560 | 54fa5af5 | bellard | PCIBus *pci_grackle_init(uint32_t base); |
561 | 46e50e9d | bellard | PCIBus *pci_pmac_init(void);
|
562 | 83469015 | bellard | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); |
563 | 77d4bc34 | bellard | |
564 | 28b9b5af | bellard | /* openpic.c */
|
565 | 28b9b5af | bellard | typedef struct openpic_t openpic_t; |
566 | 54fa5af5 | bellard | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
567 | e2733d20 | bellard | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus); |
568 | 28b9b5af | bellard | |
569 | 54fa5af5 | bellard | /* heathrow_pic.c */
|
570 | 54fa5af5 | bellard | typedef struct HeathrowPICS HeathrowPICS; |
571 | 54fa5af5 | bellard | void heathrow_pic_set_irq(void *opaque, int num, int level); |
572 | 54fa5af5 | bellard | HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
573 | 54fa5af5 | bellard | |
574 | 313aa567 | bellard | /* vga.c */
|
575 | 313aa567 | bellard | |
576 | 4fa0f5d2 | bellard | #define VGA_RAM_SIZE (4096 * 1024) |
577 | 313aa567 | bellard | |
578 | 82c643ff | bellard | struct DisplayState {
|
579 | 313aa567 | bellard | uint8_t *data; |
580 | 313aa567 | bellard | int linesize;
|
581 | 313aa567 | bellard | int depth;
|
582 | 82c643ff | bellard | int width;
|
583 | 82c643ff | bellard | int height;
|
584 | 313aa567 | bellard | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
585 | 313aa567 | bellard | void (*dpy_resize)(struct DisplayState *s, int w, int h); |
586 | 313aa567 | bellard | void (*dpy_refresh)(struct DisplayState *s); |
587 | 82c643ff | bellard | }; |
588 | 313aa567 | bellard | |
589 | 313aa567 | bellard | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
590 | 313aa567 | bellard | { |
591 | 313aa567 | bellard | s->dpy_update(s, x, y, w, h); |
592 | 313aa567 | bellard | } |
593 | 313aa567 | bellard | |
594 | 313aa567 | bellard | static inline void dpy_resize(DisplayState *s, int w, int h) |
595 | 313aa567 | bellard | { |
596 | 313aa567 | bellard | s->dpy_resize(s, w, h); |
597 | 313aa567 | bellard | } |
598 | 313aa567 | bellard | |
599 | 46e50e9d | bellard | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
600 | d5295253 | bellard | unsigned long vga_ram_offset, int vga_ram_size, |
601 | d5295253 | bellard | unsigned long vga_bios_offset, int vga_bios_size); |
602 | 313aa567 | bellard | void vga_update_display(void); |
603 | ee38b4c8 | bellard | void vga_invalidate_display(void); |
604 | 59a983b9 | bellard | void vga_screen_dump(const char *filename); |
605 | 313aa567 | bellard | |
606 | d6bfa22f | bellard | /* cirrus_vga.c */
|
607 | 46e50e9d | bellard | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
608 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
609 | d6bfa22f | bellard | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
610 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
611 | d6bfa22f | bellard | |
612 | 313aa567 | bellard | /* sdl.c */
|
613 | d63d307f | bellard | void sdl_display_init(DisplayState *ds, int full_screen); |
614 | 313aa567 | bellard | |
615 | da4dbf74 | bellard | /* cocoa.m */
|
616 | da4dbf74 | bellard | void cocoa_display_init(DisplayState *ds, int full_screen); |
617 | da4dbf74 | bellard | |
618 | 5391d806 | bellard | /* ide.c */
|
619 | 5391d806 | bellard | #define MAX_DISKS 4 |
620 | 5391d806 | bellard | |
621 | 5391d806 | bellard | extern BlockDriverState *bs_table[MAX_DISKS];
|
622 | 5391d806 | bellard | |
623 | 69b91039 | bellard | void isa_ide_init(int iobase, int iobase2, int irq, |
624 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1); |
625 | 54fa5af5 | bellard | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
626 | 54fa5af5 | bellard | int secondary_ide_enabled);
|
627 | 46e50e9d | bellard | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
628 | 28b9b5af | bellard | int pmac_ide_init (BlockDriverState **hd_table,
|
629 | 54fa5af5 | bellard | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
630 | 5391d806 | bellard | |
631 | fb065187 | bellard | /* sb16.c */
|
632 | fb065187 | bellard | void SB16_init (void); |
633 | fb065187 | bellard | |
634 | fb065187 | bellard | /* adlib.c */
|
635 | fb065187 | bellard | void Adlib_init (void); |
636 | fb065187 | bellard | |
637 | fb065187 | bellard | /* gus.c */
|
638 | fb065187 | bellard | void GUS_init (void); |
639 | 27503323 | bellard | |
640 | 27503323 | bellard | /* dma.c */
|
641 | 85571bc7 | bellard | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
642 | 27503323 | bellard | int DMA_get_channel_mode (int nchan); |
643 | 85571bc7 | bellard | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
644 | 85571bc7 | bellard | int DMA_write_memory (int nchan, void *buf, int pos, int size); |
645 | 27503323 | bellard | void DMA_hold_DREQ (int nchan); |
646 | 27503323 | bellard | void DMA_release_DREQ (int nchan); |
647 | 16f62432 | bellard | void DMA_schedule(int nchan); |
648 | 27503323 | bellard | void DMA_run (void); |
649 | 28b9b5af | bellard | void DMA_init (int high_page_enable); |
650 | 27503323 | bellard | void DMA_register_channel (int nchan, |
651 | 85571bc7 | bellard | DMA_transfer_handler transfer_handler, |
652 | 85571bc7 | bellard | void *opaque);
|
653 | 7138fcfb | bellard | /* fdc.c */
|
654 | 7138fcfb | bellard | #define MAX_FD 2 |
655 | 7138fcfb | bellard | extern BlockDriverState *fd_table[MAX_FD];
|
656 | 7138fcfb | bellard | |
657 | baca51fa | bellard | typedef struct fdctrl_t fdctrl_t; |
658 | baca51fa | bellard | |
659 | baca51fa | bellard | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
660 | baca51fa | bellard | uint32_t io_base, |
661 | baca51fa | bellard | BlockDriverState **fds); |
662 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
663 | 7138fcfb | bellard | |
664 | 80cabfad | bellard | /* ne2000.c */
|
665 | 80cabfad | bellard | |
666 | 69b91039 | bellard | void isa_ne2000_init(int base, int irq, NetDriverState *nd); |
667 | 46e50e9d | bellard | void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
|
668 | 80cabfad | bellard | |
669 | 80cabfad | bellard | /* pckbd.c */
|
670 | 80cabfad | bellard | |
671 | 80cabfad | bellard | void kbd_init(void); |
672 | 80cabfad | bellard | |
673 | 80cabfad | bellard | /* mc146818rtc.c */
|
674 | 80cabfad | bellard | |
675 | 8a7ddc38 | bellard | typedef struct RTCState RTCState; |
676 | 80cabfad | bellard | |
677 | 8a7ddc38 | bellard | RTCState *rtc_init(int base, int irq); |
678 | 8a7ddc38 | bellard | void rtc_set_memory(RTCState *s, int addr, int val); |
679 | 8a7ddc38 | bellard | void rtc_set_date(RTCState *s, const struct tm *tm); |
680 | 80cabfad | bellard | |
681 | 80cabfad | bellard | /* serial.c */
|
682 | 80cabfad | bellard | |
683 | c4b1fcc0 | bellard | typedef struct SerialState SerialState; |
684 | 82c643ff | bellard | SerialState *serial_init(int base, int irq, CharDriverState *chr); |
685 | 80cabfad | bellard | |
686 | 6508fe59 | bellard | /* parallel.c */
|
687 | 6508fe59 | bellard | |
688 | 6508fe59 | bellard | typedef struct ParallelState ParallelState; |
689 | 6508fe59 | bellard | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); |
690 | 6508fe59 | bellard | |
691 | 80cabfad | bellard | /* i8259.c */
|
692 | 80cabfad | bellard | |
693 | 3de388f6 | bellard | typedef struct PicState2 PicState2; |
694 | 3de388f6 | bellard | extern PicState2 *isa_pic;
|
695 | 80cabfad | bellard | void pic_set_irq(int irq, int level); |
696 | 54fa5af5 | bellard | void pic_set_irq_new(void *opaque, int irq, int level); |
697 | 3de388f6 | bellard | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
698 | d592d303 | bellard | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
699 | d592d303 | bellard | void *alt_irq_opaque);
|
700 | 3de388f6 | bellard | int pic_read_irq(PicState2 *s);
|
701 | 3de388f6 | bellard | void pic_update_irq(PicState2 *s);
|
702 | 3de388f6 | bellard | uint32_t pic_intack_read(PicState2 *s); |
703 | c20709aa | bellard | void pic_info(void); |
704 | 4a0fb71e | bellard | void irq_info(void); |
705 | 80cabfad | bellard | |
706 | c27004ec | bellard | /* APIC */
|
707 | d592d303 | bellard | typedef struct IOAPICState IOAPICState; |
708 | d592d303 | bellard | |
709 | c27004ec | bellard | int apic_init(CPUState *env);
|
710 | c27004ec | bellard | int apic_get_interrupt(CPUState *env);
|
711 | d592d303 | bellard | IOAPICState *ioapic_init(void);
|
712 | d592d303 | bellard | void ioapic_set_irq(void *opaque, int vector, int level); |
713 | c27004ec | bellard | |
714 | 80cabfad | bellard | /* i8254.c */
|
715 | 80cabfad | bellard | |
716 | 80cabfad | bellard | #define PIT_FREQ 1193182 |
717 | 80cabfad | bellard | |
718 | ec844b96 | bellard | typedef struct PITState PITState; |
719 | ec844b96 | bellard | |
720 | ec844b96 | bellard | PITState *pit_init(int base, int irq); |
721 | ec844b96 | bellard | void pit_set_gate(PITState *pit, int channel, int val); |
722 | ec844b96 | bellard | int pit_get_gate(PITState *pit, int channel); |
723 | ec844b96 | bellard | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
724 | 80cabfad | bellard | |
725 | 80cabfad | bellard | /* pc.c */
|
726 | 54fa5af5 | bellard | extern QEMUMachine pc_machine;
|
727 | 80cabfad | bellard | |
728 | 26aa7d72 | bellard | /* ppc.c */
|
729 | 54fa5af5 | bellard | extern QEMUMachine prep_machine;
|
730 | 54fa5af5 | bellard | extern QEMUMachine core99_machine;
|
731 | 54fa5af5 | bellard | extern QEMUMachine heathrow_machine;
|
732 | 54fa5af5 | bellard | |
733 | 6af0bf9c | bellard | /* mips_r4k.c */
|
734 | 6af0bf9c | bellard | extern QEMUMachine mips_machine;
|
735 | 6af0bf9c | bellard | |
736 | 8cc43fef | bellard | #ifdef TARGET_PPC
|
737 | 8cc43fef | bellard | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
738 | 8cc43fef | bellard | #endif
|
739 | 64201201 | bellard | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
740 | 77d4bc34 | bellard | |
741 | 77d4bc34 | bellard | extern CPUWriteMemoryFunc *PPC_io_write[];
|
742 | 77d4bc34 | bellard | extern CPUReadMemoryFunc *PPC_io_read[];
|
743 | 77d4bc34 | bellard | extern int prep_enabled; |
744 | 54fa5af5 | bellard | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
745 | 26aa7d72 | bellard | |
746 | e95c8d51 | bellard | /* sun4m.c */
|
747 | 54fa5af5 | bellard | extern QEMUMachine sun4m_machine;
|
748 | e80cfcfc | bellard | uint32_t iommu_translate(uint32_t addr); |
749 | e95c8d51 | bellard | |
750 | e95c8d51 | bellard | /* iommu.c */
|
751 | e80cfcfc | bellard | void *iommu_init(uint32_t addr);
|
752 | e80cfcfc | bellard | uint32_t iommu_translate_local(void *opaque, uint32_t addr);
|
753 | e95c8d51 | bellard | |
754 | e95c8d51 | bellard | /* lance.c */
|
755 | 8d5f07fa | bellard | void lance_init(NetDriverState *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
756 | e95c8d51 | bellard | |
757 | e95c8d51 | bellard | /* tcx.c */
|
758 | e80cfcfc | bellard | void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
759 | 6f7e9aec | bellard | unsigned long vram_offset, int vram_size, int width, int height); |
760 | e80cfcfc | bellard | void tcx_update_display(void *opaque); |
761 | e80cfcfc | bellard | void tcx_invalidate_display(void *opaque); |
762 | e80cfcfc | bellard | void tcx_screen_dump(void *opaque, const char *filename); |
763 | e80cfcfc | bellard | |
764 | e80cfcfc | bellard | /* slavio_intctl.c */
|
765 | e80cfcfc | bellard | void *slavio_intctl_init();
|
766 | e80cfcfc | bellard | void slavio_pic_info(void *opaque); |
767 | e80cfcfc | bellard | void slavio_irq_info(void *opaque); |
768 | e80cfcfc | bellard | void slavio_pic_set_irq(void *opaque, int irq, int level); |
769 | e95c8d51 | bellard | |
770 | e95c8d51 | bellard | /* magic-load.c */
|
771 | e80cfcfc | bellard | int load_elf(const char *filename, uint8_t *addr); |
772 | e80cfcfc | bellard | int load_aout(const char *filename, uint8_t *addr); |
773 | e80cfcfc | bellard | |
774 | e80cfcfc | bellard | /* slavio_timer.c */
|
775 | e80cfcfc | bellard | void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2); |
776 | 8d5f07fa | bellard | |
777 | e80cfcfc | bellard | /* slavio_serial.c */
|
778 | e80cfcfc | bellard | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); |
779 | e80cfcfc | bellard | void slavio_serial_ms_kbd_init(int base, int irq); |
780 | e95c8d51 | bellard | |
781 | 3475187d | bellard | /* slavio_misc.c */
|
782 | 3475187d | bellard | void *slavio_misc_init(uint32_t base, int irq); |
783 | 3475187d | bellard | void slavio_set_power_fail(void *opaque, int power_failing); |
784 | 3475187d | bellard | |
785 | 6f7e9aec | bellard | /* esp.c */
|
786 | 6f7e9aec | bellard | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); |
787 | 6f7e9aec | bellard | |
788 | 3475187d | bellard | /* sun4u.c */
|
789 | 3475187d | bellard | extern QEMUMachine sun4u_machine;
|
790 | 3475187d | bellard | |
791 | 64201201 | bellard | /* NVRAM helpers */
|
792 | 64201201 | bellard | #include "hw/m48t59.h" |
793 | 64201201 | bellard | |
794 | 64201201 | bellard | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
795 | 64201201 | bellard | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
796 | 64201201 | bellard | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
797 | 64201201 | bellard | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
798 | 64201201 | bellard | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
799 | 64201201 | bellard | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
800 | 64201201 | bellard | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
801 | 64201201 | bellard | const unsigned char *str, uint32_t max); |
802 | 64201201 | bellard | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
803 | 64201201 | bellard | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
804 | 64201201 | bellard | uint32_t start, uint32_t count); |
805 | 64201201 | bellard | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
806 | 64201201 | bellard | const unsigned char *arch, |
807 | 64201201 | bellard | uint32_t RAM_size, int boot_device,
|
808 | 64201201 | bellard | uint32_t kernel_image, uint32_t kernel_size, |
809 | 28b9b5af | bellard | const char *cmdline, |
810 | 64201201 | bellard | uint32_t initrd_image, uint32_t initrd_size, |
811 | 28b9b5af | bellard | uint32_t NVRAM_image, |
812 | 28b9b5af | bellard | int width, int height, int depth); |
813 | 64201201 | bellard | |
814 | 63066f4f | bellard | /* adb.c */
|
815 | 63066f4f | bellard | |
816 | 63066f4f | bellard | #define MAX_ADB_DEVICES 16 |
817 | 63066f4f | bellard | |
818 | e2733d20 | bellard | #define ADB_MAX_OUT_LEN 16 |
819 | 63066f4f | bellard | |
820 | e2733d20 | bellard | typedef struct ADBDevice ADBDevice; |
821 | 63066f4f | bellard | |
822 | e2733d20 | bellard | /* buf = NULL means polling */
|
823 | e2733d20 | bellard | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
824 | e2733d20 | bellard | const uint8_t *buf, int len); |
825 | 12c28fed | bellard | typedef int ADBDeviceReset(ADBDevice *d); |
826 | 12c28fed | bellard | |
827 | 63066f4f | bellard | struct ADBDevice {
|
828 | 63066f4f | bellard | struct ADBBusState *bus;
|
829 | 63066f4f | bellard | int devaddr;
|
830 | 63066f4f | bellard | int handler;
|
831 | e2733d20 | bellard | ADBDeviceRequest *devreq; |
832 | 12c28fed | bellard | ADBDeviceReset *devreset; |
833 | 63066f4f | bellard | void *opaque;
|
834 | 63066f4f | bellard | }; |
835 | 63066f4f | bellard | |
836 | 63066f4f | bellard | typedef struct ADBBusState { |
837 | 63066f4f | bellard | ADBDevice devices[MAX_ADB_DEVICES]; |
838 | 63066f4f | bellard | int nb_devices;
|
839 | e2733d20 | bellard | int poll_index;
|
840 | 63066f4f | bellard | } ADBBusState; |
841 | 63066f4f | bellard | |
842 | e2733d20 | bellard | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
843 | e2733d20 | bellard | const uint8_t *buf, int len); |
844 | e2733d20 | bellard | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
845 | 63066f4f | bellard | |
846 | 63066f4f | bellard | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
847 | e2733d20 | bellard | ADBDeviceRequest *devreq, |
848 | 12c28fed | bellard | ADBDeviceReset *devreset, |
849 | 63066f4f | bellard | void *opaque);
|
850 | 63066f4f | bellard | void adb_kbd_init(ADBBusState *bus);
|
851 | 63066f4f | bellard | void adb_mouse_init(ADBBusState *bus);
|
852 | 63066f4f | bellard | |
853 | 63066f4f | bellard | /* cuda.c */
|
854 | 63066f4f | bellard | |
855 | 63066f4f | bellard | extern ADBBusState adb_bus;
|
856 | 54fa5af5 | bellard | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
857 | 63066f4f | bellard | |
858 | ea2384d3 | bellard | #endif /* defined(QEMU_TOOL) */ |
859 | ea2384d3 | bellard | |
860 | c4b1fcc0 | bellard | /* monitor.c */
|
861 | 82c643ff | bellard | void monitor_init(CharDriverState *hd, int show_banner); |
862 | ea2384d3 | bellard | void term_puts(const char *str); |
863 | ea2384d3 | bellard | void term_vprintf(const char *fmt, va_list ap); |
864 | 40c3bac3 | bellard | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
865 | c4b1fcc0 | bellard | void term_flush(void); |
866 | c4b1fcc0 | bellard | void term_print_help(void); |
867 | ea2384d3 | bellard | void monitor_readline(const char *prompt, int is_password, |
868 | ea2384d3 | bellard | char *buf, int buf_size); |
869 | ea2384d3 | bellard | |
870 | ea2384d3 | bellard | /* readline.c */
|
871 | ea2384d3 | bellard | typedef void ReadLineFunc(void *opaque, const char *str); |
872 | ea2384d3 | bellard | |
873 | ea2384d3 | bellard | extern int completion_index; |
874 | ea2384d3 | bellard | void add_completion(const char *str); |
875 | ea2384d3 | bellard | void readline_handle_byte(int ch); |
876 | ea2384d3 | bellard | void readline_find_completion(const char *cmdline); |
877 | ea2384d3 | bellard | const char *readline_get_history(unsigned int index); |
878 | ea2384d3 | bellard | void readline_start(const char *prompt, int is_password, |
879 | ea2384d3 | bellard | ReadLineFunc *readline_func, void *opaque);
|
880 | c4b1fcc0 | bellard | |
881 | 5e6ad6f9 | bellard | void kqemu_record_dump(void); |
882 | 5e6ad6f9 | bellard | |
883 | fc01f7e7 | bellard | #endif /* VL_H */ |