Archipelago » qemu

    uint16_t irr;

    uint16_t imr;

    uint16_t isr;

};

#define SCOOP_MCR	0x00

    case SCOOP_GPCR:

        return s->gpio_dir;

    case SCOOP_GPWR:

    case SCOOP_GPRR:

    default:

        zaurus_printf("Bad register offset " REG_FMT "\n", addr);

    }

        scoop_gpio_handler_update(s);

        break;

    case SCOOP_GPWR:

        s->gpio_level = value & s->gpio_dir;

        scoop_gpio_handler_update(s);

        break;

    default:

        zaurus_printf("Bad register offset " REG_FMT "\n", addr);

    }

    qemu_put_be16s(f, &s->irr);

    qemu_put_be16s(f, &s->imr);

    qemu_put_be16s(f, &s->isr);

}

static int scoop_load(QEMUFile *f, void *opaque, int version_id)

{

    struct scoop_info_s *s = (struct scoop_info_s *) opaque;

    qemu_get_be16s(f, &s->status);

    qemu_get_be16s(f, &s->power);

    qemu_get_be16s(f, &s->irr);

    qemu_get_be16s(f, &s->imr);

    qemu_get_be16s(f, &s->isr);

    return 0;

}

    iomemtype = cpu_register_io_memory(0, scoop_readfn,

                    scoop_writefn, s);

    cpu_register_physical_memory(s->target_base, 0x1000, iomemtype);

    return s;

}